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linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/ti/ti,am625-oldi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments AM625 OLDI Transmitter
maintainers:
- Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
- Aradhya Bhatia <aradhya.bhatia@linux.dev>
description:
The AM625 TI Keystone OpenLDI transmitter (OLDI TX) supports serialized RGB
pixel data transmission between host and flat panel display over LVDS (Low
Voltage Differential Sampling) interface. The OLDI TX consists of 7-to-1 data
serializers, and 4-data and 1-clock LVDS outputs. It supports the LVDS output
formats "jeida-18", "jeida-24" and "vesa-18", and can accept 24-bit RGB or
padded and un-padded 18-bit RGB bus formats as input.
properties:
reg:
maxItems: 1
clocks:
maxItems: 1
description: serial clock input for the OLDI transmitters
clock-names:
const: serial
ti,companion-oldi:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to companion OLDI transmitter. This property is required for both
the OLDI TXes if they are expected to work either in dual-lvds mode or in
clone mode. This property should point to the other OLDI TX's phandle.
ti,secondary-oldi:
type: boolean
description:
Boolean property to mark the OLDI transmitter as the secondary one, when the
OLDI hardware is expected to run as a companion HW, in cases of dual-lvds
mode or clone mode. The primary OLDI hardware is responsible for all the
hardware configuration.
ti,oldi-io-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to syscon device node mapping OLDI IO_CTRL registers found in the
control MMR region. These registers are required to toggle the I/O lane
power, and control its electrical characteristics.
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Parallel RGB input port
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: LVDS output port
required:
- port@0
- port@1
required:
- reg
- clocks
- clock-names
- ti,oldi-io-ctrl
- ports
additionalProperties: false
...
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments AM65x Display Subsystem
maintainers:
- Jyri Sarha <jsarha@ti.com>
- Tomi Valkeinen <tomi.valkeinen@ti.com>
description: |
The AM625 and AM65x TI Keystone Display SubSystem has two output
ports and two video planes. In AM65x DSS, the first video port
supports 1 OLDI TX and in AM625 DSS, the first video port output is
internally routed to 2 OLDI TXes. The second video port supports DPI
format. The first plane is full video plane with all features and the
second is a "lite plane" without scaling support.
The AM62L display subsystem has a single output port which supports DPI
format but it only supports single video "lite plane" which does not support
scaling. The output port is routed to SoC boundary via DPI interface and same
DPI signals are also routed internally to DSI Tx controller present within the
SoC. Due to clocking limitations only one of the interface i.e. either DSI or
DPI can be used at once.
properties:
compatible:
enum:
- ti,am625-dss
- ti,am62a7-dss
- ti,am62l-dss
- ti,am65x-dss
reg:
description:
Addresses to each DSS memory region described in the SoC's TRM.
oneOf:
- items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: VID video plane
- description: OVR1 overlay manager for vp1
- description: OVR2 overlay manager for vp2
- description: VP1 video port 1
- description: VP2 video port 2
- description: common1 DSS register area
- items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: OVR1 overlay manager for vp1
- description: VP1 video port 1
- description: common1 DSS register area
reg-names:
oneOf:
- items:
- const: common
- const: vidl1
- const: vid
- const: ovr1
- const: ovr2
- const: vp1
- const: vp2
- const: common1
- items:
- const: common
- const: vidl1
- const: ovr1
- const: vp1
- const: common1
clocks:
minItems: 2
items:
- description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock
- description: vp2 Video Port 2 pixel clock
clock-names:
minItems: 2
items:
- const: fck
- const: vp1
- const: vp2
assigned-clocks:
minItems: 1
maxItems: 3
assigned-clock-parents:
minItems: 1
maxItems: 3
interrupts:
maxItems: 1
power-domains:
maxItems: 1
description: phandle to the associated power domain
dma-coherent: true
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
For AM65x DSS, the OLDI output port node from video port 1.
For AM625 DSS, the internal DPI output port node from video
port 1.
For AM62A7 DSS, the port is tied off inside the SoC.
For AM62L DSS, the DSS DPI output port node from video port 1
or DSI Tx controller node connected to video port 1.
properties:
endpoint@0:
$ref: /schemas/graph.yaml#/properties/endpoint
description:
For AM625 DSS, VP Connection to OLDI0.
For AM65X DSS, OLDI output from the SoC.
endpoint@1:
$ref: /schemas/graph.yaml#/properties/endpoint
description:
For AM625 DSS, VP Connection to OLDI1.
anyOf:
- required:
- endpoint
- required:
- endpoint@0
- endpoint@1
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
The DSS DPI output port node from video port 2
ti,am65x-oldi-io-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to syscon device node mapping OLDI IO_CTRL registers.
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
interface to work.
max-memory-bandwidth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Input memory (from main memory to dispc) bandwidth limit in
bytes per second
oldi-transmitters:
description:
Child node under the DSS, to describe all the OLDI transmitters connected
to the DSS videoports.
type: object
additionalProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
'^oldi@[0-1]$':
$ref: ti,am625-oldi.yaml#
description: OLDI transmitters connected to the DSS VPs
allOf:
- if:
properties:
compatible:
contains:
const: ti,am62a7-dss
then:
properties:
oldi-transmitters: false
ports:
properties:
port@0: false
- if:
properties:
compatible:
contains:
const: ti,am62l-dss
then:
properties:
ports:
properties:
port@1: false
reg:
maxItems: 5
reg-names:
maxItems: 5
clocks:
maxItems: 2
clock-names:
maxItems: 2
else:
properties:
reg:
minItems: 8
reg-names:
minItems: 8
clocks:
minItems: 3
clock-names:
minItems: 3
- if:
properties:
compatible:
contains:
enum:
- ti,am62l-dss
- ti,am65x-dss
then:
properties:
oldi-transmitters: false
ports:
properties:
port@0:
properties:
endpoint@1: false
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- interrupts
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
dss: dss@4a00000 {
compatible = "ti,am65x-dss";
reg = <0x04a00000 0x1000>, /* common */
<0x04a02000 0x1000>, /* vidl1 */
<0x04a06000 0x1000>, /* vid */
<0x04a07000 0x1000>, /* ovr1 */
<0x04a08000 0x1000>, /* ovr2 */
<0x04a0a000 0x1000>, /* vp1 */
<0x04a0b000 0x1000>, /* vp2 */
<0x04a01000 0x1000>; /* common1 */
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2", "common1";
ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 67 1>,
<&k3_clks 216 1>,
<&k3_clks 67 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi_out0: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
};
};
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
dss1: dss@30200000 {
compatible = "ti,am625-dss";
reg = <0x00 0x30200000 0x00 0x1000>, /* common */
<0x00 0x30202000 0x00 0x1000>, /* vidl1 */
<0x00 0x30206000 0x00 0x1000>, /* vid */
<0x00 0x30207000 0x00 0x1000>, /* ovr1 */
<0x00 0x30208000 0x00 0x1000>, /* ovr2 */
<0x00 0x3020a000 0x00 0x1000>, /* vp1 */
<0x00 0x3020b000 0x00 0x1000>, /* vp2 */
<0x00 0x30201000 0x00 0x1000>; /* common1 */
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2", "common1";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 186 6>,
<&vp1_clock>,
<&k3_clks 186 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
oldi-transmitters {
#address-cells = <1>;
#size-cells = <0>;
oldi0: oldi@0 {
reg = <0>;
clocks = <&k3_clks 186 0>;
clock-names = "serial";
ti,companion-oldi = <&oldi1>;
ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi0_in: endpoint {
remote-endpoint = <&dpi0_out0>;
};
};
port@1 {
reg = <1>;
oldi0_out: endpoint {
remote-endpoint = <&panel_in0>;
};
};
};
};
oldi1: oldi@1 {
reg = <1>;
clocks = <&k3_clks 186 0>;
clock-names = "serial";
ti,secondary-oldi;
ti,companion-oldi = <&oldi0>;
ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi1_in: endpoint {
remote-endpoint = <&dpi0_out1>;
};
};
port@1 {
reg = <1>;
oldi1_out: endpoint {
remote-endpoint = <&panel_in1>;
};
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dpi0_out0: endpoint@0 {
reg = <0>;
remote-endpoint = <&oldi0_in>;
};
dpi0_out1: endpoint@1 {
reg = <1>;
remote-endpoint = <&oldi1_in>;
};
};
port@1 {
reg = <1>;
dpi1_out: endpoint {
remote-endpoint = <&hdmi_bridge>;
};
};
};
};
};
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
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Texas Instruments DRA7x Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,dra7-dss"
- reg: address and length of the register spaces for 'dss'
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
- syscon: phandle to control module core syscon node
Optional properties:
Some DRA7xx SoCs have one dedicated video PLL, some have two. These properties
can be used to describe the video PLLs:
- reg: address and length of the register spaces for 'pll1_clkctrl',
'pll1', 'pll2_clkctrl', 'pll2'
- clocks: handle to video1 pll clock and video2 pll clock
- clock-names: "video1_clk" and "video2_clk"
Required nodes:
- DISPC
Optional nodes:
- DSS Submodules: HDMI
- Video port for DPI output
DPI Endpoint required properties:
- data-lines: number of lines used
DISPC
-----
Required properties:
- compatible: "ti,dra7-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
HDMI
----
Required properties:
- compatible: "ti,dra7-hdmi"
- reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',
'core'
- reg-names: "wp", "pll", "phy", "core"
- interrupts: the HDMI interrupt line
- ti,hwmods: "dss_hdmi"
- vdda-supply: vdda power supply
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for HDMI output
HDMI Endpoint optional properties:
- lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments J721E Display Subsystem
maintainers:
- Jyri Sarha <jsarha@ti.com>
- Tomi Valkeinen <tomi.valkeinen@ti.com>
description: |
The J721E TI Keystone Display SubSystem with four output ports and
four video planes. There is two full video planes and two "lite
planes" without scaling support. The video ports can be connected to
the SoC's DPI pins or to integrated display bridges on the SoC.
properties:
compatible:
const: ti,j721e-dss
reg:
items:
- description: common_m DSS Master common
- description: common_s0 DSS Shared common 0
- description: common_s1 DSS Shared common 1
- description: common_s2 DSS Shared common 2
- description: VIDL1 light video plane 1
- description: VIDL2 light video plane 2
- description: VID1 video plane 1
- description: VID1 video plane 2
- description: OVR1 overlay manager for vp1
- description: OVR2 overlay manager for vp2
- description: OVR3 overlay manager for vp3
- description: OVR4 overlay manager for vp4
- description: VP1 video port 1
- description: VP2 video port 2
- description: VP3 video port 3
- description: VP4 video port 4
- description: WB Write Back
reg-names:
items:
- const: common_m
- const: common_s0
- const: common_s1
- const: common_s2
- const: vidl1
- const: vidl2
- const: vid1
- const: vid2
- const: ovr1
- const: ovr2
- const: ovr3
- const: ovr4
- const: vp1
- const: vp2
- const: vp3
- const: vp4
- const: wb
clocks:
items:
- description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock
- description: vp2 Video Port 2 pixel clock
- description: vp3 Video Port 3 pixel clock
- description: vp4 Video Port 4 pixel clock
clock-names:
items:
- const: fck
- const: vp1
- const: vp2
- const: vp3
- const: vp4
assigned-clocks:
minItems: 1
maxItems: 5
assigned-clock-parents:
minItems: 1
maxItems: 5
interrupts:
items:
- description: common_m DSS Master common
- description: common_s0 DSS Shared common 0
- description: common_s1 DSS Shared common 1
- description: common_s2 DSS Shared common 2
interrupt-names:
items:
- const: common_m
- const: common_s0
- const: common_s1
- const: common_s2
power-domains:
maxItems: 1
description: phandle to the associated power domain
dma-coherent: true
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
The output port node form video port 1
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
The output port node from video port 2
port@2:
$ref: /schemas/graph.yaml#/properties/port
description:
The output port node from video port 3
port@3:
$ref: /schemas/graph.yaml#/properties/port
description:
The output port node from video port 4
max-memory-bandwidth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Input memory (from main memory to dispc) bandwidth limit in
bytes per second
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- interrupts
- interrupt-names
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
dss: dss@4a00000 {
compatible = "ti,j721e-dss";
reg = <0x04a00000 0x10000>, /* common_m */
<0x04a10000 0x10000>, /* common_s0*/
<0x04b00000 0x10000>, /* common_s1*/
<0x04b10000 0x10000>, /* common_s2*/
<0x04a20000 0x10000>, /* vidl1 */
<0x04a30000 0x10000>, /* vidl2 */
<0x04a50000 0x10000>, /* vid1 */
<0x04a60000 0x10000>, /* vid2 */
<0x04a70000 0x10000>, /* ovr1 */
<0x04a90000 0x10000>, /* ovr2 */
<0x04ab0000 0x10000>, /* ovr3 */
<0x04ad0000 0x10000>, /* ovr4 */
<0x04a80000 0x10000>, /* vp1 */
<0x04aa0000 0x10000>, /* vp2 */
<0x04ac0000 0x10000>, /* vp3 */
<0x04ae0000 0x10000>, /* vp4 */
<0x04af0000 0x10000>; /* wb */
reg-names = "common_m", "common_s0",
"common_s1", "common_s2",
"vidl1", "vidl2","vid1","vid2",
"ovr1", "ovr2", "ovr3", "ovr4",
"vp1", "vp2", "vp3", "vp4",
"wb";
clocks = <&k3_clks 152 0>,
<&k3_clks 152 1>,
<&k3_clks 152 4>,
<&k3_clks 152 9>,
<&k3_clks 152 13>;
clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common_m",
"common_s0",
"common_s1",
"common_s2";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dpi_out_0: endpoint {
remote-endpoint = <&dp_bridge_input>;
};
};
};
};
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K2G Display Subsystem
maintainers:
- Jyri Sarha <jsarha@ti.com>
- Tomi Valkeinen <tomi.valkeinen@ti.com>
description: |
The K2G DSS is an ultra-light version of TI Keystone Display
SubSystem. It has only one output port and video plane. The
output is DPI.
properties:
compatible:
const: ti,k2g-dss
reg:
items:
- description: cfg DSS top level
- description: common DISPC common
- description: VID1 video plane 1
- description: OVR1 overlay manager for vp1
- description: VP1 video port 1
reg-names:
items:
- const: cfg
- const: common
- const: vid1
- const: ovr1
- const: vp1
clocks:
items:
- description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock
clock-names:
items:
- const: fck
- const: vp1
interrupts:
maxItems: 1
power-domains:
maxItems: 1
description: phandle to the associated power domain
port:
$ref: /schemas/graph.yaml#/properties/port
description:
The DSS DPI output port node
max-memory-bandwidth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Input memory (from main memory to dispc) bandwidth limit in
bytes per second
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- interrupts
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
dss: dss@2540000 {
compatible = "ti,k2g-dss";
reg = <0x02540000 0x400>,
<0x02550000 0x1000>,
<0x02557000 0x1000>,
<0x0255a800 0x100>,
<0x0255ac00 0x100>;
reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
clocks = <&k2g_clks 0x2 0>,
<&k2g_clks 0x2 1>;
clock-names = "fck", "vp1";
interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
power-domains = <&k2g_pds 0x2>;
max-memory-bandwidth = <230000000>;
port {
dpi_out: endpoint {
remote-endpoint = <&sii9022_in>;
};
};
};
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt
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Texas Instruments OMAP Display Subsystem
========================================
Generic Description
-------------------
This document is a generic description of the OMAP Display Subsystem bindings.
Binding details for each OMAP SoC version are described in respective binding
documentation.
The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
the encoder modules vary.
The DSS Core is the parent of the other DSS modules, and manages clock routing,
integration to the SoC, etc.
DISPC is the display controller, which reads pixels from the memory and outputs
a RGB pixel stream to encoders.
The encoder modules encode the received RGB pixel stream to a video output like
HDMI, MIPI DPI, etc.
Video Ports
-----------
The DSS Core and the encoders have video port outputs. The structure of the
video ports is described in Documentation/devicetree/bindings/graph.txt,
and the properties for the ports and endpoints for each encoder are
described in the SoC's DSS binding documentation.
The video ports are used to describe the connections to external hardware, like
panels or external encoders.
Aliases
-------
The board dts file may define aliases for displays to assign "displayX" style
name for each display. If no aliases are defined, a semi-random number is used
for the display.
Example
-------
A shortened example of the DSS description for OMAP4, with non-relevant parts
removed, defined in omap4.dtsi:
dss: dss@58000000 {
compatible = "ti,omap4-dss";
reg = <0x58000000 0x80>;
status = "disabled";
ti,hwmods = "dss_core";
clocks = <&dss_dss_clk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dispc@58001000 {
compatible = "ti,omap4-dispc";
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
clocks = <&dss_dss_clk>;
clock-names = "fck";
};
hdmi: encoder@58006000 {
compatible = "ti,omap4-hdmi";
reg = <0x58006000 0x200>,
<0x58006200 0x100>,
<0x58006300 0x100>,
<0x58006400 0x1000>;
reg-names = "wp", "pll", "phy", "core";
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_hdmi";
clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
clock-names = "fck", "sys_clk";
};
};
A shortened example of the board description for OMAP4 Panda board, defined in
omap4-panda.dts.
The Panda board has a DVI and a HDMI connector, and the board contains a TFP410
chip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level
shifter). The video pipelines for the connectors are formed as follows:
DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
OMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector
/ {
aliases {
display0 = &dvi0;
display1 = &hdmi0;
};
tfp410: encoder@0 {
compatible = "ti,tfp410";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */
pinctrl-names = "default";
pinctrl-0 = <&tfp410_pins>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tfp410_in: endpoint@0 {
remote-endpoint = <&dpi_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint@0 {
remote-endpoint = <&dvi_connector_in>;
};
};
};
};
dvi0: connector@0 {
compatible = "dvi-connector";
label = "dvi";
i2c-bus = <&i2c3>;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
tpd12s015: encoder@1 {
compatible = "ti,tpd12s015";
pinctrl-names = "default";
pinctrl-0 = <&tpd12s015_pins>;
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
<&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
<&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tpd12s015_in: endpoint@0 {
remote-endpoint = <&hdmi_out>;
};
};
port@1 {
reg = <1>;
tpd12s015_out: endpoint@0 {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};
hdmi0: connector@1 {
compatible = "hdmi-connector";
label = "hdmi";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&tpd12s015_out>;
};
};
};
};
&dss {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&dss_dpi_pins>;
port {
dpi_out: endpoint {
remote-endpoint = <&tfp410_in>;
data-lines = <24>;
};
};
};
&hdmi {
status = "ok";
vdda-supply = <&vdac>;
pinctrl-names = "default";
pinctrl-0 = <&dss_hdmi_pins>;
port {
hdmi_out: endpoint {
remote-endpoint = <&tpd12s015_in>;
};
};
};
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt
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Texas Instruments OMAP2 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap2-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
Optional nodes:
- Video port for DPI output
DPI Endpoint required properties:
- data-lines: number of lines used
DISPC
-----
Required properties:
- compatible: "ti,omap2-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----
Required properties:
- compatible: "ti,omap2-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
VENC
----
Required properties:
- compatible: "ti,omap2-venc"
- reg: address and length of the register space
- ti,hwmods: "dss_venc"
- vdda-supply: power supply for DAC
VENC Endpoint required properties:
Required properties:
- ti,invert-polarity: invert the polarity of the video signal
- ti,channels: 1 for composite, 2 for s-video
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
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Texas Instruments OMAP3 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap3-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
Optional nodes:
- Video ports:
- Port 0: DPI output
- Port 1: SDI output
DPI Endpoint required properties:
- data-lines: number of lines used
SDI Endpoint required properties:
- datapairs: number of datapairs used
DISPC
-----
Required properties:
- compatible: "ti,omap3-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----
Required properties:
- compatible: "ti,omap3-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
- clocks: handles to fclk and iclk
- clock-names: "fck", "ick"
VENC
----
Required properties:
- compatible: "ti,omap3-venc"
- reg: address and length of the register space
- ti,hwmods: "dss_venc"
- vdda-supply: power supply for DAC
- clocks: handle to fclk
- clock-names: "fck"
VENC Endpoint required properties:
- ti,invert-polarity: invert the polarity of the video signal
- ti,channels: 1 for composite, 2 for s-video
DSI
---
Required properties:
- compatible: "ti,omap3-dsi"
- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
- reg-names: "proto", "phy", "pll"
- interrupts: the DSI interrupt line
- ti,hwmods: "dss_dsi1"
- vdd-supply: power supply for DSI
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
DSI Endpoint required properties:
- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
DATA1+, DATA1-, ...
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt
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Texas Instruments OMAP4 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap4-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
Required nodes:
- DISPC
Optional nodes:
- DSS Submodules: RFBI, VENC, DSI, HDMI
- Video port for DPI output
DPI Endpoint required properties:
- data-lines: number of lines used
DISPC
-----
Required properties:
- compatible: "ti,omap4-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----
Required properties:
- compatible: "ti,omap4-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
- clocks: handles to fclk and iclk
- clock-names: "fck", "ick"
Optional nodes:
- Video port for RFBI output
- RFBI controlled peripherals
VENC
----
Required properties:
- compatible: "ti,omap4-venc"
- reg: address and length of the register space
- ti,hwmods: "dss_venc"
- vdda-supply: power supply for DAC
- clocks: handle to fclk
- clock-names: "fck"
Optional nodes:
- Video port for VENC output
VENC Endpoint required properties:
- ti,invert-polarity: invert the polarity of the video signal
- ti,channels: 1 for composite, 2 for s-video
DSI
---
Required properties:
- compatible: "ti,omap4-dsi"
- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
- reg-names: "proto", "phy", "pll"
- interrupts: the DSI interrupt line
- ti,hwmods: "dss_dsi1" or "dss_dsi2"
- vdd-supply: power supply for DSI
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for DSI output
- DSI controlled peripherals
DSI Endpoint required properties:
- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
DATA1+, DATA1-, ...
HDMI
----
Required properties:
- compatible: "ti,omap4-hdmi"
- reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',
'core'
- reg-names: "wp", "pll", "phy", "core"
- interrupts: the HDMI interrupt line
- ti,hwmods: "dss_hdmi"
- vdda-supply: vdda power supply
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for HDMI output
HDMI Endpoint optional properties:
- lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt
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Texas Instruments OMAP5 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap5-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
Required nodes:
- DISPC
Optional nodes:
- DSS Submodules: RFBI, DSI, HDMI
- Video port for DPI output
DPI Endpoint required properties:
- data-lines: number of lines used
DISPC
-----
Required properties:
- compatible: "ti,omap5-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----
Required properties:
- compatible: "ti,omap5-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
- clocks: handles to fclk and iclk
- clock-names: "fck", "ick"
Optional nodes:
- Video port for RFBI output
- RFBI controlled peripherals
DSI
---
Required properties:
- compatible: "ti,omap5-dsi"
- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
- reg-names: "proto", "phy", "pll"
- interrupts: the DSI interrupt line
- ti,hwmods: "dss_dsi1" or "dss_dsi2"
- vdd-supply: power supply for DSI
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for DSI output
- DSI controlled peripherals
DSI Endpoint required properties:
- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
DATA1+, DATA1-, ...
HDMI
----
Required properties:
- compatible: "ti,omap5-hdmi"
- reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',
'core'
- reg-names: "wp", "pll", "phy", "core"
- interrupts: the HDMI interrupt line
- ti,hwmods: "dss_hdmi"
- vdda-supply: vdda power supply
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
Optional nodes:
- Video port for HDMI output
HDMI Endpoint optional properties:
- lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)
linux-7.2.3/Documentation/devicetree/bindings/display/ti/ti,tpd12s015.txt
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TPD12S015 HDMI level shifter and ESD protection chip
====================================================
Required properties:
- compatible: "ti,tpd12s015"
Optional properties:
- gpios: CT CP HPD, LS OE and HPD gpios
Required nodes:
- Video port 0 for HDMI input
- Video port 1 for HDMI output
Example
-------
tpd12s015: encoder@1 {
compatible = "ti,tpd12s015";
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
<&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
<&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tpd12s015_in: endpoint@0 {
remote-endpoint = <&hdmi_out>;
};
};
port@1 {
reg = <1>;
tpd12s015_out: endpoint@0 {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};