Resguardo inicial

2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
+
+maintainers:
+  - Vladimir Zapolskiy <vz@mleia.com>
+
+properties:
+  compatible:
+    enum:
+      - nxp,lpc3220-mic
+      - nxp,lpc3220-sic
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+  interrupts:
+    items:
+      - description: Regular interrupt request
+      - description: Fast interrupt request
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nxp,lpc3220-sic
+    then:
+      required:
+        - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    mic: interrupt-controller@40008000 {
+        compatible = "nxp,lpc3220-mic";
+        reg = <0x40008000 0x4000>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+    };
+
+    interrupt-controller@4000c000 {
+        compatible = "nxp,lpc3220-sic";
+        reg = <0x4000c000 0x4000>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+        interrupt-parent = <&mic>;
+        interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
+                    <30 IRQ_TYPE_LEVEL_LOW>;
+    };