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linux-7.2.3/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/allwinner,sun4i-a10-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 CAN Controller
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- items:
- const: allwinner,sun7i-a20-can
- const: allwinner,sun4i-a10-can
- const: allwinner,sun4i-a10-can
- const: allwinner,sun8i-r40-can
- const: allwinner,sun20i-d1-can
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
if:
properties:
compatible:
enum:
- allwinner,sun8i-r40-can
- allwinner,sun20i-d1-can
then:
required:
- resets
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun7i-a20-ccu.h>
can0: can@1c2bc00 {
compatible = "allwinner,sun7i-a20-can",
"allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_CAN>;
};
- |
#define RST_BUS_CAN 68
#define CLK_BUS_CAN 91
can1: can@1c2bc00 {
compatible = "allwinner,sun8i-r40-can";
reg = <0x01c2bc00 0x400>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CAN>;
resets = <&ccu RST_BUS_CAN>;
};
...
linux-7.2.3/Documentation/devicetree/bindings/net/can/atmel,at91sam9263-can.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/atmel,at91sam9263-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip AT91 CAN Controller
maintainers:
- Nicolas Ferre <nicolas.ferre@microchip.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- atmel,at91sam9263-can
- atmel,at91sam9x5-can
- items:
- enum:
- microchip,sam9x60-can
- const: atmel,at91sam9x5-can
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: can_clk
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/at91.h>
can@f000c000 {
compatible = "atmel,at91sam9263-can";
reg = <0xf000c000 0x300>;
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "can_clk";
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/bosch,c_can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch C_CAN/D_CAN controller
description: Bosch C_CAN/D_CAN controller for CAN bus
maintainers:
- Dario Binacchi <dariobin@libero.it>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- bosch,c_can
- bosch,d_can
- ti,dra7-d_can
- ti,am3352-d_can
- items:
- enum:
- ti,am4372-d_can
- const: ti,am3352-d_can
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 4
power-domains:
description: |
Should contain a phandle to a PM domain provider node and an args
specifier containing the DCAN device id value. It's mandatory for
Keystone 2 66AK2G SoCs only.
maxItems: 1
clocks:
description: |
CAN functional clock phandle.
maxItems: 1
clock-names:
maxItems: 1
syscon-raminit:
description: |
Handle to system control region that contains the RAMINIT register,
register offset to the RAMINIT register and the CAN instance number (0
offset).
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: The phandle to the system control region.
- description: The register offset.
- description: The CAN instance number.
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
if:
properties:
compatible:
contains:
enum:
- bosch,d_can
then:
properties:
interrupts:
items:
- description: Error and status IRQ
- description: Message object IRQ
- description: RAM ECC correctable error IRQ
- description: RAM ECC non-correctable error IRQ
else:
properties:
interrupts:
items:
- description: Error and status IRQ
additionalProperties: false
examples:
- |
#include <dt-bindings/reset/altr,rst-mgr.h>
can@ffc00000 {
compatible = "bosch,d_can";
reg = <0xffc00000 0x1000>;
interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
clocks = <&can0_clk>;
resets = <&rst CAN0_RESET>;
};
- |
can@0 {
compatible = "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan1_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <55>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/bosch,m_can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch MCAN controller
description: Bosch MCAN controller for CAN bus
maintainers:
- Chandrasekar Ramakrishnan <rcsekar@samsung.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
const: bosch,m_can
reg:
items:
- description: M_CAN registers map
- description: message RAM
reg-names:
items:
- const: m_can
- const: message_ram
interrupts:
items:
- description: interrupt line0
- description: interrupt line1
minItems: 1
interrupt-names:
items:
- const: int0
- const: int1
minItems: 1
clocks:
items:
- description: peripheral clock
- description: bus clock
clock-names:
items:
- const: hclk
- const: cclk
resets:
maxItems: 1
bosch,mram-cfg:
description: |
Message RAM configuration data.
Multiple M_CAN instances can share the same Message RAM
and each element(e.g Rx FIFO or Tx Buffer and etc) number
in Message RAM is also configurable, so this property is
telling driver how the shared or private Message RAM are
used by this M_CAN controller.
The format should be as follows:
<offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems>
The 'offset' is an address offset of the Message RAM where
the following elements start from. This is usually set to
0x0 if you're using a private Message RAM. The remain cells
are used to specify how many elements are used for each FIFO/Buffer.
M_CAN includes the following elements according to user manual:
11-bit Filter 0-128 elements / 0-128 words
29-bit Filter 0-64 elements / 0-128 words
Rx FIFO 0 0-64 elements / 0-1152 words
Rx FIFO 1 0-64 elements / 0-1152 words
Rx Buffers 0-64 elements / 0-1152 words
Tx Event FIFO 0-32 elements / 0-64 words
Tx Buffers 0-32 elements / 0-576 words
Please refer to 2.4.1 Message RAM Configuration in Bosch
M_CAN user manual for details.
$ref: /schemas/types.yaml#/definitions/int32-array
items:
- description: The 'offset' is an address offset of the Message RAM where
the following elements start from. This is usually set to 0x0 if
you're using a private Message RAM.
default: 0
- description: 11-bit Filter 0-128 elements / 0-128 words
minimum: 0
maximum: 128
- description: 29-bit Filter 0-64 elements / 0-128 words
minimum: 0
maximum: 64
- description: Rx FIFO 0 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Rx FIFO 1 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Rx Buffers 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Tx Event FIFO 0-32 elements / 0-64 words
minimum: 0
maximum: 32
- description: Tx Buffers 0-32 elements / 0-576 words
minimum: 0
maximum: 32
minItems: 1
pinctrl-0:
description: Default pinctrl state
pinctrl-1:
description: Can be "sleep" or "wakeup" pinctrl state
pinctrl-2:
description: Can be "sleep" or "wakeup" pinctrl state
pinctrl-names:
description:
When present should contain at least "default" describing the default pin
states. Other states are "sleep" which describes the pinstate when
sleeping and "wakeup" describing the pins if wakeup is enabled.
minItems: 1
items:
- const: default
- enum: [ sleep, wakeup ]
- const: wakeup
power-domains:
description:
Power domain provider node and an args specifier containing
the can device id value.
maxItems: 1
can-transceiver:
$ref: can-transceiver.yaml#
phys:
maxItems: 1
access-controllers:
minItems: 1
maxItems: 2
wakeup-source:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
List of phandles to system idle states in which mcan can wakeup the system.
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- bosch,mram-cfg
unevaluatedProperties: false
examples:
- |
// Example with interrupts
#include <dt-bindings/clock/imx6sx-clock.h>
can@20e8000 {
compatible = "bosch,m_can";
reg = <0x020e8000 0x4000>, <0x02298000 0x4000>;
reg-names = "m_can", "message_ram";
interrupts = <0 114 0x04>, <0 114 0x04>;
interrupt-names = "int0", "int1";
clocks = <&clks IMX6SX_CLK_CANFD>,
<&clks IMX6SX_CLK_CANFD>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>;
can-transceiver {
max-bitrate = <5000000>;
};
};
- |
// Example with timer polling
#include <dt-bindings/clock/imx6sx-clock.h>
can@20e8000 {
compatible = "bosch,m_can";
reg = <0x020e8000 0x4000>, <0x02298000 0x4000>;
reg-names = "m_can", "message_ram";
clocks = <&clks IMX6SX_CLK_CANFD>,
<&clks IMX6SX_CLK_CANFD>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>;
can-transceiver {
max-bitrate = <5000000>;
};
};
...
linux-7.2.3/Documentation/devicetree/bindings/net/can/can-controller.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/can-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CAN Controller Common Properties
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
properties:
$nodename:
pattern: "^can(@.*)?$"
termination-gpios:
description: GPIO pin to enable CAN bus termination.
maxItems: 1
termination-ohms:
description: The resistance value of the CAN bus termination resistor.
minimum: 1
maximum: 65535
additionalProperties: true
...
linux-7.2.3/Documentation/devicetree/bindings/net/can/can-transceiver.yaml
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/can-transceiver.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CAN transceiver
description: CAN transceiver generic properties bindings
maintainers:
- Rob Herring <robh@kernel.org>
properties:
max-bitrate:
$ref: /schemas/types.yaml#/definitions/uint32
description: a positive non 0 value that determines the max speed that CAN/CAN-FD can run.
minimum: 1
additionalProperties: true
linux-7.2.3/Documentation/devicetree/bindings/net/can/cc770.txt
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Memory mapped Bosch CC770 and Intel AN82527 CAN controller
Note: The CC770 is a CAN controller from Bosch, which is 100%
compatible with the old AN82527 from Intel, but with "bugs" being fixed.
Required properties:
- compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
for the AN82527.
- reg : should specify the chip select, address offset and size required
to map the registers of the controller. The size is usually 0x80.
- interrupts : property with a value describing the interrupt source
(number and sensitivity) required for the controller.
Optional properties:
- bosch,external-clock-frequency : frequency of the external oscillator
clock in Hz. Note that the internal clock frequency used by the
controller is half of that value. If not specified, a default
value of 16000000 (16 MHz) is used.
- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
If not specified or if the specified value is 0, the CLKOUT pin
will be disabled.
- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
a reasonable value will be calculated.
- bosch,disconnect-rx0-input : see data sheet.
- bosch,disconnect-rx1-input : see data sheet.
- bosch,disconnect-tx1-output : see data sheet.
- bosch,polarity-dominant : see data sheet.
- bosch,divide-memory-clock : see data sheet.
- bosch,iso-low-speed-mux : see data sheet.
For further information, please have a look to the CC770 or AN82527.
Examples:
can@3,100 {
compatible = "bosch,cc770";
reg = <3 0x100 0x80>;
interrupts = <2 0>;
interrupt-parent = <&mpic>;
bosch,external-clock-frequency = <16000000>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: CTU CAN FD Open-source IP Core
description: |
Open-source CAN FD IP core developed at the Czech Technical University in Prague
The core sources and documentation on project page
[1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
[2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf
Integration in Xilinx Zynq SoC based system together with
OpenCores SJA1000 compatible controllers
[3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
Martin Jerabek dimploma thesis with integration and testing
framework description
[4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf
maintainers:
- Pavel Pisa <pisa@cmp.felk.cvut.cz>
- Ondrej Ille <ondrej.ille@gmail.com>
- Martin Jerabek <martin.jerabek01@gmail.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- items:
- const: ctu,ctucanfd-2
- const: ctu,ctucanfd
- const: ctu,ctucanfd
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
description: |
phandle of reference clock (100 MHz is appropriate
for FPGA implementation on Zynq-7000 system).
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
ctu_can_fd_0: can@43c30000 {
compatible = "ctu,ctucanfd";
interrupts = <0 30 4>;
clocks = <&clkc 15>;
reg = <0x43c30000 0x10000>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title:
Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
properties:
compatible:
oneOf:
- enum:
- fsl,imx95-flexcan
- fsl,imx93-flexcan
- fsl,imx8qm-flexcan
- fsl,imx8mp-flexcan
- fsl,imx6q-flexcan
- fsl,imx28-flexcan
- fsl,imx25-flexcan
- fsl,p1010-flexcan
- fsl,vf610-flexcan
- fsl,ls1021ar2-flexcan
- fsl,lx2160ar1-flexcan
- nxp,s32g2-flexcan
- items:
- enum:
- fsl,imx53-flexcan
- fsl,imx35-flexcan
- const: fsl,imx25-flexcan
- items:
- enum:
- fsl,imx7d-flexcan
- fsl,imx6ul-flexcan
- fsl,imx6sx-flexcan
- const: fsl,imx6q-flexcan
- items:
- enum:
- fsl,ls1028ar1-flexcan
- const: fsl,lx2160ar1-flexcan
- items:
- enum:
- nxp,s32g3-flexcan
- const: nxp,s32g2-flexcan
- items:
- enum:
- fsl,imx94-flexcan
- const: fsl,imx95-flexcan
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 4
interrupt-names:
minItems: 1
maxItems: 4
clocks:
maxItems: 2
clock-names:
items:
- const: ipg
- const: per
clock-frequency:
description: |
The oscillator frequency driving the flexcan device, filled in by the
boot loader. This property should only be used the used operating system
doesn't support the clocks and clock-names property.
power-domains:
maxItems: 1
xceiver-supply:
description: Regulator that powers the CAN transceiver.
phys:
maxItems: 1
big-endian:
$ref: /schemas/types.yaml#/definitions/flag
description: |
This means the registers of FlexCAN controller are big endian. This is
optional property.i.e. if this property is not present in device tree
node then controller is assumed to be little endian. If this property is
present then controller is assumed to be big endian.
can-transceiver:
$ref: can-transceiver.yaml#
unevaluatedProperties: false
fsl,stop-mode:
description: |
Register bits of stop mode control.
The format should be as follows:
<gpr req_gpr req_bit>
gpr is the phandle to general purpose register node.
req_gpr is the gpr register offset of CAN stop request.
req_bit is the bit offset of CAN stop request.
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: The 'gpr' is the phandle to general purpose register node.
- description: The 'req_gpr' is the gpr register offset of CAN stop request.
maximum: 0xff
- description: The 'req_bit' is the bit offset of CAN stop request.
maximum: 0x1f
fsl,clk-source:
description: |
Select the clock source to the CAN Protocol Engine (PE). It's SoC
implementation dependent. Refer to RM for detailed definition. If this
property is not set in device tree node then driver selects clock source 1
by default.
0: clock source 0 (oscillator clock)
1: clock source 1 (peripheral clock)
$ref: /schemas/types.yaml#/definitions/uint8
default: 1
minimum: 0
maximum: 1
wakeup-source:
$ref: /schemas/types.yaml#/definitions/flag
description:
Enable CAN remote wakeup.
fsl,scu-index:
description: |
The scu index of CAN instance.
For SoCs with SCU support, need setup stop mode via SCU firmware, so this
property can help indicate a resource. It supports up to 3 CAN instances
now.
$ref: /schemas/types.yaml#/definitions/uint8
minimum: 0
maximum: 2
termination-gpios: true
termination-ohms: true
required:
- compatible
- reg
- interrupts
allOf:
- $ref: can-controller.yaml#
- if:
properties:
compatible:
contains:
const: nxp,s32g2-flexcan
then:
properties:
interrupts:
items:
- description: Message Buffer interrupt for mailboxes 0-7 and Enhanced RX FIFO
- description: Device state change
- description: Bus Error detection
- description: Message Buffer interrupt for mailboxes 8-127
interrupt-names:
items:
- const: mb-0
- const: state
- const: berr
- const: mb-1
required:
- interrupt-names
else:
properties:
interrupts:
maxItems: 1
interrupt-names: false
- if:
required:
- xceiver-supply
then:
properties:
phys: false
additionalProperties: false
examples:
- |
can@1c000 {
compatible = "fsl,p1010-flexcan";
reg = <0x1c000 0x1000>;
interrupts = <48 0x2>;
interrupt-parent = <&mpic>;
clock-frequency = <200000000>;
fsl,clk-source = /bits/ 8 <0>;
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
can@2090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 1>, <&clks 2>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x34 28>;
fsl,scu-index = /bits/ 8 <1>;
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
can@2090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 1>, <&clks 2>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x34 28>;
termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
termination-ohms = <120>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/grcan.txt
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Aeroflex Gaisler GRCAN and GRHCAN CAN controllers.
The GRCAN and CRHCAN CAN controllers are available in the GRLIB VHDL IP core
library.
Note: These properties are built from the AMBA plug&play in a Leon SPARC system
(the ordinary environment for GRCAN and GRHCAN). There are no dts files for
sparc.
Required properties:
- name : Should be "GAISLER_GRCAN", "01_03d", "GAISLER_GRHCAN" or "01_034"
- reg : Address and length of the register set for the device
- freq : Frequency of the external oscillator clock in Hz (the frequency of
the amba bus in the ordinary case)
- interrupts : Interrupt number for this device
Optional properties:
- systemid : If not present or if the value of the least significant 16 bits
of this 32-bit property is smaller than GRCAN_TXBUG_SAFE_GRLIB_VERSION
a bug workaround is activated.
For further information look in the documentation for the GLIB IP core library:
http://www.gaisler.com/products/grlib/grip.pdf
linux-7.2.3/Documentation/devicetree/bindings/net/can/holt_hi311x.txt
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* Holt HI-311X stand-alone CAN controller device tree bindings
Required properties:
- compatible: Should be one of the following:
- "holt,hi3110" for HI-3110
- reg: SPI chip select.
- clocks: The clock feeding the CAN controller.
- interrupts: Should contain IRQ line for the CAN controller.
Optional properties:
- vdd-supply: Regulator that powers the CAN controller.
- xceiver-supply: Regulator that powers the CAN transceiver.
Example:
can0: can@1 {
compatible = "holt,hi3110";
reg = <1>;
clocks = <&clk32m>;
interrupt-parent = <&gpio4>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
vdd-supply = <&reg5v0>;
xceiver-supply = <&reg5v0>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/ifi_canfd.txt
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IFI CANFD controller
--------------------
Required properties:
- compatible: Should be "ifi,canfd-1.0"
- reg: Should contain CAN controller registers location and length
- interrupts: Should contain IRQ line for the CAN controller
Example:
canfd0: canfd@ff220000 {
compatible = "ifi,canfd-1.0";
reg = <0xff220000 0x00001000>;
interrupts = <0 43 0>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/microchip,mcp2510.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip MCP251X stand-alone CAN controller
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
properties:
compatible:
enum:
- microchip,mcp2510
- microchip,mcp2515
- microchip,mcp25625
reg:
maxItems: 1
clocks:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply:
description: Regulator that powers the CAN controller.
xceiver-supply:
description: Regulator that powers the CAN transceiver.
gpio-controller: true
"#gpio-cells":
const: 2
required:
- compatible
- reg
- clocks
- interrupts
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
can@1 {
compatible = "microchip,mcp2515";
reg = <1>;
clocks = <&clk24m>;
interrupt-parent = <&gpio4>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&reg5v0>;
xceiver-supply = <&reg5v0>;
gpio-controller;
#gpio-cells = <2>;
};
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- microchip,mcp2517fd
- microchip,mcp2518fd
- microchip,mcp251xfd
- items:
- enum:
- microchip,mcp251863
- const: microchip,mcp2518fd
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
vdd-supply:
description: Regulator that powers the CAN controller.
xceiver-supply:
description: Regulator that powers the CAN transceiver.
microchip,rx-int-gpios:
description:
GPIO phandle of GPIO connected to INT1 pin of the MCP251XFD, which
signals a pending RX interrupt.
maxItems: 1
microchip,xstbyen:
type: boolean
description:
If present, configure the INT0/GPIO0/XSTBY pin as transceiver standby
control. The pin is driven low when the controller is active and high
when it enters Sleep mode, allowing automatic standby control of an
external CAN transceiver connected to this pin.
spi-max-frequency:
description:
Must be half or less of "clocks" frequency.
maximum: 20000000
gpio-controller: true
"#gpio-cells":
const: 2
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
can@0 {
compatible = "microchip,mcp251xfd";
reg = <0>;
clocks = <&can0_osc>;
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
spi-max-frequency = <20000000>;
interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>;
microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
vdd-supply = <&reg5v0>;
xceiver-supply = <&reg5v0>;
};
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/microchip,mpfs-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title:
Microchip PolarFire SoC (MPFS) can controller
maintainers:
- Conor Dooley <conor.dooley@microchip.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- items:
- const: microchip,pic64gx-can
- const: microchip,mpfs-can
- const: microchip,mpfs-can
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: AHB peripheral clock
- description: CAN bus clock
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
- resets
additionalProperties: false
examples:
- |
can@2010c000 {
compatible = "microchip,mpfs-can";
reg = <0x2010c000 0x1000>;
clocks = <&clkcfg 17>, <&clkcfg 37>;
resets = <&clkcfg 17>;
interrupt-parent = <&plic>;
interrupts = <56>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/mpc5xxx-mscan.txt
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CAN Device Tree Bindings
------------------------
(c) 2006-2009 Secret Lab Technologies Ltd
Grant Likely <grant.likely@secretlab.ca>
fsl,mpc5200-mscan nodes
-----------------------
In addition to the required compatible-, reg- and interrupt-properties, you can
also specify which clock source shall be used for the controller:
- fsl,mscan-clock-source : a string describing the clock source. Valid values
are: "ip" for ip bus clock
"ref" for reference clock (XTAL)
"ref" is default in case this property is not
present.
fsl,mpc5121-mscan nodes
-----------------------
In addition to the required compatible-, reg- and interrupt-properties, you can
also specify which clock source and divider shall be used for the controller:
- fsl,mscan-clock-source : a string describing the clock source. Valid values
are: "ip" for ip bus clock
"ref" for reference clock
"sys" for system clock
If this property is not present, an optimal CAN
clock source and frequency based on the system
clock will be selected. If this is not possible,
the reference clock will be used.
- fsl,mscan-clock-divider: for the reference and system clock, an additional
clock divider can be specified. By default, a
value of 1 is used.
Note that the MPC5121 Rev. 1 processor is not supported.
Examples:
can@1300 {
compatible = "fsl,mpc5121-mscan";
interrupts = <12 0x8>;
interrupt-parent = <&ipic>;
reg = <0x1300 0x80>;
};
can@1380 {
compatible = "fsl,mpc5121-mscan";
interrupts = <13 0x8>;
interrupt-parent = <&ipic>;
reg = <0x1380 0x80>;
fsl,mscan-clock-source = "ref";
fsl,mscan-clock-divider = <3>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
maintainers:
- Wolfgang Grandegger <wg@grandegger.com>
properties:
compatible:
oneOf:
- enum:
- nxp,sja1000
- technologic,sja1000
- items:
- const: renesas,r9a06g032-sja1000 # RZ/N1D
- const: renesas,rzn1-sja1000 # RZ/N1
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
reg-io-width:
description: I/O register width (in bytes) implemented by this device
default: 1
enum: [ 1, 2, 4 ]
nxp,external-clock-frequency:
$ref: /schemas/types.yaml#/definitions/uint32
default: 16000000
description: |
Frequency of the external oscillator clock in Hz.
The internal clock frequency used by the SJA1000 is half of that value.
nxp,tx-output-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 2, 3 ]
default: 1
description: |
operation mode of the TX output control logic. Valid values are:
<0> : bi-phase output mode
<1> : normal output mode (default)
<2> : test output mode
<3> : clock output mode
nxp,tx-output-config:
$ref: /schemas/types.yaml#/definitions/uint32
default: 0x02
description: |
TX output pin configuration. Valid values are any one of the below
or combination of TX0 and TX1:
<0x01> : TX0 invert
<0x02> : TX0 pull-down (default)
<0x04> : TX0 pull-up
<0x06> : TX0 push-pull
<0x08> : TX1 invert
<0x10> : TX1 pull-down
<0x20> : TX1 pull-up
<0x30> : TX1 push-pull
nxp,clock-out-frequency:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
clock frequency in Hz on the CLKOUT pin.
If not specified or if the specified value is 0, the CLKOUT pin
will be disabled.
nxp,no-comparator-bypass:
type: boolean
description: Allows to disable the CAN input comparator.
required:
- compatible
- reg
- interrupts
allOf:
- $ref: can-controller.yaml#
- $ref: /schemas/memory-controllers/mc-peripheral-props.yaml
- if:
properties:
compatible:
contains:
enum:
- technologic,sja1000
- renesas,rzn1-sja1000
then:
required:
- reg-io-width
- if:
properties:
compatible:
contains:
const: renesas,rzn1-sja1000
then:
required:
- clocks
- power-domains
unevaluatedProperties: false
examples:
- |
can@1a000 {
compatible = "technologic,sja1000";
reg = <0x1a000 0x100>;
interrupts = <1>;
reg-io-width = <2>;
nxp,tx-output-config = <0x06>;
nxp,external-clock-frequency = <24000000>;
};
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
can@52104000 {
compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
reg = <0x52104000 0x800>;
reg-io-width = <4>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
power-domains = <&sysctrl>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/renesas,rcar-can.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car CAN Controller
maintainers:
- Sergei Shtylyov <sergei.shtylyov@gmail.com>
properties:
compatible:
oneOf:
- items:
- enum:
- renesas,can-r8a7778 # R-Car M1-A
- renesas,can-r8a7779 # R-Car H1
- const: renesas,rcar-gen1-can # R-Car Gen1
- items:
- enum:
- renesas,can-r8a7742 # RZ/G1H
- renesas,can-r8a7743 # RZ/G1M
- renesas,can-r8a7744 # RZ/G1N
- renesas,can-r8a7745 # RZ/G1E
- renesas,can-r8a77470 # RZ/G1C
- renesas,can-r8a7790 # R-Car H2
- renesas,can-r8a7791 # R-Car M2-W
- renesas,can-r8a7792 # R-Car V2H
- renesas,can-r8a7793 # R-Car M2-N
- renesas,can-r8a7794 # R-Car E2
- const: renesas,rcar-gen2-can # R-Car Gen2 and RZ/G1
- items:
- enum:
- renesas,can-r8a774a1 # RZ/G2M
- renesas,can-r8a774b1 # RZ/G2N
- renesas,can-r8a774c0 # RZ/G2E
- renesas,can-r8a774e1 # RZ/G2H
- renesas,can-r8a7795 # R-Car H3
- renesas,can-r8a7796 # R-Car M3-W
- renesas,can-r8a77961 # R-Car M3-W+
- renesas,can-r8a77965 # R-Car M3-N
- renesas,can-r8a77990 # R-Car E3
- renesas,can-r8a77995 # R-Car D3
- const: renesas,rcar-gen3-can # R-Car Gen3 and RZ/G2
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 3
clock-names:
items:
- const: clkp1
- const: clkp2
- const: can_clk
power-domains:
maxItems: 1
resets:
maxItems: 1
renesas,can-clock-select:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 3 ]
default: 0
description: |
R-Car CAN Clock Source Select. Valid values are:
<0x0> (default) : Peripheral clock (clkp1)
<0x1> : Peripheral clock (clkp2)
<0x3> : External input clock
assigned-clocks:
description:
Reference to the clkp2 (CANFD) clock.
On R-Car Gen3 and RZ/G2 SoCs, "clkp2" is the CANFD clock. This is a div6
clock and can be used by both CAN and CAN FD controllers at the same
time. It needs to be scaled to maximum frequency if any of these
controllers use it.
assigned-clock-rates:
description: Maximum frequency of the CANFD clock.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
allOf:
- $ref: can-controller.yaml#
- if:
not:
properties:
compatible:
contains:
const: renesas,rcar-gen1-can
then:
required:
- resets
- if:
properties:
compatible:
contains:
const: renesas,rcar-gen3-can
then:
required:
- assigned-clocks
- assigned-clock-rates
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7791-sysc.h>
can0: can@e6e80000 {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
reg = <0xe6e80000 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 916>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car CAN FD Controller
maintainers:
- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
properties:
compatible:
oneOf:
- enum:
- renesas,r9a09g047-canfd # RZ/G3E
- renesas,r9a09g077-canfd # RZ/T2H
- items:
- enum:
- renesas,r8a774a1-canfd # RZ/G2M
- renesas,r8a774b1-canfd # RZ/G2N
- renesas,r8a774c0-canfd # RZ/G2E
- renesas,r8a774e1-canfd # RZ/G2H
- renesas,r8a7795-canfd # R-Car H3
- renesas,r8a7796-canfd # R-Car M3-W
- renesas,r8a77961-canfd # R-Car M3-W+
- renesas,r8a77965-canfd # R-Car M3-N
- renesas,r8a77970-canfd # R-Car V3M
- renesas,r8a77980-canfd # R-Car V3H
- renesas,r8a77990-canfd # R-Car E3
- renesas,r8a77995-canfd # R-Car D3
- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
- items:
- enum:
- renesas,r8a779a0-canfd # R-Car V3U
- renesas,r8a779g0-canfd # R-Car V4H
- renesas,r8a779h0-canfd # R-Car V4M
- const: renesas,rcar-gen4-canfd # R-Car Gen4
- items:
- enum:
- renesas,r9a07g043-canfd # RZ/G2UL and RZ/Five
- renesas,r9a07g044-canfd # RZ/G2{L,LC}
- renesas,r9a07g054-canfd # RZ/V2L
- const: renesas,rzg2l-canfd # RZ/G2L family
- items:
- enum:
- renesas,r9a09g056-canfd # RZ/V2N
- renesas,r9a09g057-canfd # RZ/V2H(P)
- const: renesas,r9a09g047-canfd
- items:
- const: renesas,r9a09g087-canfd # RZ/N2H
- const: renesas,r9a09g077-canfd
reg:
maxItems: 1
interrupts:
oneOf:
- items:
- description: Channel interrupt
- description: Global interrupt
- items:
- description: CAN global error interrupt
- description: CAN receive FIFO interrupt
- description: CAN0 error interrupt
- description: CAN0 transmit interrupt
- description: CAN0 transmit/receive FIFO receive completion interrupt
- description: CAN1 error interrupt
- description: CAN1 transmit interrupt
- description: CAN1 transmit/receive FIFO receive completion interrupt
- description: CAN2 error interrupt
- description: CAN2 transmit interrupt
- description: CAN2 transmit/receive FIFO receive completion interrupt
- description: CAN3 error interrupt
- description: CAN3 transmit interrupt
- description: CAN3 transmit/receive FIFO receive completion interrupt
- description: CAN4 error interrupt
- description: CAN4 transmit interrupt
- description: CAN4 transmit/receive FIFO receive completion interrupt
- description: CAN5 error interrupt
- description: CAN5 transmit interrupt
- description: CAN5 transmit/receive FIFO receive completion interrupt
minItems: 8
interrupt-names:
oneOf:
- items:
- const: ch_int
- const: g_int
- items:
- const: g_err
- const: g_recc
- const: ch0_err
- const: ch0_rec
- const: ch0_trx
- const: ch1_err
- const: ch1_rec
- const: ch1_trx
- const: ch2_err
- const: ch2_rec
- const: ch2_trx
- const: ch3_err
- const: ch3_rec
- const: ch3_trx
- const: ch4_err
- const: ch4_rec
- const: ch4_trx
- const: ch5_err
- const: ch5_rec
- const: ch5_trx
minItems: 8
clocks:
maxItems: 3
clock-names:
oneOf:
- items:
- const: fck
- const: canfd
- const: can_clk
- items:
- const: fck
- const: ram_clk
- const: can_clk
power-domains:
maxItems: 1
resets: true
reset-names:
items:
- const: rstp_n
- const: rstc_n
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
The controller can operate in either CAN-FD mode (default) or FD-Only
mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
property to put the controller in Classical CAN mode.
renesas,fd-only:
$ref: /schemas/types.yaml#/definitions/flag
description:
The CANFD on RZ/{G2L,G3E} and R-Car Gen4 SoCs support 3 modes FD-Only
mode, Classical CAN mode and CAN-FD mode (default). In FD-Only mode,
communication in Classical CAN frame format is disabled. Specify this
property to put the controller in FD-Only mode.
assigned-clocks:
description:
Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
used by both CAN (if present) and CAN FD controllers at the same time.
It needs to be scaled to maximum frequency if any of these controllers
use it.
assigned-clock-rates:
description: Maximum frequency of the CANFD clock.
patternProperties:
"^channel[0-7]$":
type: object
description:
The controller supports multiple channels and each is represented as a
child node. Each channel can be enabled/disabled individually.
properties:
phys:
maxItems: 1
additionalProperties: false
required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- power-domains
- assigned-clocks
- assigned-clock-rates
- channel0
- channel1
allOf:
- $ref: can-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- renesas,rzg2l-canfd
then:
properties:
interrupts:
maxItems: 8
interrupt-names:
maxItems: 8
resets:
minItems: 2
maxItems: 2
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen3-canfd
- renesas,rcar-gen4-canfd
then:
properties:
interrupts:
minItems: 2
maxItems: 2
interrupt-names:
minItems: 2
maxItems: 2
resets:
maxItems: 1
- if:
properties:
compatible:
contains:
const: renesas,r9a09g047-canfd
then:
properties:
interrupts:
minItems: 20
interrupt-names:
minItems: 20
resets:
minItems: 2
maxItems: 2
- if:
properties:
compatible:
contains:
const: renesas,r9a09g077-canfd
then:
properties:
interrupts:
maxItems: 8
interrupt-names:
maxItems: 8
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a09g077-canfd
- renesas,rcar-gen3-canfd
- renesas,rzg2l-canfd
then:
patternProperties:
"^channel[2-7]$": false
- if:
properties:
compatible:
contains:
const: renesas,r8a779h0-canfd
then:
patternProperties:
"^channel[4-7]$": false
- if:
properties:
compatible:
contains:
const: renesas,r9a09g047-canfd
then:
patternProperties:
"^channel[6-7]$": false
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen3-canfd
then:
properties:
renesas,fd-only: false
- if:
required:
- renesas,no-can-fd
then:
properties:
renesas,fd-only: false
- if:
required:
- renesas,fd-only
then:
properties:
renesas,no-can-fd: false
- if:
properties:
compatible:
contains:
const: renesas,r9a09g077-canfd
then:
properties:
resets: false
reset-names: false
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a09g047-canfd
- renesas,rzg2l-canfd
then:
required:
- resets
- reset-names
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen3-canfd
- renesas,rcar-gen4-canfd
then:
required:
- resets
properties:
reset-names: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
canfd: can@e66c0000 {
compatible = "renesas,r8a7795-canfd",
"renesas,rcar-gen3-canfd";
reg = <0xe66c0000 0x8000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch_int", "g_int";
clocks = <&cpg CPG_MOD 914>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 914>;
channel0 {
};
channel1 {
};
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/rockchip,rk3568v2-canfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title:
Rockchip CAN-FD controller
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- const: rockchip,rk3568v2-canfd
- items:
- const: rockchip,rk3568v3-canfd
- const: rockchip,rk3568v2-canfd
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 2
clock-names:
items:
- const: baud
- const: pclk
resets:
maxItems: 2
reset-names:
items:
- const: core
- const: apb
required:
- compatible
- reg
- interrupts
- clocks
- resets
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/rk3568-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
can@fe570000 {
compatible = "rockchip,rk3568v2-canfd";
reg = <0x0 0xfe570000 0x0 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
clock-names = "baud", "pclk";
resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;
reset-names = "core", "apb";
};
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics bxCAN controller
description: STMicroelectronics BxCAN controller for CAN bus
maintainers:
- Dario Binacchi <dario.binacchi@amarulasolutions.com>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
enum:
- st,stm32f4-bxcan
st,can-primary:
description:
Primary mode of the bxCAN peripheral is only relevant if the chip has
two CAN peripherals in dual CAN configuration. In that case they share
some of the required logic.
Not to be used if the peripheral is in single CAN configuration.
To avoid misunderstandings, it should be noted that ST documentation
uses the terms master instead of primary.
type: boolean
st,can-secondary:
description:
Secondary mode of the bxCAN peripheral is only relevant if the chip
has two CAN peripherals in dual CAN configuration. In that case they
share some of the required logic.
Not to be used if the peripheral is in single CAN configuration.
To avoid misunderstandings, it should be noted that ST documentation
uses the terms slave instead of secondary.
type: boolean
reg:
maxItems: 1
interrupts:
items:
- description: transmit interrupt
- description: FIFO 0 receive interrupt
- description: FIFO 1 receive interrupt
- description: status change error interrupt
interrupt-names:
items:
- const: tx
- const: rx0
- const: rx1
- const: sce
resets:
maxItems: 1
clocks:
maxItems: 1
st,gcan:
$ref: /schemas/types.yaml#/definitions/phandle
description:
The phandle to the gcan node which allows to access the 512-bytes
SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2
secondary) in dual CAN peripheral configuration.
required:
- compatible
- reg
- interrupts
- resets
- clocks
- st,gcan
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/stm32fx-clock.h>
#include <dt-bindings/mfd/stm32f4-rcc.h>
can1: can@40006400 {
compatible = "st,stm32f4-bxcan";
reg = <0x40006400 0x200>;
interrupts = <19>, <20>, <21>, <22>;
interrupt-names = "tx", "rx0", "rx1", "sce";
resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
st,can-primary;
st,gcan = <&gcan>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/ti,tcan4x5x.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/ti,tcan4x5x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments TCAN4x5x CAN Controller
maintainers:
- Marc Kleine-Budde <mkl@pengutronix.de>
properties:
compatible:
oneOf:
- items:
- enum:
- ti,tcan4552
- ti,tcan4553
- const: ti,tcan4x5x
- const: ti,tcan4x5x
reg:
maxItems: 1
interrupts:
maxItems: 1
description: The GPIO parent interrupt.
clocks:
maxItems: 1
clock-names:
items:
- const: cclk
reset-gpios:
description: Hardwired output GPIO. If not defined then software reset.
maxItems: 1
device-state-gpios:
description:
Input GPIO that indicates if the device is in a sleep state or if the
device is active. Not available with tcan4552/4553.
maxItems: 1
device-wake-gpios:
description:
Wake up GPIO to wake up the TCAN device.
Not available with tcan4552/4553.
maxItems: 1
bosch,mram-cfg:
description: |
Message RAM configuration data.
Multiple M_CAN instances can share the same Message RAM
and each element(e.g Rx FIFO or Tx Buffer and etc) number
in Message RAM is also configurable, so this property is
telling driver how the shared or private Message RAM are
used by this M_CAN controller.
The format should be as follows:
<offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems>
The 'offset' is an address offset of the Message RAM where
the following elements start from. This is usually set to
0x0 if you're using a private Message RAM. The remain cells
are used to specify how many elements are used for each FIFO/Buffer.
M_CAN includes the following elements according to user manual:
11-bit Filter 0-128 elements / 0-128 words
29-bit Filter 0-64 elements / 0-128 words
Rx FIFO 0 0-64 elements / 0-1152 words
Rx FIFO 1 0-64 elements / 0-1152 words
Rx Buffers 0-64 elements / 0-1152 words
Tx Event FIFO 0-32 elements / 0-64 words
Tx Buffers 0-32 elements / 0-576 words
Please refer to 2.4.1 Message RAM Configuration in Bosch
M_CAN user manual for details.
$ref: /schemas/types.yaml#/definitions/int32-array
items:
- description: The 'offset' is an address offset of the Message RAM where
the following elements start from. This is usually set to 0x0 if
you're using a private Message RAM.
default: 0
- description: 11-bit Filter 0-128 elements / 0-128 words
minimum: 0
maximum: 128
- description: 29-bit Filter 0-64 elements / 0-128 words
minimum: 0
maximum: 64
- description: Rx FIFO 0 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Rx FIFO 1 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Rx Buffers 0-64 elements / 0-1152 words
minimum: 0
maximum: 64
- description: Tx Event FIFO 0-32 elements / 0-64 words
minimum: 0
maximum: 32
- description: Tx Buffers 0-32 elements / 0-576 words
minimum: 0
maximum: 32
minItems: 1
spi-max-frequency:
description:
Must be half or less of "clocks" frequency.
maximum: 18000000
ti,nwkrq-voltage-vio:
type: boolean
description:
nWKRQ Pin GPO buffer voltage configuration.
Set nWKRQ to use VIO voltage rail.
When not set nWKRQ will use internal voltage rail.
wakeup-source:
$ref: /schemas/types.yaml#/definitions/flag
description:
Enable CAN remote wakeup.
allOf:
- $ref: can-controller.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
properties:
compatible:
contains:
enum:
- ti,tcan4552
- ti,tcan4553
then:
properties:
device-state-gpios: false
device-wake-gpios: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- bosch,mram-cfg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
can@0 {
compatible = "ti,tcan4x5x";
reg = <0>;
clocks = <&can0_osc>;
clock-names = "cclk";
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
spi-max-frequency = <10000000>;
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
interrupt-parent = <&gpio1>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
ti,nwkrq-voltage-vio;
wakeup-source;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
can@0 {
compatible = "ti,tcan4552", "ti,tcan4x5x";
reg = <0>;
clocks = <&can0_osc>;
clock-names = "cclk";
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
spi-max-frequency = <10000000>;
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
interrupt-parent = <&gpio1>;
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
wakeup-source;
};
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/ti_hecc.txt
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Texas Instruments High End CAN Controller (HECC)
================================================
This file provides information, what the device node
for the hecc interface contains.
Required properties:
- compatible: "ti,am3517-hecc"
- reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
and 'mbx'
- reg-names :"hecc", "hecc-ram", "mbx"
- interrupts: interrupt mapping for the hecc interrupts sources
- clocks: clock phandles (see clock bindings for details)
Optional properties:
- ti,use-hecc1int: if provided configures HECC to produce all interrupts
on HECC1INT interrupt line. By default HECC0INT interrupt
line will be used.
- xceiver-supply: regulator that powers the CAN transceiver
Example:
For am3517evm board:
hecc: can@5c050000 {
compatible = "ti,am3517-hecc";
reg = <0x5c050000 0x80>,
<0x5c053000 0x180>,
<0x5c052000 0x200>;
reg-names = "hecc", "hecc-ram", "mbx";
interrupts = <24>;
clocks = <&hecc_ck>;
};
linux-7.2.3/Documentation/devicetree/bindings/net/can/xilinx,can.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/xilinx,can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title:
Xilinx CAN and CANFD controller
maintainers:
- Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
properties:
compatible:
enum:
- xlnx,zynq-can-1.0
- xlnx,axi-can-1.00.a
- xlnx,canfd-1.0
- xlnx,canfd-2.0
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
clock-names:
maxItems: 2
power-domains:
maxItems: 1
tx-fifo-depth:
$ref: /schemas/types.yaml#/definitions/uint32
description: CAN Tx fifo depth (Zynq, Axi CAN).
rx-fifo-depth:
$ref: /schemas/types.yaml#/definitions/uint32
description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode)
tx-mailbox-count:
$ref: /schemas/types.yaml#/definitions/uint32
description: CAN Tx mailbox buffer count (CAN FD)
resets:
maxItems: 1
xlnx,has-ecc:
$ref: /schemas/types.yaml#/definitions/flag
description: CAN TX_OL, TX_TL and RX FIFOs have ECC support(AXI CAN)
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
allOf:
- $ref: can-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- xlnx,zynq-can-1.0
then:
properties:
clock-names:
items:
- const: can_clk
- const: pclk
required:
- tx-fifo-depth
- rx-fifo-depth
- if:
properties:
compatible:
contains:
enum:
- xlnx,axi-can-1.00.a
then:
properties:
clock-names:
items:
- const: can_clk
- const: s_axi_aclk
required:
- tx-fifo-depth
- rx-fifo-depth
- if:
properties:
compatible:
contains:
enum:
- xlnx,canfd-1.0
- xlnx,canfd-2.0
then:
properties:
clock-names:
items:
- const: can_clk
- const: s_axi_aclk
required:
- tx-mailbox-count
- rx-fifo-depth
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
can@e0008000 {
compatible = "xlnx,zynq-can-1.0";
reg = <0xe0008000 0x1000>;
clocks = <&clkc 19>, <&clkc 36>;
clock-names = "can_clk", "pclk";
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
};
- |
can@40000000 {
compatible = "xlnx,axi-can-1.00.a";
reg = <0x40000000 0x10000>;
clocks = <&clkc 0>, <&clkc 1>;
clock-names = "can_clk", "s_axi_aclk";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
xlnx,has-ecc;
};
- |
can@40000000 {
compatible = "xlnx,canfd-1.0";
reg = <0x40000000 0x2000>;
clocks = <&clkc 0>, <&clkc 1>;
clock-names = "can_clk", "s_axi_aclk";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
tx-mailbox-count = <0x20>;
rx-fifo-depth = <0x20>;
};
- |
can@ff060000 {
compatible = "xlnx,canfd-2.0";
reg = <0xff060000 0x6000>;
clocks = <&clkc 0>, <&clkc 1>;
clock-names = "can_clk", "s_axi_aclk";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
tx-mailbox-count = <0x20>;
rx-fifo-depth = <0x40>;
};