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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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linux-7.2.3/arch/arm64/boot/dts/apple/Makefile
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j71.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j73.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j85m.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j86m.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j87m.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-n53.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j72.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j85.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j86.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j87.dtb
dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-n51.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-j42d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-j96.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-j97.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-n102.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-n56.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7000-n61.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7001-j81.dtb
dtb-$(CONFIG_ARCH_APPLE) += t7001-j82.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8000-j71s.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8000-j72s.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8000-n66.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8000-n69u.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8000-n71.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8003-j71t.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8003-j72t.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8003-n66m.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8003-n69.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8003-n71m.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8001-j127.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8001-j128.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8001-j98a.dtb
dtb-$(CONFIG_ARCH_APPLE) += s8001-j99a.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-d101.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-d10.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-d111.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-d11.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-j171.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-j172.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-j71b.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-j72b.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8010-n112.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j105a.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j120.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j121.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j207.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j208.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j132.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j137.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j140a.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j140k.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j152f.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j160.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j174.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j185.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j185f.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j213.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j215.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j223.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j230k.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j214k.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j680.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8012-j780.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d201.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d20.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d211.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d21.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d221.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d22.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j456.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j457.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6000-j314s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j314c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6022-j180d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6020-j414s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6021-j414c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6020-j416s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6021-j416c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6020-j474s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6021-j475c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6022-j475d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8112-j415.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8122-j433.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8122-j434.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8122-j504.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8122-j613.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8122-j615.dtb
linux-7.2.3/arch/arm64/boot/dts/apple/multi-die-cpp.h
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/* SPDX-License-Identifier: GPL-2.0+ OR MIT
*
* C preprocessor macros for t600x multi die support.
*/
#ifndef __DTS_APPLE_MULTI_DIE_CPP_H
#define __DTS_APPLE_MULTI_DIE_CPP_H
#ifndef __stringify
#define __stringify_1(x...) #x
#define __stringify(x...) __stringify_1(x)
#endif
#ifndef __concat
#define __concat_1(x, y...) x ## y
#define __concat(x, y...) __concat_1(x, y)
#endif
#define DIE_NODE(a) __concat(a, DIE)
#define DIE_LABEL(a) __stringify(__concat(a, DIE))
#endif /* !__DTS_APPLE_MULTI_DIE_CPP_H */
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 5s common device tree
* Based on A7 (APL0698), up to 1.3GHz
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s5l8960x.dtsi"
#include "s5l8960x-common.dtsi"
#include "s5l8960x-opp.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "handset";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl 16 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&dwi_bl {
status = "okay";
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Air common device tree
* Based on A7 (APL5698), up to 1.4GHz
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s5l8960x.dtsi"
#include "s5l8960x-common.dtsi"
#include "s5l8965x-opp.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl 110 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_dp>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-common.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 5s, iPad mini 2/3, iPad Air
*
* This file contains parts common to all Apple A7 devices.
*
* target-type: J71, J72, J73, J85, J85m, J86, J86m, J87, J87m, N51, N53
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
aliases {
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j71.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Air (Wi-Fi), J71, iPad4,1 (A1474)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-air1.dtsi"
/ {
compatible = "apple,j71", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad Air (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j72.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Air (Cellular), J72, iPad4,2 (A1475)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-air1.dtsi"
/ {
compatible = "apple,j72", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad Air (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j73.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Air (Cellular, China), J73, iPad4,2 (A1476)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-air1.dtsi"
/ {
compatible = "apple,j73", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad Air (Cellular, China)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j85.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 2 (Wi-Fi), J85, iPad4,4 (A1489)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini2.dtsi"
/ {
compatible = "apple,j85", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 2 (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 3 (Wi-Fi), J85m, iPad4,7 (A1599)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini3.dtsi"
/ {
compatible = "apple,j85m", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 3 (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j86.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 2 (Cellular), J86, iPad4,5 (A1490)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini2.dtsi"
/ {
compatible = "apple,j86", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 2 (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 3 (Cellular), J86m, iPad4,8 (A1600)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini3.dtsi"
/ {
compatible = "apple,j86m", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 3 (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j87.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 2 (Cellular, China), J87, iPad4,6 (A1491)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini2.dtsi"
/ {
compatible = "apple,j87", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 2 (Cellular, China)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 3 (Cellular, China), J87m, iPad4,9 (A1601)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-mini3.dtsi"
/ {
compatible = "apple,j87m", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPad mini 3 (Cellular, China)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 2 common device tree
* Based on A7 (APL0698), up to 1.3GHz
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s5l8960x.dtsi"
#include "s5l8960x-common.dtsi"
#include "s5l8960x-opp.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_dp>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 3 common device tree
* Based on A7 (APL0698), up to 1.3GHz
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/*
* The Mini 3 seems to be only an iteration over the Mini 2 with some
* small changes, like the introduction of Touch ID, hence there is little
* to no differentiation between these 2 for now.
*/
#include "s5l8960x-mini2.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-n51.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 5s (GSM), N51, iPhone6,1 (A1453/A1533)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-5s.dtsi"
/ {
compatible = "apple,n51", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPhone 5s (GSM)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-n53.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 5s (LTE), N53, iPhone6,2 (A1457/A1518/A1528/A1530)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s5l8960x-5s.dtsi"
/ {
compatible = "apple,n53", "apple,s5l8960x", "apple,arm-platform";
model = "Apple iPhone 5s (LTE)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Operating points for Apple S5L8960X "A7" SoC, Up to 1296 MHz
*
* target-type: N51, N53, J85, J86. J87, J85m, J86m, J87m
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
cyclone_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <15500>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <43000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <26000>;
};
opp04 {
opp-hz = /bits/ 64 <840000000>;
opp-level = <4>;
clock-latency-ns = <30000>;
};
opp05 {
opp-hz = /bits/ 64 <1128000000>;
opp-level = <5>;
clock-latency-ns = <39500>;
};
opp06 {
opp-hz = /bits/ 64 <1296000000>;
opp-level = <6>;
clock-latency-ns = <45500>;
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* PMGR Power domains for the Apple S5L8960X "A7" SoC
*
* Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
*/
&pmgr {
ps_cpu0: power-controller@20000 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu0";
apple,always-on; /* Core device */
};
ps_cpu1: power-controller@20008 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu1";
apple,always-on; /* Core device */
};
ps_secuart0: power-controller@200f0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "secuart0";
power-domains = <&ps_sio_p>;
};
ps_secuart1: power-controller@200f8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "secuart1";
power-domains = <&ps_sio_p>;
};
ps_cpm: power-controller@20010 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpm";
apple,always-on; /* Core device */
};
ps_lio: power-controller@20018 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20018 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "lio";
apple,always-on; /* Core device */
};
ps_iomux: power-controller@20020 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20020 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "iomux";
apple,always-on; /* Core device */
};
ps_aic: power-controller@20028 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20028 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aic";
apple,always-on; /* Core device */
};
ps_debug: power-controller@20030 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20030 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "debug";
};
ps_dwi: power-controller@20038 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20038 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dwi";
};
ps_gpio: power-controller@20040 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gpio";
};
ps_mca0: power-controller@20048 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20048 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca0";
power-domains = <&ps_sio_p>;
};
ps_mca1: power-controller@20050 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20050 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca1";
power-domains = <&ps_sio_p>;
};
ps_mca2: power-controller@20058 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20058 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca2";
power-domains = <&ps_sio_p>;
};
ps_mca3: power-controller@20060 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20060 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca3";
power-domains = <&ps_sio_p>;
};
ps_mca4: power-controller@20068 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20068 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca4";
power-domains = <&ps_sio_p>;
};
ps_pwm0: power-controller@20070 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20070 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pwm0";
power-domains = <&ps_sio_p>;
};
ps_i2c0: power-controller@20078 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20078 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c0";
power-domains = <&ps_sio_p>;
};
ps_i2c1: power-controller@20080 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20080 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c1";
power-domains = <&ps_sio_p>;
};
ps_i2c2: power-controller@20088 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20088 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c2";
power-domains = <&ps_sio_p>;
};
ps_i2c3: power-controller@20090 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20090 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c3";
power-domains = <&ps_sio_p>;
};
ps_spi0: power-controller@20098 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20098 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi0";
power-domains = <&ps_sio_p>;
};
ps_spi1: power-controller@200a0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi1";
power-domains = <&ps_sio_p>;
};
ps_spi2: power-controller@200a8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi2";
power-domains = <&ps_sio_p>;
};
ps_spi3: power-controller@200b0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi3";
power-domains = <&ps_sio_p>;
};
ps_uart0: power-controller@200b8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart0";
power-domains = <&ps_sio_p>;
};
ps_uart1: power-controller@200c0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart1";
power-domains = <&ps_sio_p>;
};
ps_uart2: power-controller@200c8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart2";
power-domains = <&ps_sio_p>;
};
ps_uart3: power-controller@200d0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart3";
power-domains = <&ps_sio_p>;
};
ps_uart4: power-controller@200d8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart4";
power-domains = <&ps_sio_p>;
};
ps_uart5: power-controller@200e0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart5";
power-domains = <&ps_sio_p>;
};
ps_uart6: power-controller@200e8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart6";
power-domains = <&ps_sio_p>;
};
ps_sio_p: power-controller@20110 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20110 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_p";
};
ps_usb: power-controller@20158 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20158 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb";
};
ps_usbctrl: power-controller@20160 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20160 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbctrl";
power-domains = <&ps_usb>;
};
ps_usb2host0: power-controller@20170 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20170 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0";
power-domains = <&ps_usbctrl>;
};
ps_usb2host1: power-controller@20180 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20180 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1";
power-domains = <&ps_usbctrl>;
};
ps_disp_busmux: power-controller@201a8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp_busmux";
};
ps_media: power-controller@201d8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "media";
};
ps_isp: power-controller@201d0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp";
};
ps_msr: power-controller@201e0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "msr";
power-domains = <&ps_media>;
};
ps_jpg: power-controller@201e8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "jpg";
power-domains = <&ps_media>;
};
ps_disp0: power-controller@201b0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp0";
power-domains = <&ps_disp_busmux>;
};
ps_aes0: power-controller@20100 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20100 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aes0";
power-domains = <&ps_sio_p>;
};
ps_sio: power-controller@20108 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20108 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio";
power-domains = <&ps_sio_p>;
apple,always-on; /* Core device */
};
ps_hsic0_phy: power-controller@20118 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20118 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic0_phy";
power-domains = <&ps_usb2host0>;
};
ps_hsic1_phy: power-controller@20120 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20120 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic1_phy";
power-domains = <&ps_usb2host0>;
};
ps_hsic2_phy: power-controller@20128 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20128 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic2_phy";
power-domains = <&ps_usb2host1>;
};
ps_ispsens0: power-controller@20130 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20130 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ispsens0";
};
ps_ispsens1: power-controller@20138 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20138 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ispsens1";
};
ps_mcc: power-controller@20140 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20140 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcc";
apple,always-on; /* Core device */
};
ps_mcu: power-controller@20148 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20148 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcu";
apple,always-on; /* Core device */
};
ps_amp: power-controller@20150 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20150 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "amp";
apple,always-on; /* Core device */
};
ps_usb2host0_ohci: power-controller@20168 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20168 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0_ohci";
power-domains = <&ps_usb2host0>;
};
ps_usb2host1_ohci: power-controller@20178 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20178 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1_ohci";
power-domains = <&ps_usb2host1>;
};
ps_usbotg: power-controller@20188 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20188 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbotg";
power-domains = <&ps_usbctrl>;
};
ps_smx: power-controller@20190 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20190 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "smx";
apple,always-on; /* Apple fabric, critical block */
};
ps_sf: power-controller@20198 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20198 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sf";
apple,always-on; /* Apple fabric, critical block */
};
ps_cp: power-controller@201a0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cp";
apple,always-on; /* Core device */
};
ps_mipi_dsi: power-controller@201b8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mipi_dsi";
power-domains = <&ps_disp_busmux>;
};
ps_dp: power-controller@201c0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dp";
power-domains = <&ps_disp0>;
};
ps_disp1: power-controller@201c8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp1";
power-domains = <&ps_disp_busmux>;
};
ps_vdec: power-controller@201f0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "vdec";
power-domains = <&ps_media>;
};
ps_venc: power-controller@201f8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc";
power-domains = <&ps_media>;
};
ps_ans: power-controller@20200 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20200 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ans";
};
ps_ans_dll: power-controller@20208 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20208 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ans_dll";
power-domains = <&ps_ans>;
};
ps_gfx: power-controller@20218 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20218 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gfx";
};
ps_sep: power-controller@20268 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20268 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sep";
power-domains = <&ps_secuart1>, <&ps_secuart0>;
apple,always-on; /* Locked on */
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8960x.dtsi
+232
View File
@@ -0,0 +1,232 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S5L8960X "A7" SoC
*
* Other Names: H6, "Alcatraz"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
* Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "apple,cyclone";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&cyclone_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
compatible = "apple,cyclone";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled by loader */
operating-points-v2 = <&cyclone_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x100000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,s5l8960x-cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0a0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0a0000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 140 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
i2c0: i2c@20a110000 {
compatible = "apple,s5l8960x-i2c", "apple,i2c";
reg = <0x2 0x0a110000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 154 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@20a111000 {
compatible = "apple,s5l8960x-i2c", "apple,i2c";
reg = <0x2 0x0a111000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 155 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@20a112000 {
compatible = "apple,s5l8960x-i2c", "apple,i2c";
reg = <0x2 0x0a112000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 156 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@20a113000 {
compatible = "apple,s5l8960x-i2c", "apple,i2c";
reg = <0x2 0x0a113000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 157 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pmgr: power-management@20e000000 {
compatible = "apple,s5l8960x-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0xe000000 0 0x24000>;
};
wdt: watchdog@20e027000 {
compatible = "apple,s5l8960x-wdt", "apple,wdt";
reg = <0x2 0x0e027000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
};
aic: interrupt-controller@20e100000 {
compatible = "apple,s5l8960x-aic", "apple,aic";
reg = <0x2 0x0e100000 0x0 0x100000>;
#interrupt-cells = <3>;
interrupt-controller;
power-domains = <&ps_aic>;
};
dwi_bl: backlight@20e200010 {
compatible = "apple,s5l8960x-dwi-bl", "apple,dwi-bl";
reg = <0x2 0x0e200010 0x0 0x8>;
power-domains = <&ps_dwi>;
status = "disabled";
};
pinctrl: pinctrl@20e300000 {
compatible = "apple,s5l8960x-pinctrl", "apple,pinctrl";
reg = <0x2 0x0e300000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 0 200>;
apple,npins = <200>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 108 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 109 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 110 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 111 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 112 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 113 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 114 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(81, 1)>,
<APPLE_PINMUX(80, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(83, 1)>,
<APPLE_PINMUX(82, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(101, 1)>,
<APPLE_PINMUX(100, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(172, 1)>,
<APPLE_PINMUX(171, 1)>;
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A7 doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "s5l8960x-pmgr.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Operating points for Apple S5L8965X "A7" Rev A SoC, Up to 1392 MHz
*
* target-type: J71, J72, J73
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
cyclone_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <10000>;
};
opp02 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <2>;
clock-latency-ns = <49000>;
};
opp03 {
opp-hz = /bits/ 64 <840000000>;
opp-level = <3>;
clock-latency-ns = <30000>;
};
opp04 {
opp-hz = /bits/ 64 <1128000000>;
opp-level = <4>;
clock-latency-ns = <39500>;
};
opp05 {
opp-hz = /bits/ 64 <1296000000>;
opp-level = <5>;
clock-latency-ns = <45500>;
};
opp06 {
opp-hz = /bits/ 64 <1392000000>;
opp-level = <6>;
clock-latency-ns = <46500>;
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s800-0-3-common.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s, iPhone 6s Plus, iPad 5, iPhone SE
*
* This file contains parts common to all Apple A9 devices.
*
* target-type: J71s, J72s, N66, N69u, N71, J71t, J72t, N66m, N69, N71m
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
aliases {
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
&dwi_bl {
status = "okay";
};
&serial0 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* PMGR Power domains for the Apple S8000/3 "A9" SoC
*
* Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
*/
&pmgr {
ps_cpu0: power-controller@80000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu0";
apple,always-on; /* Core device */
};
ps_cpu1: power-controller@80008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu1";
apple,always-on; /* Core device */
};
ps_cpm: power-controller@80040 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpm";
apple,always-on; /* Core device */
};
ps_sio_busif: power-controller@80150 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80150 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_busif";
};
ps_sio_p: power-controller@80158 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80158 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_p";
power-domains = <&ps_sio_busif>;
};
ps_sbr: power-controller@80100 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80100 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sbr";
apple,always-on; /* Apple fabric, critical block */
};
ps_aic: power-controller@80108 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80108 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aic";
apple,always-on; /* Core device */
};
ps_dwi: power-controller@80110 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80110 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dwi";
};
ps_gpio: power-controller@80118 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80118 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gpio";
};
ps_pms: power-controller@80120 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80120 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pms";
apple,always-on; /* Core device */
};
ps_pcie_ref: power-controller@80148 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80148 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_ref";
};
ps_mca0: power-controller@80168 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80168 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca0";
power-domains = <&ps_sio_p>;
};
ps_mca1: power-controller@80170 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80170 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca1";
power-domains = <&ps_sio_p>;
};
ps_mca2: power-controller@80178 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80178 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca2";
power-domains = <&ps_sio_p>;
};
ps_mca3: power-controller@80180 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80180 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca3";
power-domains = <&ps_sio_p>;
};
ps_mca4: power-controller@80188 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80188 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca4";
power-domains = <&ps_sio_p>;
};
ps_pwm0: power-controller@80190 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80190 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pwm0";
power-domains = <&ps_sio_p>;
};
ps_i2c0: power-controller@80198 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80198 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c0";
power-domains = <&ps_sio_p>;
};
ps_i2c1: power-controller@801a0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c1";
power-domains = <&ps_sio_p>;
};
ps_i2c2: power-controller@801a8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c2";
power-domains = <&ps_sio_p>;
};
ps_i2c3: power-controller@801b0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c3";
power-domains = <&ps_sio_p>;
};
ps_spi0: power-controller@801b8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi0";
power-domains = <&ps_sio_p>;
};
ps_spi1: power-controller@801c0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi1";
power-domains = <&ps_sio_p>;
};
ps_spi2: power-controller@801c8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi2";
power-domains = <&ps_sio_p>;
};
ps_spi3: power-controller@801d0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi3";
power-domains = <&ps_sio_p>;
};
ps_uart0: power-controller@801d8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart0";
power-domains = <&ps_sio_p>;
};
ps_uart1: power-controller@801e0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart1";
power-domains = <&ps_sio_p>;
};
ps_uart2: power-controller@801e8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart2";
power-domains = <&ps_sio_p>;
};
ps_uart3: power-controller@801f0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart3";
power-domains = <&ps_sio_p>;
};
ps_uart4: power-controller@801f8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart4";
power-domains = <&ps_sio_p>;
};
ps_sio: power-controller@80160 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80160 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio";
power-domains = <&ps_sio_p>;
apple,always-on; /* Core device */
};
ps_hsic0_phy: power-controller@80128 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80128 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic0_phy";
power-domains = <&ps_usb2host1>;
};
ps_hsic1_phy: power-controller@80130 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80130 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic1_phy";
power-domains = <&ps_usb2host2>;
};
ps_isp_sens0: power-controller@80138 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80138 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp_sens0";
};
ps_isp_sens1: power-controller@80140 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80140 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp_sens1";
};
ps_usb: power-controller@80250 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80250 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb";
};
ps_usbctrl: power-controller@80258 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80258 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbctrl";
power-domains = <&ps_usb>;
};
ps_usb2host0: power-controller@80260 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80260 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0";
power-domains = <&ps_usbctrl>;
};
ps_usb2host1: power-controller@80270 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80270 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1";
power-domains = <&ps_usbctrl>;
};
ps_usb2host2: power-controller@80280 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80280 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host2";
power-domains = <&ps_usbctrl>;
};
ps_rtmux: power-controller@802a8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "rtmux";
};
ps_media: power-controller@802d0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "media";
};
ps_isp: power-controller@802c8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp";
power-domains = <&ps_rtmux>;
};
ps_msr: power-controller@802e0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "msr";
power-domains = <&ps_media>;
};
ps_jpg: power-controller@802d8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "jpg";
power-domains = <&ps_media>;
};
ps_disp0: power-controller@802b0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp0";
power-domains = <&ps_rtmux>;
};
ps_pmp: power-controller@802e8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pmp";
};
ps_pms_sram: power-controller@802f0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pms_sram";
};
ps_uart5: power-controller@80200 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80200 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart5";
power-domains = <&ps_sio_p>;
};
ps_uart6: power-controller@80208 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80208 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart6";
power-domains = <&ps_sio_p>;
};
ps_uart7: power-controller@80210 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80210 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart7";
power-domains = <&ps_sio_p>;
};
ps_uart8: power-controller@80218 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80218 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart8";
power-domains = <&ps_sio_p>;
};
ps_aes0: power-controller@80220 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80220 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aes0";
power-domains = <&ps_sio_p>;
};
ps_mcc: power-controller@80228 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80228 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcc";
apple,always-on; /* Memory cache controller */
};
ps_dcs0: power-controller@80230 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80230 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs0";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs1: power-controller@80238 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80238 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs1";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs2: power-controller@80240 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80240 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs2";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs3: power-controller@80248 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80248 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs3";
apple,always-on; /* LPDDR4 interface */
};
ps_usb2host0_ohci: power-controller@80268 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80268 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0_ohci";
power-domains = <&ps_usb2host0>;
};
ps_usb2host1_ohci: power-controller@80278 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80278 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1_ohci";
power-domains = <&ps_usb2host1>;
};
ps_usb2host2_ohci: power-controller@80288 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80288 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host2_ohci";
power-domains = <&ps_usb2host2>;
};
ps_usbotg: power-controller@80290 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80290 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbotg";
power-domains = <&ps_usbctrl>;
};
ps_smx: power-controller@80298 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80298 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "smx";
apple,always-on; /* Apple fabric, critical block */
};
ps_sf: power-controller@802a0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sf";
apple,always-on; /* Apple fabric, critical block */
};
ps_mipi_dsi: power-controller@802b8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mipi_dsi";
power-domains = <&ps_rtmux>;
};
ps_dp: power-controller@802c0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dp";
power-domains = <&ps_disp0>;
};
ps_vdec: power-controller@802f8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "vdec";
power-domains = <&ps_media>;
};
ps_venc: power-controller@80308 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80308 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc";
power-domains = <&ps_media>;
};
ps_pcie: power-controller@80310 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80310 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie";
};
ps_pcie_aux: power-controller@80318 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80318 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_aux";
};
ps_pcie_link0: power-controller@80320 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80320 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link0";
power-domains = <&ps_pcie>;
};
ps_pcie_link1: power-controller@80328 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80328 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link1";
power-domains = <&ps_pcie>;
};
ps_pcie_link2: power-controller@80330 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80330 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link2";
power-domains = <&ps_pcie>;
};
ps_pcie_link3: power-controller@80338 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80338 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link3";
power-domains = <&ps_pcie>;
};
ps_gfx: power-controller@80340 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80340 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gfx";
};
ps_sep: power-controller@80400 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80400 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sep";
apple,always-on; /* Locked on */
};
ps_venc_pipe: power-controller@88000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_pipe";
power-domains = <&ps_venc>;
};
ps_venc_me0: power-controller@88008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me0";
};
ps_venc_me1: power-controller@88010 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me1";
};
};
&pmgr_mini {
ps_aop: power-controller@80000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop";
power-domains = <&ps_aop_busif &ps_aop_cpu &ps_aop_filter>;
apple,always-on; /* Always on processor */
};
ps_debug: power-controller@80008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "debug";
};
ps_aop_gpio: power-controller@80010 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_gpio";
power-domains = <&ps_aop>;
};
ps_aop_cpu: power-controller@80040 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_cpu";
};
ps_aop_filter: power-controller@80048 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80048 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_filter";
};
ps_aop_busif: power-controller@80050 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80050 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_busif";
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s800-0-3.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8000/S8003 "A9" SoC
*
* This file contains parts common to both variants of A9
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "apple,twister";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
compatible = "apple,twister";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x300000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
i2c0: i2c@20a110000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a110000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 206 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@20a111000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a111000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 207 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@20a112000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a112000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 208 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pmgr: power-management@20e000000 {
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0xe000000 0 0x8c000>;
};
aic: interrupt-controller@20e100000 {
compatible = "apple,s8000-aic", "apple,aic";
reg = <0x2 0x0e100000 0x0 0x100000>;
#interrupt-cells = <3>;
interrupt-controller;
power-domains = <&ps_aic>;
};
dwi_bl: backlight@20e200080 {
compatible = "apple,s8000-dwi-bl", "apple,dwi-bl";
reg = <0x2 0x0e200080 0x0 0x8>;
power-domains = <&ps_dwi>;
status = "disabled";
};
pinctrl_ap: pinctrl@20f100000 {
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
reg = <0x2 0x0f100000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_ap 0 0 208>;
apple,npins = <208>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(46, 1)>,
<APPLE_PINMUX(45, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(115, 1)>,
<APPLE_PINMUX(114, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(23, 1)>,
<APPLE_PINMUX(22, 1)>;
};
};
pinctrl_aop: pinctrl@2100f0000 {
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
reg = <0x2 0x100f0000 0x0 0x100000>;
power-domains = <&ps_aop_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 42>;
apple,npins = <42>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 113 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 114 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 115 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 116 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 117 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 118 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 119 IRQ_TYPE_LEVEL_HIGH>;
};
pmgr_mini: power-management@210200000 {
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x10200000 0 0x84000>;
};
wdt: watchdog@2102b0000 {
compatible = "apple,s8000-wdt", "apple,wdt";
reg = <0x2 0x102b0000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A9 doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "s800-0-3-pmgr.dtsi"
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
* the S8003 (APL1022) on 16nm. There are some minor differences
* such as timing in cpufreq state transistions.
*/
linux-7.2.3/arch/arm64/boot/dts/apple/s8000-j71s.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad 5 (Wi-Fi) (Samsung), J71s, iPad6,11 (A1822)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8000.dtsi"
#include "s800x-ipad5.dtsi"
/ {
compatible = "apple,j71s", "apple,s8000", "apple,arm-platform";
model = "Apple iPad 5 (Wi-Fi) (Samsung)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8000-j72s.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad 5 (Cellular) (Samsung), J72s, iPad6,12 (A1823)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8000.dtsi"
#include "s800x-ipad5.dtsi"
/ {
compatible = "apple,j72s", "apple,s8000", "apple,arm-platform";
model = "Apple iPad 5 (Cellular) (Samsung)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8000-n66.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s Plus (Samsung), N66, iPhone8,2 (A1634/A1687/A1690/A1699)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8000.dtsi"
#include "s800x-6s.dtsi"
/ {
compatible = "apple,n66", "apple,s8000", "apple,arm-platform";
model = "Apple iPhone 6s Plus (Samsung)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8000-n69u.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone SE (Samsung), N69u, iPhone8,4 (A1662/A1723/A1724)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8000.dtsi"
#include "s800x-se.dtsi"
/ {
compatible = "apple,n69u", "apple,s8000", "apple,arm-platform";
model = "Apple iPhone SE (Samsung)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8000-n71.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s (Samsung), N71, iPhone8,1 (A1633/A1688/A1691/A1700)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8000.dtsi"
#include "s800x-6s.dtsi"
/ {
compatible = "apple,n71", "apple,s8000", "apple,arm-platform";
model = "Apple iPhone 6s (Samsung)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8000.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8000 "A9" (Samsung) SoC
*
* Other names: H8P, "Maui"
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <650>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <75000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <27000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <32000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <35000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <45000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <58000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <58000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
* the S8003 (APL1022) on 16nm. There are some minor differences
* such as timing in cpufreq state transistions.
*/
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-common.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (9.7-inch), iPad Pro (12.9-inch)
*
* This file contains parts common to all Apple A9X devices.
*
* target-type: J127, J128, J98a, J99a
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
aliases {
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
power-domains = <&ps_disp0 &ps_dp0>;
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-j127.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (9.7-inch) (Wi-Fi), J127, iPad6,3 (A1673)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8001-pro.dtsi"
/ {
compatible = "apple,j127", "apple,s8001", "apple,arm-platform";
model = "Apple iPad Pro (9.7-inch) (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-j128.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (9.7-inch) (Cellular), J128, iPad6,4 (A1674/A1675)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8001-pro.dtsi"
/ {
compatible = "apple,j128", "apple,s8001", "apple,arm-platform";
model = "Apple iPad Pro (9.7-inch) (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (12.9-inch)
*
* This file contains parts common to iPad Pro (12.9-inch).
*
* target-type: J98a, J99a
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
&dwi_bl {
status = "okay";
};
&ps_dcs4 {
apple,always-on; /* LPDDR4 interface */
};
&ps_dcs5 {
apple,always-on; /* LPDDR4 interface */
};
&ps_dcs6 {
apple,always-on; /* LPDDR4 interface */
};
&ps_dcs7 {
apple,always-on; /* LPDDR4 interface */
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-j98a.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (12.9-inch) (Wi-Fi), J98a, iPad6,7 (A1584)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8001-pro.dtsi"
#include "s8001-j98a-j99a.dtsi"
/ {
compatible = "apple,j98a", "apple,s8001", "apple,arm-platform";
model = "Apple iPad Pro (12.9-inch) (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-j99a.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (12.9-inch) (Cellular), J99a, iPad6,8 (A1652)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8001-pro.dtsi"
#include "s8001-j98a-j99a.dtsi"
/ {
compatible = "apple,j99a", "apple,s8001", "apple,arm-platform";
model = "Apple iPad Pro (12.9-inch) (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-pmgr.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* PMGR Power domains for the Apple S8001 "A9X" SoC
*
* Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
*/
&pmgr {
ps_cpu0: power-controller@80000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu0";
apple,always-on; /* Core device */
};
ps_cpu1: power-controller@80008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu1";
apple,always-on; /* Core device */
};
ps_cpm: power-controller@80040 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpm";
apple,always-on; /* Core device */
};
ps_sio_busif: power-controller@80148 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80148 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_busif";
};
ps_sio_p: power-controller@80150 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80150 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_p";
power-domains = <&ps_sio_busif>;
};
ps_sbr: power-controller@80100 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80100 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sbr";
apple,always-on; /* Apple fabric, critical block */
};
ps_aic: power-controller@80108 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80108 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aic";
apple,always-on; /* Core device */
};
ps_dwi: power-controller@80110 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80110 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dwi";
};
ps_gpio: power-controller@80118 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80118 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gpio";
};
ps_pcie_ref: power-controller@80140 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80140 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_ref";
};
ps_mca0: power-controller@80160 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80160 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca0";
power-domains = <&ps_sio_p>;
};
ps_mca1: power-controller@80168 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80168 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca1";
power-domains = <&ps_sio_p>;
};
ps_mca2: power-controller@80170 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80170 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca2";
power-domains = <&ps_sio_p>;
};
ps_mca3: power-controller@80178 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80178 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca3";
power-domains = <&ps_sio_p>;
};
ps_mca4: power-controller@80180 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80180 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca4";
power-domains = <&ps_sio_p>;
};
ps_pwm0: power-controller@80188 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80188 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pwm0";
power-domains = <&ps_sio_p>;
};
ps_i2c0: power-controller@80190 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80190 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c0";
power-domains = <&ps_sio_p>;
};
ps_i2c1: power-controller@80198 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80198 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c1";
power-domains = <&ps_sio_p>;
};
ps_i2c2: power-controller@801a0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c2";
power-domains = <&ps_sio_p>;
};
ps_i2c3: power-controller@801a8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c3";
power-domains = <&ps_sio_p>;
};
ps_spi0: power-controller@801b0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi0";
power-domains = <&ps_sio_p>;
};
ps_spi1: power-controller@801b8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi1";
power-domains = <&ps_sio_p>;
};
ps_spi2: power-controller@801c0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi2";
power-domains = <&ps_sio_p>;
};
ps_spi3: power-controller@801c8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi3";
power-domains = <&ps_sio_p>;
};
ps_uart0: power-controller@801d0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart0";
power-domains = <&ps_sio_p>;
};
ps_uart1: power-controller@801d8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart1";
power-domains = <&ps_sio_p>;
};
ps_uart2: power-controller@801e0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart2";
power-domains = <&ps_sio_p>;
};
ps_uart3: power-controller@801e8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart3";
power-domains = <&ps_sio_p>;
};
ps_uart4: power-controller@801f0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart4";
power-domains = <&ps_sio_p>;
};
ps_uart5: power-controller@801f8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x801f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart5";
power-domains = <&ps_sio_p>;
};
ps_sio: power-controller@80158 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80158 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio";
power-domains = <&ps_sio_p>;
apple,always-on; /* Core device */
};
ps_hsic0_phy: power-controller@80128 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80128 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic0_phy";
power-domains = <&ps_usb2host1>;
};
ps_isp_sens0: power-controller@80130 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80130 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp_sens0";
};
ps_isp_sens1: power-controller@80138 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80138 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp_sens1";
};
ps_pms: power-controller@80120 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80120 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pms";
apple,always-on; /* Core device */
};
ps_usb: power-controller@80278 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80278 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb";
};
ps_usbctrl: power-controller@80280 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80280 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbctrl";
power-domains = <&ps_usb>;
};
ps_usb2host0: power-controller@80288 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80288 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0";
power-domains = <&ps_usbctrl>;
};
ps_usb2host1: power-controller@80298 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80298 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1";
power-domains = <&ps_usbctrl>;
};
ps_usb2host2: power-controller@802a8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host2";
power-domains = <&ps_usbctrl>;
};
ps_rtmux: power-controller@802d0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "rtmux";
apple,always-on; /* Core device */
};
ps_disp1mux: power-controller@802e8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp1mux";
};
ps_disp0: power-controller@802d8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp0";
power-domains = <&ps_rtmux>;
};
ps_disp1: power-controller@802f0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp1";
power-domains = <&ps_disp1mux>;
};
ps_uart6: power-controller@80200 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80200 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart6";
power-domains = <&ps_sio_p>;
};
ps_uart7: power-controller@80208 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80208 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart7";
power-domains = <&ps_sio_p>;
};
ps_uart8: power-controller@80210 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80210 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart8";
power-domains = <&ps_sio_p>;
};
ps_aes0: power-controller@80218 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80218 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aes0";
power-domains = <&ps_sio_p>;
};
ps_mcc: power-controller@80230 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80230 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcc";
apple,always-on; /* Memory cache controller */
};
ps_dcs0: power-controller@80238 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80238 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs0";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs1: power-controller@80240 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80240 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs1";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs2: power-controller@80248 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80248 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs2";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs3: power-controller@80250 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80250 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs3";
apple,always-on; /* LPDDR4 interface */
};
ps_dcs4: power-controller@80258 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80258 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs4";
};
ps_dcs5: power-controller@80260 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80260 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs5";
};
ps_dcs6: power-controller@80268 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80268 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs6";
};
ps_dcs7: power-controller@80270 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80270 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dcs7";
};
ps_usb2host0_ohci: power-controller@80290 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80290 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0_ohci";
power-domains = <&ps_usb2host0>;
};
ps_usbotg: power-controller@802b8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbotg";
power-domains = <&ps_usbctrl>;
};
ps_smx: power-controller@802c0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "smx";
apple,always-on; /* Apple fabric, critical block */
};
ps_sf: power-controller@802c8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sf";
apple,always-on; /* Apple fabric, critical block */
};
ps_dp0: power-controller@802e0 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dp0";
power-domains = <&ps_disp0>;
};
ps_dp1: power-controller@802f8 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x802f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dp1";
power-domains = <&ps_disp1>;
};
ps_dpa0: power-controller@80220 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80220 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dpa0";
};
ps_dpa1: power-controller@80228 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80228 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dpa1";
};
ps_media: power-controller@80308 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80308 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "media";
};
ps_isp: power-controller@80300 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80300 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp";
power-domains = <&ps_rtmux>;
};
ps_msr: power-controller@80318 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80318 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "msr";
power-domains = <&ps_media>;
};
ps_jpg: power-controller@80310 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80310 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "jpg";
power-domains = <&ps_media>;
};
ps_venc: power-controller@80340 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80340 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc";
power-domains = <&ps_media>;
};
ps_pcie: power-controller@80348 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80348 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie";
};
ps_srs: power-controller@80390 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80390 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "srs";
power-domains = <&ps_media>;
};
ps_pcie_aux: power-controller@80350 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80350 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_aux";
};
ps_pcie_link0: power-controller@80358 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80358 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link0";
power-domains = <&ps_pcie>;
};
ps_pcie_link1: power-controller@80360 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80360 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link1";
power-domains = <&ps_pcie>;
};
ps_pcie_link2: power-controller@80368 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80368 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link2";
power-domains = <&ps_pcie>;
};
ps_pcie_link3: power-controller@80370 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80370 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link3";
power-domains = <&ps_pcie>;
};
ps_pcie_link4: power-controller@80378 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80378 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link4";
power-domains = <&ps_pcie>;
};
ps_pcie_link5: power-controller@80380 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80380 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_link5";
power-domains = <&ps_pcie>;
};
ps_vdec: power-controller@80330 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80330 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "vdec";
power-domains = <&ps_media>;
};
ps_gfx: power-controller@80388 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80388 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gfx";
};
ps_pmp: power-controller@80320 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80320 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pmp";
};
ps_pms_sram: power-controller@80328 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80328 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pms_sram";
};
ps_sep: power-controller@80400 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80400 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sep";
apple,always-on; /* Locked on*/
};
ps_venc_pipe: power-controller@88000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_pipe";
power-domains = <&ps_venc>;
};
ps_venc_me0: power-controller@88008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me0";
};
ps_venc_me1: power-controller@88010 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x88010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me1";
};
};
&pmgr_mini {
ps_aop: power-controller@80000 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop";
power-domains = <&ps_aop_cpu &ps_aop_filter &ps_aop_busif>;
apple,always-on; /* Always on processor */
};
ps_debug: power-controller@80008 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "debug";
};
ps_aop_gpio: power-controller@80010 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_gpio";
};
ps_aop_cpu: power-controller@80040 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_cpu";
};
ps_aop_filter: power-controller@80048 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80048 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_filter";
};
ps_aop_busif: power-controller@80050 {
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x80050 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_busif";
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001-pro.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Pro (1st generation) common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s8001.dtsi"
#include "s8001-common.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl_ap 122 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl_ap 123 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl_ap 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl_ap 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8001.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8001 "A9X" SoC
*
* Other names: H8G, "Elba"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "apple,twister";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
compatible = "apple,twister";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
operating-points-v2 = <&twister_opp>;
performance-domains = <&cpufreq>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x300000>;
};
};
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <800>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <53000>;
};
opp03 {
opp-hz = /bits/ 64 <792000000>;
opp-level = <3>;
clock-latency-ns = <18000>;
};
opp04 {
opp-hz = /bits/ 64 <1080000000>;
opp-level = <4>;
clock-latency-ns = <21000>;
};
opp05 {
opp-hz = /bits/ 64 <1440000000>;
opp-level = <5>;
clock-latency-ns = <25000>;
};
opp06 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <6>;
clock-latency-ns = <33000>;
};
opp07 {
opp-hz = /bits/ 64 <2160000000>;
opp-level = <7>;
clock-latency-ns = <45000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <2160000000>;
opp-level = <8>;
clock-latency-ns = <45000>;
turbo-mode;
};
#endif
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 218 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
i2c0: i2c@20a110000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a110000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 232 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@20a111000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a111000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 233 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@20a112000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a112000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 234 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@20a113000 {
compatible = "apple,s8000-i2c", "apple,i2c";
reg = <0x2 0x0a113000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 235 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pmgr: power-management@20e000000 {
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0xe000000 0 0x8c000>;
};
aic: interrupt-controller@20e100000 {
compatible = "apple,s8000-aic", "apple,aic";
reg = <0x2 0x0e100000 0x0 0x100000>;
#interrupt-cells = <3>;
interrupt-controller;
power-domains = <&ps_aic>;
};
dwi_bl: backlight@20e200080 {
compatible = "apple,s8000-dwi-bl", "apple,dwi-bl";
reg = <0x2 0x0e200080 0x0 0x8>;
power-domains = <&ps_dwi>;
status = "disabled";
};
pinctrl_ap: pinctrl@20f100000 {
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
reg = <0x2 0x0f100000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_ap 0 0 219>;
apple,npins = <219>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(165, 1)>,
<APPLE_PINMUX(164, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(178, 1)>,
<APPLE_PINMUX(177, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(132, 1)>,
<APPLE_PINMUX(131, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(115, 1)>,
<APPLE_PINMUX(114, 1)>;
};
};
pinctrl_aop: pinctrl@2100f0000 {
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
reg = <0x2 0x100f0000 0x0 0x100000>;
power-domains = <&ps_aop_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 28>;
apple,npins = <28>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 128 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 129 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 130 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 131 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 132 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 133 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 134 IRQ_TYPE_LEVEL_HIGH>;
};
pmgr_mini: power-management@210200000 {
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x10200000 0 0x84000>;
};
wdt: watchdog@2102b0000 {
compatible = "apple,s8000-wdt", "apple,wdt";
reg = <0x2 0x102b0000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A9X doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "s8001-pmgr.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/s8003-j71t.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad 5 (Wi-Fi) (TSMC), J71t, iPad6,11 (A1822)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8003.dtsi"
#include "s800x-ipad5.dtsi"
/ {
compatible = "apple,j71t", "apple,s8003", "apple,arm-platform";
model = "Apple iPad 5 (Wi-Fi) (TSMC)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8003-j72t.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad 5 (Cellular) (TSMC), J72t, iPad6,12 (A1823)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8003.dtsi"
#include "s800x-ipad5.dtsi"
/ {
compatible = "apple,j72t", "apple,s8003", "apple,arm-platform";
model = "Apple iPad 5 (Cellular) (TSMC)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8003-n66m.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s Plus (TSMC), N66m, iPhone8,2 (A1634/A1687/A1690/A1699)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8003.dtsi"
#include "s800x-6s.dtsi"
/ {
compatible = "apple,n66m", "apple,s8003", "apple,arm-platform";
model = "Apple iPhone 6s Plus (TSMC)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8003-n69.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone SE (TSMC), N69, iPhone8,4 (A1662/A1723/A1724)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8003.dtsi"
#include "s800x-se.dtsi"
/ {
compatible = "apple,n69", "apple,s8003", "apple,arm-platform";
model = "Apple iPhone SE (TSMC)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8003-n71m.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s (TSMC), N71m, iPhone8,1 (A1633/A1688/A1691/A1700)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "s8003.dtsi"
#include "s800x-6s.dtsi"
/ {
compatible = "apple,n71m", "apple,s8003", "apple,arm-platform";
model = "Apple iPhone 6s (TSMC)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/s8003.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8003 "A9" (TSMC) SoC
*
* Other names: H8P, "Malta"
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <500>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <45000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <22000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <25000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <28000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <35000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <38000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <38000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
* the S8003 (APL1022) on 16nm. There are some minor differences
* such as timing in cpufreq state transistions.
*/
linux-7.2.3/arch/arm64/boot/dts/apple/s800x-6s.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6s / 6S Plus common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s800-0-3-common.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "handset";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl_ap 96 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl_ap 97 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl_ap 67 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl_ap 66 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl_ap 149 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad 5 common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s800-0-3-common.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl_ap 96 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl_ap 97 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl_ap 143 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl_ap 144 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_dp>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/s800x-se.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone SE common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "s800-0-3-common.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "handset";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl_ap 96 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl_ap 97 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl_ap 67 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl_ap 66 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl_ap 149 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/spi1-nvram.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Devicetree include for common spi-nor nvram flash.
//
// Apple uses a consistent configuration for the nvram on all known M1* and
// M2* devices.
//
// Copyright The Asahi Linux Contributors
/ {
aliases {
nvram = &nvram;
};
};
&spi1 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
nvram: partition@700000 {
label = "nvram";
/* To be filled by the loader */
reg = <0x0 0x0>;
status = "disabled";
};
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6000-j314s.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14-inch, M1 Pro, 2021)
*
* target-type: J314s
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6000.dtsi"
#include "t600x-j314-j316.dtsi"
/ {
compatible = "apple,j314s", "apple,t6000", "apple,arm-platform";
model = "Apple MacBook Pro (14-inch, M1 Pro, 2021)";
};
&wifi0 {
brcm,board-type = "apple,maldives";
};
&bluetooth0 {
brcm,board-type = "apple,maldives";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6000-j316s.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (16-inch, M1 Pro, 2021)
*
* target-type: J316s
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6000.dtsi"
#include "t600x-j314-j316.dtsi"
/ {
compatible = "apple,j316s", "apple,t6000", "apple,arm-platform";
model = "Apple MacBook Pro (16-inch, M1 Pro, 2021)";
};
&wifi0 {
brcm,board-type = "apple,madagascar";
};
&bluetooth0 {
brcm,board-type = "apple,madagascar";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6000.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6000 "M1 Pro" SoC
*
* Other names: H13J, "Jade Chop"
*
* Copyright The Asahi Linux Contributors
*/
/* This chip is just a cut down version of t6001, so include it and disable the missing parts */
#include "t6001.dtsi"
/ {
compatible = "apple,t6000", "apple,arm-platform";
};
/delete-node/ &pmgr_south;
&gpu {
compatible = "apple,agx-g13s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6001-j314c.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14-inch, M1 Max, 2021)
*
* target-type: J314c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6001.dtsi"
#include "t600x-j314-j316.dtsi"
/ {
compatible = "apple,j314c", "apple,t6001", "apple,arm-platform";
model = "Apple MacBook Pro (14-inch, M1 Max, 2021)";
};
&wifi0 {
brcm,board-type = "apple,maldives";
};
&bluetooth0 {
brcm,board-type = "apple,maldives";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6001-j316c.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (16-inch, M1 Max, 2021)
*
* target-type: J316c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6001.dtsi"
#include "t600x-j314-j316.dtsi"
/ {
compatible = "apple,j316c", "apple,t6001", "apple,arm-platform";
model = "Apple MacBook Pro (16-inch, M1 Max, 2021)";
};
&wifi0 {
brcm,board-type = "apple,madagascar";
};
&bluetooth0 {
brcm,board-type = "apple,madagascar";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6001-j375c.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (M1 Max, 2022)
*
* target-type: J375c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6001.dtsi"
#include "t600x-j375.dtsi"
/ {
compatible = "apple,j375c", "apple,t6001", "apple,arm-platform";
model = "Apple Mac Studio (M1 Max, 2022)";
};
&wifi0 {
brcm,board-type = "apple,okinawa";
};
&bluetooth0 {
brcm,board-type = "apple,okinawa";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6001.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6001 "M1 Max" SoC
*
* Other names: H13J, "Jade"
*
* Copyright The Asahi Linux Contributors
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"
#include "t600x-common.dtsi"
/ {
compatible = "apple,t6001", "apple,arm-platform";
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
nonposted-mmio;
// filled via templated includes at the end of the file
};
};
#define DIE
#define DIE_NO 0
&{/soc} {
#include "t600x-die0.dtsi"
#include "t600x-dieX.dtsi"
#include "t600x-nvme.dtsi"
};
#include "t600x-gpio-pins.dtsi"
#include "t600x-pmgr.dtsi"
#undef DIE
#undef DIE_NO
&aic {
affinities {
e-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_E>;
cpus = <&cpu_e00 &cpu_e01>;
};
p-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_P>;
cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03
&cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13>;
};
};
};
&gpu {
compatible = "apple,agx-g13c", "apple,agx-g13s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6002-j375d.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (M1 Ultra, 2022)
*
* target-type: J375d
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6002.dtsi"
#include "t600x-j375.dtsi"
/ {
compatible = "apple,j375d", "apple,t6002", "apple,arm-platform";
model = "Apple Mac Studio (M1 Ultra, 2022)";
aliases {
atcphy4 = &atcphy0_die1;
atcphy5 = &atcphy1_die1;
};
};
/* USB Type C */
&i2c0 {
/* front-right */
hpm4: usb-pd@39 {
compatible = "apple,cd321x";
reg = <0x39>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec4: connector {
compatible = "usb-c-connector";
label = "USB-C Front Right";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec4_connector_hs: endpoint {
remote-endpoint = <&dwc3_4_hs>;
};
};
port@1 {
reg = <1>;
typec4_connector_ss: endpoint {
remote-endpoint = <&atcphy4_typec_lanes>;
};
};
};
};
};
/* front-left */
hpm5: usb-pd@3a {
compatible = "apple,cd321x";
reg = <0x3a>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec5: connector {
compatible = "usb-c-connector";
label = "USB-C Front Left";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec5_connector_hs: endpoint {
remote-endpoint = <&dwc3_5_hs>;
};
};
port@1 {
reg = <1>;
typec5_connector_ss: endpoint {
remote-endpoint = <&atcphy5_typec_lanes>;
};
};
};
};
};
};
&wifi0 {
brcm,board-type = "apple,okinawa";
};
&bluetooth0 {
brcm,board-type = "apple,okinawa";
};
/* USB controllers on die 1 */
&dwc3_0_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_4_hs: endpoint {
remote-endpoint = <&typec4_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_4_ss: endpoint {
remote-endpoint = <&atcphy4_usb3>;
};
};
};
};
&dwc3_1_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_5_hs: endpoint {
remote-endpoint = <&typec5_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_5_ss: endpoint {
remote-endpoint = <&atcphy5_usb3>;
};
};
};
};
/* Type-C PHYs */
&atcphy0_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy4_typec_lanes: endpoint {
remote-endpoint = <&typec4_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy4_usb3: endpoint {
remote-endpoint = <&dwc3_4_ss>;
};
};
};
};
&atcphy1_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy5_typec_lanes: endpoint {
remote-endpoint = <&typec5_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy5_usb3: endpoint {
remote-endpoint = <&dwc3_5_ss>;
};
};
};
};
/* delete unused USB nodes on die 1 */
/delete-node/ &dwc3_2_dart_0_die1;
/delete-node/ &dwc3_2_dart_1_die1;
/delete-node/ &dwc3_2_die1;
/delete-node/ &atcphy2_die1;
/delete-node/ &dwc3_3_dart_0_die1;
/delete-node/ &dwc3_3_dart_1_die1;
/delete-node/ &dwc3_3_die1;
/delete-node/ &atcphy3_die1;
/* delete unused always-on power-domains on die 1 */
/delete-node/ &ps_atc2_usb_aon_die1;
/delete-node/ &ps_atc2_usb_die1;
/delete-node/ &ps_atc3_usb_aon_die1;
/delete-node/ &ps_atc3_usb_die1;
/delete-node/ &ps_disp0_cpu0_die1;
/delete-node/ &ps_disp0_fe_die1;
linux-7.2.3/arch/arm64/boot/dts/apple/t6002.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6002 "M1 Ultra" SoC
*
* Other names: H13J, "Jade 2C"
*
* Copyright The Asahi Linux Contributors
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"
#include "t600x-common.dtsi"
/ {
compatible = "apple,t6002", "apple,arm-platform";
#address-cells = <2>;
#size-cells = <2>;
cpus {
cpu-map {
cluster3 {
core0 {
cpu = <&cpu_e10>;
};
core1 {
cpu = <&cpu_e11>;
};
};
cluster4 {
core0 {
cpu = <&cpu_p20>;
};
core1 {
cpu = <&cpu_p21>;
};
core2 {
cpu = <&cpu_p22>;
};
core3 {
cpu = <&cpu_p23>;
};
};
cluster5 {
core0 {
cpu = <&cpu_p30>;
};
core1 {
cpu = <&cpu_p31>;
};
core2 {
cpu = <&cpu_p32>;
};
core3 {
cpu = <&cpu_p33>;
};
};
};
cpu_e10: cpu@800 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x800>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&icestorm_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_e11: cpu@801 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x801>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&icestorm_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_p20: cpu@10900 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10900>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p21: cpu@10901 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10901>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p22: cpu@10902 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10902>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p23: cpu@10903 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10903>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p30: cpu@10a00 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10a00>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p31: cpu@10a01 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10a01>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p32: cpu@10a02 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10a02>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p33: cpu@10a03 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10a03>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
l2_cache_3: l2-cache-3 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x400000>;
};
l2_cache_4: l2-cache-4 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0xc00000>;
};
l2_cache_5: l2-cache-5 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0xc00000>;
};
};
die0: soc@200000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x2 0x0 0x2 0x0 0x4 0x0>,
<0x5 0x80000000 0x5 0x80000000 0x1 0x80000000>,
<0x7 0x0 0x7 0x0 0xf 0x80000000>;
nonposted-mmio;
// filled via templated includes at the end of the file
};
die1: soc@2200000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x2 0x0 0x22 0x0 0x4 0x0>,
<0x7 0x0 0x27 0x0 0xf 0x80000000>;
nonposted-mmio;
// filled via templated includes at the end of the file
};
};
#define DIE
#define DIE_NO 0
&die0 {
#include "t600x-die0.dtsi"
#include "t600x-dieX.dtsi"
};
#include "t600x-pmgr.dtsi"
#include "t600x-gpio-pins.dtsi"
#undef DIE
#undef DIE_NO
#define DIE _die1
#define DIE_NO 1
&die1 {
#include "t600x-dieX.dtsi"
#include "t600x-nvme.dtsi"
};
#include "t600x-pmgr.dtsi"
#undef DIE
#undef DIE_NO
&aic {
affinities {
e-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_E>;
cpus = <&cpu_e00 &cpu_e01
&cpu_e10 &cpu_e11>;
};
p-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_P>;
cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03
&cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13
&cpu_p20 &cpu_p21 &cpu_p22 &cpu_p23
&cpu_p30 &cpu_p31 &cpu_p32 &cpu_p33>;
};
};
};
&ps_gfx {
// On t6002, the die0 GPU power domain needs both AFR power domains
power-domains = <&ps_afr>, <&ps_afr_die1>;
};
&gpu {
compatible = "apple,agx-g13d", "apple,agx-g13s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-common.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Common Apple T6000 / T6001 / T6002 "M1 Pro/Max/Ultra" SoC
*
* Other names: H13J, "Jade Chop", "Jade", "Jade 2C"
*
* Copyright The Asahi Linux Contributors
*/
/ {
#address-cells = <2>;
#size-cells = <2>;
aliases {
gpu = &gpu;
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu_e00>;
};
core1 {
cpu = <&cpu_e01>;
};
};
cluster1 {
core0 {
cpu = <&cpu_p00>;
};
core1 {
cpu = <&cpu_p01>;
};
core2 {
cpu = <&cpu_p02>;
};
core3 {
cpu = <&cpu_p03>;
};
};
cluster2 {
core0 {
cpu = <&cpu_p10>;
};
core1 {
cpu = <&cpu_p11>;
};
core2 {
cpu = <&cpu_p12>;
};
core3 {
cpu = <&cpu_p13>;
};
};
};
cpu_e00: cpu@0 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&icestorm_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
};
cpu_e01: cpu@1 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&icestorm_opp>;
capacity-dmips-mhz = <714>;
performance-domains = <&cpufreq_e>;
};
cpu_p00: cpu@10100 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10100>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p01: cpu@10101 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10101>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p02: cpu@10102 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10102>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p03: cpu@10103 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10103>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p10: cpu@10200 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10200>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p11: cpu@10201 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10201>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p12: cpu@10202 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10202>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p13: cpu@10203 {
compatible = "apple,firestorm";
device_type = "cpu";
reg = <0x0 0x10203>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&firestorm_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
l2_cache_0: l2-cache-0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x400000>;
};
l2_cache_1: l2-cache-1 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0xc00000>;
};
l2_cache_2: l2-cache-2 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0xc00000>;
};
};
icestorm_opp: opp-table-0 {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <1>;
clock-latency-ns = <7500>;
};
opp02 {
opp-hz = /bits/ 64 <972000000>;
opp-level = <2>;
clock-latency-ns = <23000>;
};
opp03 {
opp-hz = /bits/ 64 <1332000000>;
opp-level = <3>;
clock-latency-ns = <29000>;
};
opp04 {
opp-hz = /bits/ 64 <1704000000>;
opp-level = <4>;
clock-latency-ns = <40000>;
};
opp05 {
opp-hz = /bits/ 64 <2064000000>;
opp-level = <5>;
clock-latency-ns = <50000>;
};
};
firestorm_opp: opp-table-1 {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <1>;
clock-latency-ns = <8000>;
};
opp02 {
opp-hz = /bits/ 64 <828000000>;
opp-level = <2>;
clock-latency-ns = <18000>;
};
opp03 {
opp-hz = /bits/ 64 <1056000000>;
opp-level = <3>;
clock-latency-ns = <19000>;
};
opp04 {
opp-hz = /bits/ 64 <1296000000>;
opp-level = <4>;
clock-latency-ns = <23000>;
};
opp05 {
opp-hz = /bits/ 64 <1524000000>;
opp-level = <5>;
clock-latency-ns = <24000>;
};
opp06 {
opp-hz = /bits/ 64 <1752000000>;
opp-level = <6>;
clock-latency-ns = <28000>;
};
opp07 {
opp-hz = /bits/ 64 <1980000000>;
opp-level = <7>;
clock-latency-ns = <31000>;
};
opp08 {
opp-hz = /bits/ 64 <2208000000>;
opp-level = <8>;
clock-latency-ns = <45000>;
};
opp09 {
opp-hz = /bits/ 64 <2448000000>;
opp-level = <9>;
clock-latency-ns = <49000>;
};
opp10 {
opp-hz = /bits/ 64 <2676000000>;
opp-level = <10>;
clock-latency-ns = <53000>;
};
opp11 {
opp-hz = /bits/ 64 <2904000000>;
opp-level = <11>;
clock-latency-ns = <56000>;
};
opp12 {
opp-hz = /bits/ 64 <3036000000>;
opp-level = <12>;
clock-latency-ns = <56000>;
};
/* Not available until CPU deep sleep is implemented
opp13 {
opp-hz = /bits/ 64 <3132000000>;
opp-level = <13>;
clock-latency-ns = <56000>;
turbo-mode;
};
opp14 {
opp-hz = /bits/ 64 <3168000000>;
opp-level = <14>;
clock-latency-ns = <56000>;
turbo-mode;
};
opp15 {
opp-hz = /bits/ 64 <3228000000>;
opp-level = <15>;
clock-latency-ns = <56000>;
turbo-mode;
};
*/
};
pmu-e {
compatible = "apple,icestorm-pmu";
interrupt-parent = <&aic>;
interrupts = <AIC_FIQ 0 AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
};
pmu-p {
compatible = "apple,firestorm-pmu";
interrupt-parent = <&aic>;
interrupts = <AIC_FIQ 0 AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
interrupts = <AIC_FIQ 0 AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
clk_200m: clock-200m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
clock-output-names = "clk_200m";
};
/*
* This is a fabulated representation of the input clock
* to NCO since we don't know the true clock tree.
*/
nco_clkref: clock-ref-nco {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "nco_ref";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpu_globals: globals {
status = "disabled";
};
gpu_hw_cal_a: hw-cal-a {
status = "disabled";
};
gpu_hw_cal_b: hw-cal-b {
status = "disabled";
};
uat_handoff: uat-handoff {
status = "disabled";
};
uat_pagetables: uat-pagetables {
status = "disabled";
};
uat_ttbs: uat-ttbs {
status = "disabled";
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-die0.dtsi
+528
View File
@@ -0,0 +1,528 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
* Apple T6000 / T6001 "M1 Pro" / "M1 Max".
*
* Copyright The Asahi Linux Contributors
*/
nco: clock-controller@28e03c000 {
compatible = "apple,t6000-nco", "apple,nco";
reg = <0x2 0x8e03c000 0x0 0x14000>;
clocks = <&nco_clkref>;
#clock-cells = <1>;
};
aic: interrupt-controller@28e100000 {
compatible = "apple,t6000-aic", "apple,aic2";
#interrupt-cells = <4>;
interrupt-controller;
reg = <0x2 0x8e100000 0x0 0xc000>,
<0x2 0x8e10c000 0x0 0x4>;
reg-names = "core", "event";
power-domains = <&ps_aic>;
};
smc: smc@290400000 {
compatible = "apple,t6000-smc", "apple,smc";
reg = <0x2 0x90400000 0x0 0x4000>,
<0x2 0x91e00000 0x0 0x100000>;
reg-names = "smc", "sram";
mboxes = <&smc_mbox>;
smc_gpio: gpio {
compatible = "apple,smc-gpio";
gpio-controller;
#gpio-cells = <2>;
};
smc_reboot: reboot {
compatible = "apple,smc-reboot";
nvmem-cells = <&shutdown_flag>, <&boot_stage>,
<&boot_error_count>, <&panic_count>;
nvmem-cell-names = "shutdown_flag", "boot_stage",
"boot_error_count", "panic_count";
};
rtc {
compatible = "apple,smc-rtc";
nvmem-cells = <&rtc_offset>;
nvmem-cell-names = "rtc_offset";
};
};
smc_mbox: mbox@290408000 {
compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x2 0x90408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 754 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 755 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 756 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 757 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
#mbox-cells = <0>;
};
pinctrl_smc: pinctrl@290820000 {
compatible = "apple,t6000-pinctrl", "apple,pinctrl";
reg = <0x2 0x90820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_smc 0 0 30>;
apple,npins = <30>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>;
};
nub_spmi0: spmi@2920a1300 {
compatible = "apple,t6000-spmi", "apple,spmi";
reg = <0x2 0x920a1300 0x0 0x100>;
#address-cells = <2>;
#size-cells = <0>;
pmic1: pmic@f {
compatible = "apple,maverick-pmic", "apple,spmi-nvmem";
reg = <0xf SPMI_USID>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
pm_setting: pm-setting@1405 {
reg = <0x1405 0x1>;
};
rtc_offset: rtc-offset@1411 {
reg = <0x1411 0x6>;
};
boot_stage: boot-stage@6001 {
reg = <0x6001 0x1>;
};
boot_error_count: boot-error-count@6002,0 {
reg = <0x6002 0x1>;
bits = <0 4>;
};
panic_count: panic-count@6002,4 {
reg = <0x6002 0x1>;
bits = <4 4>;
};
boot_error_stage: boot-error-stage@6003 {
reg = <0x6003 0x1>;
};
shutdown_flag: shutdown-flag@600f,3 {
reg = <0x600f 0x1>;
bits = <3 1>;
};
fault_shadow: fault-shadow@867b {
reg = <0x867b 0x10>;
};
socd: socd@8b00 {
reg = <0x8b00 0x400>;
};
};
};
};
wdt: watchdog@2922b0000 {
compatible = "apple,t6000-wdt", "apple,wdt";
reg = <0x2 0x922b0000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>;
};
sio_dart_0: iommu@39b004000 {
compatible = "apple,t6000-dart";
reg = <0x3 0x9b004000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_sio_cpu>;
};
sio_dart_1: iommu@39b008000 {
compatible = "apple,t6000-dart";
reg = <0x3 0x9b008000 0x0 0x8000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_sio_cpu>;
};
fpwm0: pwm@39b030000 {
compatible = "apple,t6000-fpwm", "apple,s5l-fpwm";
reg = <0x3 0x9b030000 0x0 0x4000>;
power-domains = <&ps_fpwm0>;
clocks = <&clkref>;
#pwm-cells = <2>;
status = "disabled";
};
i2c0: i2c@39b040000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b040000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c1: i2c@39b044000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b044000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c2: i2c@39b048000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b048000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c3: i2c@39b04c000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b04c000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c4: i2c@39b050000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b050000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c5: i2c@39b054000 {
compatible = "apple,t6000-i2c", "apple,i2c";
reg = <0x3 0x9b054000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c5_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c5>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
spi1: spi@39b104000 {
compatible = "apple,t6000-spi", "apple,spi";
reg = <0x3 0x9b104000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_200m>;
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
power-domains = <&ps_spi1>;
status = "disabled";
};
spi3: spi@39b10c000 {
compatible = "apple,t6000-spi", "apple,spi";
reg = <0x3 0x9b10c000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkref>;
pinctrl-0 = <&spi3_pins>;
pinctrl-names = "default";
power-domains = <&ps_spi3>;
status = "disabled";
};
serial0: serial@39b200000 {
compatible = "apple,s5l-uart";
reg = <0x3 0x9b200000 0x0 0x1000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>;
/*
* TODO: figure out the clocking properly, there may
* be a third selectable clock.
*/
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
admac: dma-controller@39b400000 {
compatible = "apple,t6000-admac", "apple,admac";
reg = <0x3 0x9b400000 0x0 0x34000>;
#dma-cells = <1>;
dma-channels = <16>;
interrupts-extended = <0>,
<&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>,
<0>,
<0>;
iommus = <&sio_dart_0 2>, <&sio_dart_1 2>;
power-domains = <&ps_sio_adma>;
resets = <&ps_audio_p>;
};
mca: mca@39b600000 {
compatible = "apple,t6000-mca", "apple,mca";
reg = <0x3 0x9b600000 0x0 0x10000>,
<0x3 0x9b500000 0x0 0x20000>;
clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
<&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>,
<&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>,
<&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>;
dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
"tx1a", "rx1a", "tx1b", "rx1b",
"tx2a", "rx2a", "tx2b", "rx2b",
"tx3a", "rx3a", "tx3b", "rx3b";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
<&ps_mca2>, <&ps_mca3>;
resets = <&ps_audio_p>;
#sound-dai-cells = <1>;
};
gpu: gpu@406400000 {
compatible = "apple,agx-g13s";
reg = <0x4 0x6400000 0 0x40000>,
<0x4 0x4000000 0 0x1000000>;
reg-names = "asc", "sgx";
mboxes = <&agx_mbox>;
power-domains = <&ps_gfx>;
memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>,
<&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>;
memory-region-names = "ttbs", "pagetables", "handoff",
"hw-cal-a", "hw-cal-b", "globals";
apple,firmware-abi = <0 0 0>;
};
agx_mbox: mbox@406408000 {
compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x4 0x6408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1059 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1060 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1061 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1062 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
#mbox-cells = <0>;
};
pcie0_dart_0: iommu@581008000 {
compatible = "apple,t6000-dart";
reg = <0x5 0x81008000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
};
pcie0_dart_1: iommu@582008000 {
compatible = "apple,t6000-dart";
reg = <0x5 0x82008000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
};
pcie0_dart_2: iommu@583008000 {
compatible = "apple,t6000-dart";
reg = <0x5 0x83008000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
status = "disabled";
};
pcie0_dart_3: iommu@584008000 {
compatible = "apple,t6000-dart";
reg = <0x5 0x84008000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
status = "disabled";
};
pcie0: pcie@590000000 {
compatible = "apple,t6000-pcie", "apple,pcie";
device_type = "pci";
reg = <0x5 0x90000000 0x0 0x1000000>,
<0x5 0x80000000 0x0 0x100000>,
<0x5 0x81000000 0x0 0x4000>,
<0x5 0x82000000 0x0 0x4000>,
<0x5 0x83000000 0x0 0x4000>,
<0x5 0x84000000 0x0 0x4000>;
reg-names = "config", "rc", "port0", "port1", "port2", "port3";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>;
msi-controller;
msi-parent = <&pcie0>;
msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>;
iommu-map = <0x100 &pcie0_dart_0 1 1>,
<0x200 &pcie0_dart_1 1 1>,
<0x300 &pcie0_dart_2 1 1>,
<0x400 &pcie0_dart_3 1 1>;
iommu-map-mask = <0xff00>;
bus-range = <0 4>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
<0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
power-domains = <&ps_apcie_gp_sys>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
<0 0 0 2 &port00 0 0 0 1>,
<0 0 0 3 &port00 0 0 0 2>,
<0 0 0 4 &port00 0 0 0 3>;
};
port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
<0 0 0 2 &port01 0 0 0 1>,
<0 0 0 3 &port01 0 0 0 2>,
<0 0 0 4 &port01 0 0 0 3>;
};
port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
<0 0 0 2 &port02 0 0 0 1>,
<0 0 0 3 &port02 0 0 0 2>,
<0 0 0 4 &port02 0 0 0 3>;
status = "disabled";
};
port03: pci@3,0 {
device_type = "pci";
reg = <0x1800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
<0 0 0 2 &port03 0 0 0 1>,
<0 0 0 3 &port03 0 0 0 2>,
<0 0 0 4 &port03 0 0 0 3>;
status = "disabled";
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-dieX.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Devices used on both dies on the Apple T6002 "M1 Ultra" and present on
* Apple T6000/T6001 "M1 Pro/Max".
*
* Copyright The Asahi Linux Contributors
*/
DIE_NODE(cpufreq_e): cpufreq@210e20000 {
compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x10e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(cpufreq_p0): cpufreq@211e20000 {
compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x11e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(cpufreq_p1): cpufreq@212e20000 {
compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
reg = <0x2 0x12e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(pmgr): power-management@28e080000 {
compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x8e080000 0 0x4000>;
};
DIE_NODE(pmgr_east): power-management@28e580000 {
compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x8e580000 0 0xc000>;
};
DIE_NODE(pmgr_south): power-management@28e680000 {
compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x8e680000 0 0xc000>;
};
DIE_NODE(pinctrl_nub): pinctrl@2921f0000 {
compatible = "apple,t6000-pinctrl", "apple,pinctrl";
reg = <0x2 0x921f0000 0x0 0x4000>;
power-domains = <&DIE_NODE(ps_nub_gpio)>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_nub) 0 0 16>;
apple,npins = <16>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 623 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 624 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 625 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 626 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 627 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 628 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 629 IRQ_TYPE_LEVEL_HIGH>;
};
DIE_NODE(pmgr_mini): power-management@292280000 {
compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x92280000 0 0x4000>;
};
DIE_NODE(pinctrl_aop): pinctrl@293820000 {
compatible = "apple,t6000-pinctrl", "apple,pinctrl";
reg = <0x2 0x93820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_aop) 0 0 63>;
apple,npins = <63>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 567 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 568 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 569 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 570 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 571 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 572 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 573 IRQ_TYPE_LEVEL_HIGH>;
};
DIE_NODE(pinctrl_ap): pinctrl@39b028000 {
compatible = "apple,t6000-pinctrl", "apple,pinctrl";
reg = <0x3 0x9b028000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 427 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 428 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 429 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 430 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 431 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 432 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 433 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkref>;
power-domains = <&DIE_NODE(ps_gpio)>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_ap) 0 0 255>;
apple,npins = <255>;
interrupt-controller;
#interrupt-cells = <2>;
};
DIE_NODE(dwc3_0): usb@702280000 {
compatible = "apple,t6000-dwc3", "apple,t8103-dwc3";
reg = <0x7 0x02280000 0x0 0xcd00>, <0x7 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1190 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_0_dart_0) 0>,
<&DIE_NODE(dwc3_0_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
resets = <&DIE_NODE(atcphy0)>;
phys = <&DIE_NODE(atcphy0) PHY_TYPE_USB2>, <&DIE_NODE(atcphy0) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_0_dart_0): iommu@702f00000 {
compatible = "apple,t6000-dart";
reg = <0x7 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1194 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_0_dart_1): iommu@702f80000 {
compatible = "apple,t6000-dart";
reg = <0x7 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1194 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy0): phy@703000000 {
compatible = "apple,t6000-atcphy", "apple,t8103-atcphy";
reg = <0x7 0x03000000 0x0 0x4c000>,
<0x7 0x03050000 0x0 0x8000>,
<0x7 0x00000000 0x0 0x4000>,
<0x7 0x02a90000 0x0 0x4000>,
<0x7 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
};
DIE_NODE(dwc3_1): usb@b02280000 {
compatible = "apple,t6000-dwc3", "apple,t8103-dwc3";
reg = <0xb 0x02280000 0x0 0xcd00>, <0xb 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1207 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_1_dart_0) 0>,
<&DIE_NODE(dwc3_1_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
resets = <&DIE_NODE(atcphy1)>;
phys = <&DIE_NODE(atcphy1) PHY_TYPE_USB2>, <&DIE_NODE(atcphy1) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_1_dart_0): iommu@b02f00000 {
compatible = "apple,t6000-dart";
reg = <0xb 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1211 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_1_dart_1): iommu@b02f80000 {
compatible = "apple,t6000-dart";
reg = <0xb 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1211 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy1): phy@b03000000 {
compatible = "apple,t6000-atcphy", "apple,t8103-atcphy";
reg = <0xb 0x03000000 0x0 0x4c000>,
<0xb 0x03050000 0x0 0x8000>,
<0xb 0x00000000 0x0 0x4000>,
<0xb 0x02a90000 0x0 0x4000>,
<0xb 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
};
DIE_NODE(dwc3_2): usb@f02280000 {
compatible = "apple,t6000-dwc3", "apple,t8103-dwc3";
reg = <0xf 0x02280000 0x0 0xcd00>, <0xf 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1224 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_2_dart_0) 0>,
<&DIE_NODE(dwc3_2_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
resets = <&DIE_NODE(atcphy2)>;
phys = <&DIE_NODE(atcphy2) PHY_TYPE_USB2>, <&DIE_NODE(atcphy2) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_2_dart_0): iommu@f02f00000 {
compatible = "apple,t6000-dart";
reg = <0xf 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1228 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_2_dart_1): iommu@f02f80000 {
compatible = "apple,t6000-dart";
reg = <0xf 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1228 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy2): phy@f03000000 {
compatible = "apple,t6000-atcphy", "apple,t8103-atcphy";
reg = <0xf 0x03000000 0x0 0x4c000>,
<0xf 0x03050000 0x0 0x8000>,
<0xf 0x00000000 0x0 0x4000>,
<0xf 0x02a90000 0x0 0x4000>,
<0xf 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
};
DIE_NODE(dwc3_3): usb@1302280000 {
compatible = "apple,t6000-dwc3", "apple,t8103-dwc3";
reg = <0x13 0x02280000 0x0 0xcd00>, <0x13 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1241 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_3_dart_0) 0>,
<&DIE_NODE(dwc3_3_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
resets = <&DIE_NODE(atcphy3)>;
phys = <&DIE_NODE(atcphy3) PHY_TYPE_USB2>, <&DIE_NODE(atcphy3) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_3_dart_0): iommu@1302f00000 {
compatible = "apple,t6000-dart";
reg = <0x13 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1245 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_3_dart_1): iommu@1302f80000 {
compatible = "apple,t6000-dart";
reg = <0x13 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1245 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy3): phy@1303000000 {
compatible = "apple,t6000-atcphy", "apple,t8103-atcphy";
reg = <0x13 0x03000000 0x0 0x4c000>,
<0x13 0x03050000 0x0 0x8000>,
<0x13 0x00000000 0x0 0x4000>,
<0x13 0x02a90000 0x0 0x4000>,
<0x13 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* GPIO pin mappings for Apple T600x SoCs.
*
* Copyright The Asahi Linux Contributors
*/
&pinctrl_ap {
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(92, 1)>,
<APPLE_PINMUX(93, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(94, 1)>,
<APPLE_PINMUX(95, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(96, 1)>,
<APPLE_PINMUX(97, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(98, 1)>,
<APPLE_PINMUX(99, 1)>;
};
i2c4_pins: i2c4-pins {
pinmux = <APPLE_PINMUX(8, 1)>,
<APPLE_PINMUX(9, 1)>;
};
i2c5_pins: i2c5-pins {
pinmux = <APPLE_PINMUX(100, 1)>,
<APPLE_PINMUX(101, 1)>;
};
spi1_pins: spi1-pins {
pinmux = <APPLE_PINMUX(10, 1)>,
<APPLE_PINMUX(11, 1)>,
<APPLE_PINMUX(32, 1)>,
<APPLE_PINMUX(33, 1)>;
};
spi3_pins: spi3-pins {
pinmux = <APPLE_PINMUX(52, 1)>,
<APPLE_PINMUX(53, 1)>,
<APPLE_PINMUX(54, 1)>,
<APPLE_PINMUX(55, 1)>;
};
pcie_pins: pcie-pins {
pinmux = <APPLE_PINMUX(0, 1)>,
<APPLE_PINMUX(1, 1)>,
<APPLE_PINMUX(2, 1)>,
<APPLE_PINMUX(3, 1)>;
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14/16-inch, 2021)
*
* This file contains the parts common to J314 and J316 devices with both t6000 and t6001.
*
* target-type: J314s / J314c / J316s / J316c
*
* Copyright The Asahi Linux Contributors
*/
#include <dt-bindings/leds/common.h>
/ {
chassis-type = "laptop";
aliases {
atcphy0 = &atcphy0;
atcphy1 = &atcphy1;
atcphy2 = &atcphy2;
atcphy3 = &atcphy3;
bluetooth0 = &bluetooth0;
serial0 = &serial0;
wifi0 = &wifi0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@10000000000 {
device_type = "memory";
reg = <0x100 0 0x2 0>; /* To be filled by loader */
};
led-controller {
compatible = "pwm-leds";
led-0 {
pwms = <&fpwm0 0 40000>;
label = "kbd_backlight";
function = LED_FUNCTION_KBD_BACKLIGHT;
color = <LED_COLOR_ID_WHITE>;
max-brightness = <255>;
default-state = "keep";
};
};
};
&serial0 {
status = "okay";
};
/* USB Type C */
&i2c0 {
hpm0: usb-pd@38 {
compatible = "apple,cd321x";
reg = <0x38>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec0: connector {
compatible = "usb-c-connector";
label = "USB-C Left Rear";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec0_connector_hs: endpoint {
remote-endpoint = <&dwc3_0_hs>;
};
};
port@1 {
reg = <1>;
typec0_connector_ss: endpoint {
remote-endpoint = <&atcphy0_typec_lanes>;
};
};
};
};
};
hpm1: usb-pd@3f {
compatible = "apple,cd321x";
reg = <0x3f>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec1: connector {
compatible = "usb-c-connector";
label = "USB-C Left Front";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec1_connector_hs: endpoint {
remote-endpoint = <&dwc3_1_hs>;
};
};
port@1 {
reg = <1>;
typec1_connector_ss: endpoint {
remote-endpoint = <&atcphy1_typec_lanes>;
};
};
};
};
};
hpm2: usb-pd@3b {
compatible = "apple,cd321x";
reg = <0x3b>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec2: connector {
compatible = "usb-c-connector";
label = "USB-C Right";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec2_connector_hs: endpoint {
remote-endpoint = <&dwc3_2_hs>;
};
};
port@1 {
reg = <1>;
typec2_connector_ss: endpoint {
remote-endpoint = <&atcphy2_typec_lanes>;
};
};
};
};
};
/* MagSafe port */
hpm5: usb-pd@3a {
compatible = "apple,cd321x";
reg = <0x3a>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
};
&nco_clkref {
clock-frequency = <1068000000>;
};
/* PCIe devices */
&port00 {
/* WLAN */
bus-range = <1 1>;
wifi0: wifi@0,0 {
compatible = "pci14e4,4433";
reg = <0x10000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 10];
apple,antenna-sku = "XX";
};
bluetooth0: bluetooth@0,1 {
compatible = "pci14e4,5f71";
reg = <0x10100 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-bd-address = [00 00 00 00 00 00];
};
};
&port01 {
/* SD card reader */
bus-range = <2 2>;
sdhci0: mmc@0,0 {
compatible = "pci17a0,9755";
reg = <0x20000 0x0 0x0 0x0 0x0>;
cd-inverted;
wp-inverted;
};
};
&fpwm0 {
status = "okay";
};
/* USB controllers */
&dwc3_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_0_hs: endpoint {
remote-endpoint = <&typec0_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_0_ss: endpoint {
remote-endpoint = <&atcphy0_usb3>;
};
};
};
};
&dwc3_1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_1_hs: endpoint {
remote-endpoint = <&typec1_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_1_ss: endpoint {
remote-endpoint = <&atcphy1_usb3>;
};
};
};
};
&dwc3_2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_2_hs: endpoint {
remote-endpoint = <&typec2_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_2_ss: endpoint {
remote-endpoint = <&atcphy2_usb3>;
};
};
};
};
/*
* ps_atc3_usb_aon power-domain is always-on to keep dwc3 working over suspend.
* atc3 is used exclusively for the DP-to-HDMI so do not keep this always on.
*/
&ps_atc3_usb_aon {
/delete-property/ apple,always-on;
};
/* ATC3 is used for DisplayPort -> HDMI only */
&dwc3_3_dart_0 {
status = "disabled";
};
&dwc3_3_dart_1 {
status = "disabled";
};
&dwc3_3 {
status = "disabled";
};
/* Delete unused dwc3_3 to prevent dt_disable_missing_devs() from disabling
* atcphy3 via phandle references from a disablecd device.
*/
/delete-node/ &dwc3_3;
/* Type-C PHYs */
&atcphy0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy0_typec_lanes: endpoint {
remote-endpoint = <&typec0_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy0_usb3: endpoint {
remote-endpoint = <&dwc3_0_ss>;
};
};
};
};
&atcphy1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy1_typec_lanes: endpoint {
remote-endpoint = <&typec1_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy1_usb3: endpoint {
remote-endpoint = <&dwc3_1_ss>;
};
};
};
};
&atcphy2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy2_typec_lanes: endpoint {
remote-endpoint = <&typec2_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy2_usb3: endpoint {
remote-endpoint = <&dwc3_2_ss>;
};
};
};
};
&atcphy3 {
status = "disabled";
};
#include "spi1-nvram.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-j375.dtsi
+413
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (2022)
*
* This file contains the parts common to J375 devices with both t6001 and t6002.
*
* target-type: J375c / J375d
*
* Copyright The Asahi Linux Contributors
*/
/ {
chassis-type = "desktop";
aliases {
atcphy0 = &atcphy0;
atcphy1 = &atcphy1;
atcphy2 = &atcphy2;
atcphy3 = &atcphy3;
bluetooth0 = &bluetooth0;
ethernet0 = &ethernet0;
serial0 = &serial0;
wifi0 = &wifi0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@10000000000 {
device_type = "memory";
reg = <0x100 0 0x2 0>; /* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
/* USB Type C */
&i2c0 {
hpm0: usb-pd@38 {
compatible = "apple,cd321x";
reg = <0x38>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec0: connector {
compatible = "usb-c-connector";
label = "USB-C Back Left";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec0_connector_hs: endpoint {
remote-endpoint = <&dwc3_0_hs>;
};
};
port@1 {
reg = <1>;
typec0_connector_ss: endpoint {
remote-endpoint = <&atcphy0_typec_lanes>;
};
};
};
};
};
hpm1: usb-pd@3f {
compatible = "apple,cd321x";
reg = <0x3f>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec1: connector {
compatible = "usb-c-connector";
label = "USB-C Back Left Middle";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec1_connector_hs: endpoint {
remote-endpoint = <&dwc3_1_hs>;
};
};
port@1 {
reg = <1>;
typec1_connector_ss: endpoint {
remote-endpoint = <&atcphy1_typec_lanes>;
};
};
};
};
};
hpm2: usb-pd@3b {
compatible = "apple,cd321x";
reg = <0x3b>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec2: connector {
compatible = "usb-c-connector";
label = "USB-C Back Right Middle";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec2_connector_hs: endpoint {
remote-endpoint = <&dwc3_2_hs>;
};
};
port@1 {
reg = <1>;
typec2_connector_ss: endpoint {
remote-endpoint = <&atcphy2_typec_lanes>;
};
};
};
};
};
hpm3: usb-pd@3c {
compatible = "apple,cd321x";
reg = <0x3c>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec3: connector {
compatible = "usb-c-connector";
label = "USB-C Back Right";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec3_connector_hs: endpoint {
remote-endpoint = <&dwc3_3_hs>;
};
};
port@1 {
reg = <1>;
typec3_connector_ss: endpoint {
remote-endpoint = <&atcphy3_typec_lanes>;
};
};
};
};
};
};
/* USB controllers */
&dwc3_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_0_hs: endpoint {
remote-endpoint = <&typec0_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_0_ss: endpoint {
remote-endpoint = <&atcphy0_usb3>;
};
};
};
};
&dwc3_1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_1_hs: endpoint {
remote-endpoint = <&typec1_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_1_ss: endpoint {
remote-endpoint = <&atcphy1_usb3>;
};
};
};
};
&dwc3_2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_2_hs: endpoint {
remote-endpoint = <&typec2_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_2_ss: endpoint {
remote-endpoint = <&atcphy2_usb3>;
};
};
};
};
&dwc3_3 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_3_hs: endpoint {
remote-endpoint = <&typec3_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_3_ss: endpoint {
remote-endpoint = <&atcphy3_usb3>;
};
};
};
};
/* Type-C PHYs */
&atcphy0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy0_typec_lanes: endpoint {
remote-endpoint = <&typec0_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy0_usb3: endpoint {
remote-endpoint = <&dwc3_0_ss>;
};
};
};
};
&atcphy1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy1_typec_lanes: endpoint {
remote-endpoint = <&typec1_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy1_usb3: endpoint {
remote-endpoint = <&dwc3_1_ss>;
};
};
};
};
&atcphy2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy2_typec_lanes: endpoint {
remote-endpoint = <&typec2_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy2_usb3: endpoint {
remote-endpoint = <&dwc3_2_ss>;
};
};
};
};
&atcphy3 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy3_typec_lanes: endpoint {
remote-endpoint = <&typec3_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy3_usb3: endpoint {
remote-endpoint = <&dwc3_3_ss>;
};
};
};
};
&nco_clkref {
clock-frequency = <1068000000>;
};
/* PCIe devices */
&port00 {
/* WLAN */
bus-range = <1 1>;
wifi0: wifi@0,0 {
compatible = "pci14e4,4433";
reg = <0x10000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 10];
apple,antenna-sku = "XX";
};
bluetooth0: bluetooth@0,1 {
compatible = "pci14e4,5f71";
reg = <0x10100 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-bd-address = [00 00 00 00 00 00];
};
};
&port01 {
/* SD card reader */
bus-range = <2 2>;
sdhci0: mmc@0,0 {
compatible = "pci17a0,9755";
reg = <0x20000 0x0 0x0 0x0 0x0>;
cd-inverted;
wp-inverted;
};
};
&port02 {
/* 10 Gbit Ethernet */
bus-range = <3 3>;
status = "okay";
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 00];
};
};
&port03 {
/* USB xHCI */
bus-range = <4 4>;
status = "okay";
};
&pcie0_dart_2 {
status = "okay";
};
&pcie0_dart_3 {
status = "okay";
};
#include "spi1-nvram.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-nvme.dtsi
+42
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* NVMe related devices for Apple T600x SoCs.
*
* Copyright The Asahi Linux Contributors
*/
DIE_NODE(ans_mbox): mbox@38f408000 {
compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x3 0x8f408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1069 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1070 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1071 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1072 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
power-domains = <&DIE_NODE(ps_ans2)>;
#mbox-cells = <0>;
};
DIE_NODE(sart): sart@393c50000 {
compatible = "apple,t6000-sart";
reg = <0x3 0x93c50000 0x0 0x10000>;
power-domains = <&DIE_NODE(ps_ans2)>;
};
DIE_NODE(nvme): nvme@393cc0000 {
compatible = "apple,t6000-nvme-ans2", "apple,nvme-ans2";
reg = <0x3 0x93cc0000 0x0 0x40000>, <0x3 0x8f400000 0x0 0x4000>;
reg-names = "nvme", "ans";
interrupt-parent = <&aic>;
/* The NVME interrupt is always routed to die */
interrupts = <AIC_IRQ 0 1613 IRQ_TYPE_LEVEL_HIGH>;
mboxes = <&DIE_NODE(ans_mbox)>;
apple,sart = <&DIE_NODE(sart)>;
power-domains = <&DIE_NODE(ps_ans2)>,
<&DIE_NODE(ps_apcie_st_sys)>,
<&DIE_NODE(ps_apcie_st1_sys)>;
power-domain-names = "ans", "apcie0", "apcie1";
resets = <&DIE_NODE(ps_ans2)>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t600x-pmgr.dtsi
+2012
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linux-7.2.3/arch/arm64/boot/dts/apple/t6020-j414s.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14-inch, M2 Pro, 2023)
*
* target-type: J414s
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6020.dtsi"
#include "t602x-j414-j416.dtsi"
/ {
compatible = "apple,j414s", "apple,t6020", "apple,arm-platform";
model = "Apple MacBook Pro (14-inch, M2 Pro, 2023)";
};
&wifi0 {
brcm,board-type = "apple,tokara";
};
&bluetooth0 {
brcm,board-type = "apple,tokara";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6020-j416s.dts
+26
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (16-inch, M2 Pro, 2023)
*
* target-type: J416s
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6020.dtsi"
#include "t602x-j414-j416.dtsi"
/ {
compatible = "apple,j416s", "apple,t6020", "apple,arm-platform";
model = "Apple MacBook Pro (16-inch, M2 Pro, 2023)";
};
&wifi0 {
brcm,board-type = "apple,amami";
};
&bluetooth0 {
brcm,board-type = "apple,amami";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6020-j474s.dts
+47
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac mini (M2 Pro, 2023)
*
* target-type: J474s
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6020.dtsi"
/*
* This model is very similar to M1 and M2 Mac Studio models so base it on those
* and remove the missing SDHCI controller.
*/
#include "t602x-j474-j475.dtsi"
/ {
compatible = "apple,j474s", "apple,t6020", "apple,arm-platform";
model = "Apple Mac mini (M2 Pro, 2023)";
};
/* PCIe devices */
&wifi0 {
compatible = "pci14e4,4434";
brcm,board-type = "apple,tasmania";
};
&bluetooth0 {
compatible = "pci14e4,5f72";
brcm,board-type = "apple,tasmania";
};
/*
* port01 is unused, remove the PCIe sdhci0 node from t600x-j375.dtsi and adjust
* the iommu-map.
*/
/delete-node/ &sdhci0;
&pcie0 {
iommu-map = <0x100 &pcie0_dart_0 1 1>,
<0x200 &pcie0_dart_2 1 1>,
<0x300 &pcie0_dart_3 1 1>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6020.dtsi
+22
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6020 "M2 Pro" SoC
*
* Other names: H14J, "Rhodes Chop"
*
* Copyright The Asahi Linux Contributors
*/
/* This chip is just a cut down version of t6021, so include it and disable the missing parts */
#include "t6021.dtsi"
/ {
compatible = "apple,t6020", "apple,arm-platform";
};
/delete-node/ &pmgr_south;
&gpu {
compatible = "apple,agx-g14s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6021-j414c.dts
+26
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14-inch, M2 Max, 2023)
*
* target-type: J414c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6021.dtsi"
#include "t602x-j414-j416.dtsi"
/ {
compatible = "apple,j414c", "apple,t6021", "apple,arm-platform";
model = "Apple MacBook Pro (14-inch, M2 Max, 2023)";
};
&wifi0 {
brcm,board-type = "apple,tokara";
};
&bluetooth0 {
brcm,board-type = "apple,tokara";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6021-j416c.dts
+26
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (16-inch, M2 Max, 2022)
*
* target-type: J416c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6021.dtsi"
#include "t602x-j414-j416.dtsi"
/ {
compatible = "apple,j416c", "apple,t6021", "apple,arm-platform";
model = "Apple MacBook Pro (16-inch, M2 Max, 2023)";
};
&wifi0 {
brcm,board-type = "apple,amami";
};
&bluetooth0 {
brcm,board-type = "apple,amami";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6021-j475c.dts
+37
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (M2 Max, 2023)
*
* target-type: J475c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6021.dtsi"
#include "t602x-j474-j475.dtsi"
/ {
compatible = "apple,j475c", "apple,t6021", "apple,arm-platform";
model = "Apple Mac Studio (M2 Max, 2023)";
};
&wifi0 {
compatible = "pci14e4,4434";
brcm,board-type = "apple,canary";
};
&bluetooth0 {
compatible = "pci14e4,5f72";
brcm,board-type = "apple,canary";
};
/* enable PCIe port01 with SDHCI */
&port01 {
status = "okay";
};
&pcie0_dart_1 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6021.dtsi
+69
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6021 "M2 Max" SoC
*
* Other names: H14J, "Rhodes"
*
* Copyright The Asahi Linux Contributors
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"
#include "t602x-common.dtsi"
/ {
compatible = "apple,t6021", "apple,arm-platform";
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
nonposted-mmio;
// filled via templated includes at the end of the file
};
};
#define DIE
#define DIE_NO 0
&{/soc} {
#include "t602x-die0.dtsi"
#include "t602x-dieX.dtsi"
#include "t602x-nvme.dtsi"
};
#include "t602x-gpio-pins.dtsi"
#include "t602x-pmgr.dtsi"
#undef DIE
#undef DIE_NO
&aic {
affinities {
e-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_E>;
cpus = <&cpu_e00 &cpu_e01 &cpu_e02 &cpu_e03>;
};
p-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_P>;
cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03
&cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13>;
};
};
};
&gpu {
compatible = "apple,agx-g14c", "apple,agx-g14s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6022-j180d.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Pro (M2 Ultra, 2023)
*
* target-type: J180d
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6022.dtsi"
#include "t6022-jxxxd.dtsi"
/ {
compatible = "apple,j180d", "apple,t6022", "apple,arm-platform";
model = "Apple Mac Pro (M2 Ultra, 2023)";
chassis-type = "server";
aliases {
atcphy0 = &atcphy0;
atcphy1 = &atcphy1;
atcphy2 = &atcphy2;
atcphy3 = &atcphy3;
atcphy4 = &atcphy0_die1;
atcphy5 = &atcphy1_die1;
atcphy6 = &atcphy2_die1;
atcphy7 = &atcphy3_die1;
nvram = &nvram;
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
power-domains = <&ps_dispext0_cpu0_die1>, <&ps_dptx_phy_ps_die1>;
};
};
memory@10000000000 {
device_type = "memory";
reg = <0x100 0 0x2 0>; /* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
/* USB Type C Rear */
&i2c0 {
hpm2: usb-pd@3b {
compatible = "apple,cd321x";
reg = <0x3b>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec2: connector {
compatible = "usb-c-connector";
label = "USB-C Back 1";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec2_connector_hs: endpoint {
remote-endpoint = <&dwc3_2_hs>;
};
};
port@1 {
reg = <1>;
typec2_connector_ss: endpoint {
remote-endpoint = <&atcphy2_typec_lanes>;
};
};
};
};
};
hpm3: usb-pd@3c {
compatible = "apple,cd321x";
reg = <0x3c>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec3: connector {
compatible = "usb-c-connector";
label = "USB-C Back 2";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec3_connector_hs: endpoint {
remote-endpoint = <&dwc3_3_hs>;
};
};
port@1 {
reg = <1>;
typec3_connector_ss: endpoint {
remote-endpoint = <&atcphy3_typec_lanes>;
};
};
};
};
};
/* hpm4 and hpm5 included from t6022-jxxxd.dtsi */
hpm6: usb-pd@3d {
compatible = "apple,cd321x";
reg = <0x3d>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec6: connector {
compatible = "usb-c-connector";
label = "USB-C Back 5";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec6_connector_hs: endpoint {
remote-endpoint = <&dwc3_6_hs>;
};
};
port@1 {
reg = <1>;
typec6_connector_ss: endpoint {
remote-endpoint = <&atcphy6_typec_lanes>;
};
};
};
};
};
hpm7: usb-pd@3e {
compatible = "apple,cd321x";
reg = <0x3e>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec7: connector {
compatible = "usb-c-connector";
label = "USB-C Back 6";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec7_connector_hs: endpoint {
remote-endpoint = <&dwc3_7_hs>;
};
};
port@1 {
reg = <1>;
typec7_connector_ss: endpoint {
remote-endpoint = <&atcphy7_typec_lanes>;
};
};
};
};
};
};
&typec4 {
label = "USB-C Back 3";
};
&typec5 {
label = "USB-C Back 4";
};
/* USB Type C Front */
&i2c3 {
status = "okay";
hpm0: usb-pd@38 {
compatible = "apple,cd321x";
reg = <0x38>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec0: connector {
compatible = "usb-c-connector";
label = "USB-C Top Right";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec0_connector_hs: endpoint {
remote-endpoint = <&dwc3_0_hs>;
};
};
port@1 {
reg = <1>;
typec0_connector_ss: endpoint {
remote-endpoint = <&atcphy0_typec_lanes>;
};
};
};
};
};
hpm1: usb-pd@3f {
compatible = "apple,cd321x";
reg = <0x3f>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec1: connector {
compatible = "usb-c-connector";
label = "USB-C Top Left";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec1_connector_hs: endpoint {
remote-endpoint = <&dwc3_1_hs>;
};
};
port@1 {
reg = <1>;
typec1_connector_ss: endpoint {
remote-endpoint = <&atcphy1_typec_lanes>;
};
};
};
};
};
};
/* USB controllers */
&dwc3_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_0_hs: endpoint {
remote-endpoint = <&typec0_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_0_ss: endpoint {
remote-endpoint = <&atcphy0_usb3>;
};
};
};
};
&dwc3_1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_1_hs: endpoint {
remote-endpoint = <&typec1_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_1_ss: endpoint {
remote-endpoint = <&atcphy1_usb3>;
};
};
};
};
&dwc3_2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_2_hs: endpoint {
remote-endpoint = <&typec2_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_2_ss: endpoint {
remote-endpoint = <&atcphy2_usb3>;
};
};
};
};
&dwc3_3 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_3_hs: endpoint {
remote-endpoint = <&typec3_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_3_ss: endpoint {
remote-endpoint = <&atcphy3_usb3>;
};
};
};
};
/* USB controllers on die 1 */
&dwc3_2_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_6_hs: endpoint {
remote-endpoint = <&typec6_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_6_ss: endpoint {
remote-endpoint = <&atcphy6_usb3>;
};
};
};
};
&dwc3_3_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_7_hs: endpoint {
remote-endpoint = <&typec7_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_7_ss: endpoint {
remote-endpoint = <&atcphy7_usb3>;
};
};
};
};
/* Type-C PHYs */
&atcphy0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy0_typec_lanes: endpoint {
remote-endpoint = <&typec0_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy0_usb3: endpoint {
remote-endpoint = <&dwc3_0_ss>;
};
};
};
};
&atcphy1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy1_typec_lanes: endpoint {
remote-endpoint = <&typec1_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy1_usb3: endpoint {
remote-endpoint = <&dwc3_1_ss>;
};
};
};
};
&atcphy2 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy2_typec_lanes: endpoint {
remote-endpoint = <&typec2_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy2_usb3: endpoint {
remote-endpoint = <&dwc3_2_ss>;
};
};
};
};
&atcphy3 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy3_typec_lanes: endpoint {
remote-endpoint = <&typec3_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy3_usb3: endpoint {
remote-endpoint = <&dwc3_3_ss>;
};
};
};
};
&atcphy2_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy6_typec_lanes: endpoint {
remote-endpoint = <&typec6_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy6_usb3: endpoint {
remote-endpoint = <&dwc3_6_ss>;
};
};
};
};
&atcphy3_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy7_typec_lanes: endpoint {
remote-endpoint = <&typec7_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy7_usb3: endpoint {
remote-endpoint = <&dwc3_7_ss>;
};
};
};
};
/*
* Delete unused PCIe nodes, the Mac Pro uses slightly different PCIe
* controllers with a single port connected to a PM40100 PCIe switch
*/
/delete-node/ &pcie0;
/delete-node/ &pcie0_dart_0;
/delete-node/ &pcie0_dart_1;
/delete-node/ &pcie0_dart_2;
/delete-node/ &pcie0_dart_3;
&nco_clkref {
clock-frequency = <1068000000>;
};
#include "spi1-nvram.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/t6022-j475d.dts
+73
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (M2 Ultra, 2023)
*
* target-type: J475d
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6022.dtsi"
#include "t602x-j474-j475.dtsi"
#include "t6022-jxxxd.dtsi"
/ {
compatible = "apple,j475d", "apple,t6022", "apple,arm-platform";
model = "Apple Mac Studio (M2 Ultra, 2023)";
aliases {
atcphy4 = &atcphy0_die1;
atcphy5 = &atcphy1_die1;
};
};
&framebuffer0 {
power-domains = <&ps_dispext0_cpu0_die1>, <&ps_dptx_phy_ps_die1>;
};
/* enable PCIe port01 with SDHCI */
&port01 {
status = "okay";
};
&pcie0_dart_1 {
status = "okay";
};
&typec4 {
label = "USB-C Front Right";
};
&typec5 {
label = "USB-C Front Left";
};
/* delete unused USB nodes on die 1 */
/delete-node/ &dwc3_2_dart_0_die1;
/delete-node/ &dwc3_2_dart_1_die1;
/delete-node/ &dwc3_2_die1;
/delete-node/ &atcphy2_die1;
/delete-node/ &dwc3_3_dart_0_die1;
/delete-node/ &dwc3_3_dart_1_die1;
/delete-node/ &dwc3_3_die1;
/delete-node/ &atcphy3_die1;
/* delete unused always-on power-domains on die 1 */
/delete-node/ &ps_atc2_usb_aon_die1;
/delete-node/ &ps_atc2_usb_die1;
/delete-node/ &ps_atc3_usb_aon_die1;
/delete-node/ &ps_atc3_usb_die1;
&wifi0 {
compatible = "pci14e4,4434";
brcm,board-type = "apple,canary";
};
&bluetooth0 {
compatible = "pci14e4,5f72";
brcm,board-type = "apple,canary";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi
+171
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Pro (M2 Ultra, 2023) and Mac Studio (M2 Ultra, 2023)
*
* This file contains the parts common to J180 and J475 devices with t6022.
*
* target-type: J180d / J475d
*
* Copyright The Asahi Linux Contributors
*/
/* delete power-domains for missing disp0 / disp0_die1 */
/delete-node/ &ps_disp0_cpu0;
/delete-node/ &ps_disp0_fe;
/delete-node/ &ps_disp0_cpu0_die1;
/delete-node/ &ps_disp0_fe_die1;
/* USB Type C */
&i2c0 {
/* front-right */
hpm4: usb-pd@39 {
compatible = "apple,cd321x";
reg = <0x39>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec4: connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec4_connector_hs: endpoint {
remote-endpoint = <&dwc3_4_hs>;
};
};
port@1 {
reg = <1>;
typec4_connector_ss: endpoint {
remote-endpoint = <&atcphy4_typec_lanes>;
};
};
};
};
};
/* front-left */
hpm5: usb-pd@3a {
compatible = "apple,cd321x";
reg = <0x3a>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec5: connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec5_connector_hs: endpoint {
remote-endpoint = <&dwc3_5_hs>;
};
};
port@1 {
reg = <1>;
typec5_connector_ss: endpoint {
remote-endpoint = <&atcphy5_typec_lanes>;
};
};
};
};
};
};
/* USB controllers on die 1 */
&dwc3_0_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_4_hs: endpoint {
remote-endpoint = <&typec4_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_4_ss: endpoint {
remote-endpoint = <&atcphy4_usb3>;
};
};
};
};
&dwc3_1_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_5_hs: endpoint {
remote-endpoint = <&typec5_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_5_ss: endpoint {
remote-endpoint = <&atcphy5_usb3>;
};
};
};
};
/* Type-C PHYs */
&atcphy0_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy4_typec_lanes: endpoint {
remote-endpoint = <&typec4_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy4_usb3: endpoint {
remote-endpoint = <&dwc3_4_ss>;
};
};
};
};
&atcphy1_die1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy5_typec_lanes: endpoint {
remote-endpoint = <&typec5_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy5_usb3: endpoint {
remote-endpoint = <&dwc3_5_ss>;
};
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t6022.dtsi
+349
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T6022 "M2 Ultra" SoC
*
* Other names: H14J, "Rhodes 2C"
*
* Copyright The Asahi Linux Contributors
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"
#include "t602x-common.dtsi"
/ {
compatible = "apple,t6022", "apple,arm-platform";
#address-cells = <2>;
#size-cells = <2>;
cpus {
cpu-map {
cluster3 {
core0 {
cpu = <&cpu_e10>;
};
core1 {
cpu = <&cpu_e11>;
};
core2 {
cpu = <&cpu_e12>;
};
core3 {
cpu = <&cpu_e13>;
};
};
cluster4 {
core0 {
cpu = <&cpu_p20>;
};
core1 {
cpu = <&cpu_p21>;
};
core2 {
cpu = <&cpu_p22>;
};
core3 {
cpu = <&cpu_p23>;
};
};
cluster5 {
core0 {
cpu = <&cpu_p30>;
};
core1 {
cpu = <&cpu_p31>;
};
core2 {
cpu = <&cpu_p32>;
};
core3 {
cpu = <&cpu_p33>;
};
};
};
cpu_e10: cpu@800 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x800>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_e11: cpu@801 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x801>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_e12: cpu@802 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x802>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_e13: cpu@803 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x803>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_3>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e_die1>;
};
cpu_p20: cpu@10900 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10900>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p21: cpu@10901 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10901>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p22: cpu@10902 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10902>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p23: cpu@10903 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10903>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_4>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0_die1>;
};
cpu_p30: cpu@10a00 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10a00>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p31: cpu@10a01 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10a01>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p32: cpu@10a02 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10a02>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
cpu_p33: cpu@10a03 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10a03>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_5>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1_die1>;
};
l2_cache_3: l2-cache-3 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x400000>;
};
l2_cache_4: l2-cache-4 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x1000000>;
};
l2_cache_5: l2-cache-5 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x1000000>;
};
};
die0: soc@200000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x02 0x00000000 0x02 0x00000000 0x4 0x00000000>,
<0x05 0x80000000 0x05 0x80000000 0x1 0x80000000>,
<0x07 0x00000000 0x07 0x00000000 0xf 0x80000000>,
<0x16 0x80000000 0x16 0x80000000 0x5 0x80000000>;
nonposted-mmio;
/* Required to get >32-bit DMA via DARTs */
dma-ranges = <0 0 0 0 0xffffffff 0xffffc000>;
// filled via templated includes at the end of the file
};
die1: soc@2200000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x02 0x00000000 0x22 0x00000000 0x4 0x00000000>,
<0x07 0x00000000 0x27 0x00000000 0xf 0x80000000>,
<0x16 0x80000000 0x36 0x80000000 0x5 0x80000000>;
nonposted-mmio;
/* Required to get >32-bit DMA via DARTs */
dma-ranges = <0 0 0 0 0xffffffff 0xffffc000>;
// filled via templated includes at the end of the file
};
};
#define DIE
#define DIE_NO 0
&die0 {
#include "t602x-die0.dtsi"
#include "t602x-dieX.dtsi"
};
#include "t602x-pmgr.dtsi"
#include "t602x-gpio-pins.dtsi"
#undef DIE
#undef DIE_NO
#define DIE _die1
#define DIE_NO 1
&die1 {
#include "t602x-dieX.dtsi"
#include "t602x-nvme.dtsi"
};
#include "t602x-pmgr.dtsi"
/delete-node/ &ps_pmp_die1;
#undef DIE
#undef DIE_NO
&aic {
affinities {
e-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_E>;
cpus = <&cpu_e00 &cpu_e01 &cpu_e02 &cpu_e03
&cpu_e10 &cpu_e11 &cpu_e12 &cpu_e13>;
};
p-core-pmu-affinity {
apple,fiq-index = <AIC_CPU_PMU_P>;
cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03
&cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13
&cpu_p20 &cpu_p21 &cpu_p22 &cpu_p23
&cpu_p30 &cpu_p31 &cpu_p32 &cpu_p33>;
};
};
};
&ps_gfx {
// On t6022, the die0 GPU power domain needs both AFR power domains
power-domains = <&ps_afr>, <&ps_afr_die1>;
};
&gpu {
compatible = "apple,agx-g14d", "apple,agx-g14s";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-common.dtsi
+465
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Nodes common to all T602x family SoCs (M2 Pro/Max/Ultra)
*
* Other names: H14J, "Rhodes Chop", "Rhodes", "Rhodes 2C"
*
* Copyright The Asahi Linux Contributors
*/
/ {
#address-cells = <2>;
#size-cells = <2>;
aliases {
gpu = &gpu;
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu_e00>;
};
core1 {
cpu = <&cpu_e01>;
};
core2 {
cpu = <&cpu_e02>;
};
core3 {
cpu = <&cpu_e03>;
};
};
cluster1 {
core0 {
cpu = <&cpu_p00>;
};
core1 {
cpu = <&cpu_p01>;
};
core2 {
cpu = <&cpu_p02>;
};
core3 {
cpu = <&cpu_p03>;
};
};
cluster2 {
core0 {
cpu = <&cpu_p10>;
};
core1 {
cpu = <&cpu_p11>;
};
core2 {
cpu = <&cpu_p12>;
};
core3 {
cpu = <&cpu_p13>;
};
};
};
cpu_e00: cpu@0 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e>;
};
cpu_e01: cpu@1 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e>;
};
cpu_e02: cpu@2 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e>;
};
cpu_e03: cpu@3 {
compatible = "apple,blizzard";
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
next-level-cache = <&l2_cache_0>;
i-cache-size = <0x20000>;
d-cache-size = <0x10000>;
operating-points-v2 = <&blizzard_opp>;
capacity-dmips-mhz = <756>;
performance-domains = <&cpufreq_e>;
};
cpu_p00: cpu@10100 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10100>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p01: cpu@10101 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10101>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p02: cpu@10102 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10102>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p03: cpu@10103 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10103>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_1>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p0>;
};
cpu_p10: cpu@10200 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10200>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p11: cpu@10201 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10201>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p12: cpu@10202 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10202>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
cpu_p13: cpu@10203 {
compatible = "apple,avalanche";
device_type = "cpu";
reg = <0x0 0x10203>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
next-level-cache = <&l2_cache_2>;
i-cache-size = <0x30000>;
d-cache-size = <0x20000>;
operating-points-v2 = <&avalanche_opp>;
capacity-dmips-mhz = <1024>;
performance-domains = <&cpufreq_p1>;
};
l2_cache_0: l2-cache-0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x400000>;
};
l2_cache_1: l2-cache-1 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x1000000>;
};
l2_cache_2: l2-cache-2 {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x1000000>;
};
};
blizzard_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
/* pstate #1 is a dummy clone of #2 */
opp02 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <2>;
clock-latency-ns = <7700>;
};
opp03 {
opp-hz = /bits/ 64 <1284000000>;
opp-level = <3>;
clock-latency-ns = <25000>;
};
opp04 {
opp-hz = /bits/ 64 <1752000000>;
opp-level = <4>;
clock-latency-ns = <33000>;
};
opp05 {
opp-hz = /bits/ 64 <2004000000>;
opp-level = <5>;
clock-latency-ns = <38000>;
};
opp06 {
opp-hz = /bits/ 64 <2256000000>;
opp-level = <6>;
clock-latency-ns = <44000>;
};
opp07 {
opp-hz = /bits/ 64 <2424000000>;
opp-level = <7>;
clock-latency-ns = <48000>;
};
};
avalanche_opp: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp01 {
opp-hz = /bits/ 64 <702000000>;
opp-level = <1>;
clock-latency-ns = <7400>;
};
opp02 {
opp-hz = /bits/ 64 <948000000>;
opp-level = <2>;
clock-latency-ns = <18000>;
};
opp03 {
opp-hz = /bits/ 64 <1188000000>;
opp-level = <3>;
clock-latency-ns = <21000>;
};
opp04 {
opp-hz = /bits/ 64 <1452000000>;
opp-level = <4>;
clock-latency-ns = <24000>;
};
opp05 {
opp-hz = /bits/ 64 <1704000000>;
opp-level = <5>;
clock-latency-ns = <28000>;
};
opp06 {
opp-hz = /bits/ 64 <1968000000>;
opp-level = <6>;
clock-latency-ns = <31000>;
};
opp07 {
opp-hz = /bits/ 64 <2208000000>;
opp-level = <7>;
clock-latency-ns = <33000>;
};
opp08 {
opp-hz = /bits/ 64 <2400000000>;
opp-level = <8>;
clock-latency-ns = <45000>;
};
opp09 {
opp-hz = /bits/ 64 <2568000000>;
opp-level = <9>;
clock-latency-ns = <47000>;
};
opp10 {
opp-hz = /bits/ 64 <2724000000>;
opp-level = <10>;
clock-latency-ns = <50000>;
};
opp11 {
opp-hz = /bits/ 64 <2868000000>;
opp-level = <11>;
clock-latency-ns = <52000>;
};
opp12 {
opp-hz = /bits/ 64 <3000000000>;
opp-level = <12>;
clock-latency-ns = <57000>;
};
opp13 {
opp-hz = /bits/ 64 <3132000000>;
opp-level = <13>;
clock-latency-ns = <60000>;
};
opp14 {
opp-hz = /bits/ 64 <3264000000>;
opp-level = <14>;
clock-latency-ns = <64000>;
};
opp15 {
opp-hz = /bits/ 64 <3360000000>;
opp-level = <15>;
clock-latency-ns = <64000>;
turbo-mode;
};
opp16 {
opp-hz = /bits/ 64 <3408000000>;
opp-level = <16>;
clock-latency-ns = <64000>;
turbo-mode;
};
opp17 {
opp-hz = /bits/ 64 <3504000000>;
opp-level = <17>;
clock-latency-ns = <64000>;
turbo-mode;
};
};
pmu-e {
compatible = "apple,blizzard-pmu";
interrupt-parent = <&aic>;
interrupts = <AIC_FIQ 0 AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
};
pmu-p {
compatible = "apple,avalanche-pmu";
interrupt-parent = <&aic>;
interrupts = <AIC_FIQ 0 AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
interrupts = <AIC_FIQ 0 AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ 0 AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
clk_200m: clock-200m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
clock-output-names = "clk_200m";
};
/*
* This is a fabulated representation of the input clock
* to NCO since we don't know the true clock tree.
*/
nco_clkref: clock-ref-nco {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "nco_ref";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpu_globals: globals {
status = "disabled";
};
gpu_hw_cal_a: hw-cal-a {
status = "disabled";
};
gpu_hw_cal_b: hw-cal-b {
status = "disabled";
};
uat_handoff: uat-handoff {
status = "disabled";
};
uat_pagetables: uat-pagetables {
status = "disabled";
};
uat_ttbs: uat-ttbs {
status = "disabled";
};
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-die0.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Devices used on die 0 on the Apple T6022 "M2 Ultra" SoC and present on
* Apple T6020 / T6021 "M2 Pro" / "M2 Max".
*
* Copyright The Asahi Linux Contributors
*/
nco: clock-controller@28e03c000 {
compatible = "apple,t6020-nco", "apple,t8103-nco";
reg = <0x2 0x8e03c000 0x0 0x14000>;
clocks = <&nco_clkref>;
#clock-cells = <1>;
};
aic: interrupt-controller@28e100000 {
compatible = "apple,t6020-aic", "apple,aic2";
#interrupt-cells = <4>;
interrupt-controller;
reg = <0x2 0x8e100000 0x0 0xc000>,
<0x2 0x8e10c000 0x0 0x1000>;
reg-names = "core", "event";
power-domains = <&ps_aic>;
};
nub_spmi0: spmi@29e114000 {
compatible = "apple,t6020-spmi", "apple,t8103-spmi";
reg = <0x2 0x9e114000 0x0 0x100>;
#address-cells = <2>;
#size-cells = <0>;
pmic1: pmic@f {
compatible = "apple,maverick-pmic", "apple,spmi-nvmem";
reg = <0xb SPMI_USID>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
pm_setting: pm-setting@1405 {
reg = <0x1405 0x1>;
};
rtc_offset: rtc-offset@1411 {
reg = <0x1411 0x6>;
};
boot_stage: boot-stage@6001 {
reg = <0x6001 0x1>;
};
boot_error_count: boot-error-count@6002,0 {
reg = <0x6002 0x1>;
bits = <0 4>;
};
panic_count: panic-count@6002,4 {
reg = <0x6002 0x1>;
bits = <4 4>;
};
boot_error_stage: boot-error-stage@6003 {
reg = <0x6003 0x1>;
};
shutdown_flag: shutdown-flag@600f,3 {
reg = <0x600f 0x1>;
bits = <3 1>;
};
fault_shadow: fault-shadow@867b {
reg = <0x867b 0x10>;
};
socd: socd@8b00 {
reg = <0x8b00 0x400>;
};
};
};
};
wdt: watchdog@29e2c4000 {
compatible = "apple,t6020-wdt", "apple,t8103-wdt";
reg = <0x2 0x9e2c4000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 719 IRQ_TYPE_LEVEL_HIGH>;
};
smc_mbox: mbox@2a2408000 {
compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x2 0xa2408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 862 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 863 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 864 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 865 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
#mbox-cells = <0>;
};
smc: smc@2a2400000 {
compatible = "apple,t6020-smc", "apple,t8103-smc";
reg = <0x2 0xa2400000 0x0 0x4000>,
<0x2 0xa3e00000 0x0 0x100000>;
reg-names = "smc", "sram";
mboxes = <&smc_mbox>;
smc_gpio: gpio {
compatible = "apple,smc-gpio";
gpio-controller;
#gpio-cells = <2>;
};
smc_reboot: reboot {
compatible = "apple,smc-reboot";
nvmem-cells = <&shutdown_flag>, <&boot_stage>,
<&boot_error_count>, <&panic_count>;
nvmem-cell-names = "shutdown_flag", "boot_stage",
"boot_error_count", "panic_count";
};
rtc {
compatible = "apple,smc-rtc";
nvmem-cells = <&rtc_offset>;
nvmem-cell-names = "rtc_offset";
};
};
pinctrl_smc: pinctrl@2a2820000 {
compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";
reg = <0x2 0xa2820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_smc 0 0 30>;
apple,npins = <30>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 851 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 852 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 853 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 854 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 855 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 856 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 857 IRQ_TYPE_LEVEL_HIGH>;
};
sio_dart: iommu@39b008000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x3 0x9b008000 0x0 0x8000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1231 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_sio_cpu>;
};
fpwm0: pwm@39b030000 {
compatible = "apple,t6020-fpwm", "apple,s5l-fpwm";
reg = <0x3 0x9b030000 0x0 0x4000>;
power-domains = <&ps_fpwm0>;
clocks = <&clkref>;
#pwm-cells = <2>;
status = "disabled";
};
i2c0: i2c@39b040000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b040000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1219 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c1: i2c@39b044000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b044000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1220 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c2: i2c@39b048000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b048000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1221 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c3: i2c@39b04c000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b04c000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1222 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c4: i2c@39b050000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b050000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1223 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c5: i2c@39b054000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b054000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1224 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c5_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c5>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c6: i2c@39b054000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b054000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1225 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c6_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c6>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c7: i2c@39b054000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b054000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1226 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c7_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c7>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
i2c8: i2c@39b054000 {
compatible = "apple,t6020-i2c", "apple,t8103-i2c";
reg = <0x3 0x9b054000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1227 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c8_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c8>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled";
};
spi1: spi@39b104000 {
compatible = "apple,t6020-spi", "apple,t8103-spi";
reg = <0x3 0x9b104000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1206 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_200m>;
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
power-domains = <&ps_spi1>;
status = "disabled";
};
spi2: spi@39b108000 {
compatible = "apple,t6020-spi", "apple,t8103-spi";
reg = <0x3 0x9b108000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1207 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkref>;
pinctrl-0 = <&spi2_pins>;
pinctrl-names = "default";
power-domains = <&ps_spi2>;
status = "disabled";
};
spi4: spi@39b110000 {
compatible = "apple,t6020-spi", "apple,t8103-spi";
reg = <0x3 0x9b110000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1209 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkref>;
pinctrl-0 = <&spi4_pins>;
pinctrl-names = "default";
power-domains = <&ps_spi4>;
status = "disabled";
};
serial0: serial@39b200000 {
compatible = "apple,s5l-uart";
reg = <0x3 0x9b200000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1198 IRQ_TYPE_LEVEL_HIGH>;
/*
* TODO: figure out the clocking properly, there may
* be a third selectable clock.
*/
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
admac: dma-controller@39b400000 {
compatible = "apple,t6020-admac", "apple,t8103-admac";
reg = <0x3 0x9b400000 0x0 0x34000>;
#dma-cells = <1>;
dma-channels = <16>;
interrupts-extended = <0>,
<&aic AIC_IRQ 0 1218 IRQ_TYPE_LEVEL_HIGH>,
<0>,
<0>;
iommus = <&sio_dart 2>;
power-domains = <&ps_sio_adma>;
resets = <&ps_audio_p>;
};
mca: mca@39b600000 {
compatible = "apple,t6020-mca", "apple,t8103-mca";
reg = <0x3 0x9b600000 0x0 0x10000>,
<0x3 0x9b500000 0x0 0x20000>;
clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
<&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>,
<&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>,
<&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>;
dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
"tx1a", "rx1a", "tx1b", "rx1b",
"tx2a", "rx2a", "tx2b", "rx2b",
"tx3a", "rx3a", "tx3b", "rx3b";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1211 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1212 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1213 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1214 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
<&ps_mca2>, <&ps_mca3>;
resets = <&ps_audio_p>;
#sound-dai-cells = <1>;
};
gpu: gpu@406400000 {
compatible = "apple,agx-g14s";
reg = <0x4 0x6400000 0 0x40000>,
<0x4 0x4000000 0 0x1000000>;
reg-names = "asc", "sgx";
mboxes = <&agx_mbox>;
power-domains = <&ps_gfx>;
memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>,
<&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>;
memory-region-names = "ttbs", "pagetables", "handoff",
"hw-cal-a", "hw-cal-b", "globals";
apple,firmware-abi = <0 0 0>;
};
agx_mbox: mbox@406408000 {
compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x4 0x6408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1143 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1144 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1145 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1146 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
#mbox-cells = <0>;
};
pcie0: pcie@580000000 {
compatible = "apple,t6020-pcie";
device_type = "pci";
reg = <0x5 0x80000000 0x0 0x1000000>, /* config */
<0x5 0x91000000 0x0 0x4000>, /* rc */
<0x5 0x94008000 0x0 0x4000>, /* port0 */
<0x5 0x95008000 0x0 0x4000>, /* port1 */
<0x5 0x96008000 0x0 0x4000>, /* port2 */
<0x5 0x97008000 0x0 0x4000>, /* port3 */
<0x5 0x9e00c000 0x0 0x4000>, /* phy0 */
<0x5 0x9e010000 0x0 0x4000>, /* phy1 */
<0x5 0x9e014000 0x0 0x4000>, /* phy2 */
<0x5 0x9e018000 0x0 0x4000>; /* phy3 */
reg-names = "config", "rc",
"port0", "port1", "port2", "port3",
"phy0", "phy1", "phy2", "phy3";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1340 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1344 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1348 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 0 1352 IRQ_TYPE_LEVEL_HIGH>;
msi-controller;
msi-parent = <&pcie0>;
msi-ranges = <&aic AIC_IRQ 0 1672 IRQ_TYPE_EDGE_RISING 32>;
iommu-map = <0x100 &pcie0_dart_0 1 1>,
<0x200 &pcie0_dart_1 1 1>,
<0x300 &pcie0_dart_2 1 1>,
<0x400 &pcie0_dart_3 1 1>;
iommu-map-mask = <0xff00>;
bus-range = <0 4>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
<0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
power-domains = <&ps_apcie_gp_sys>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
<0 0 0 2 &port00 0 0 0 1>,
<0 0 0 3 &port00 0 0 0 2>,
<0 0 0 4 &port00 0 0 0 3>;
};
port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
<0 0 0 2 &port01 0 0 0 1>,
<0 0 0 3 &port01 0 0 0 2>,
<0 0 0 4 &port01 0 0 0 3>;
status = "disabled";
};
port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
<0 0 0 2 &port02 0 0 0 1>,
<0 0 0 3 &port02 0 0 0 2>,
<0 0 0 4 &port02 0 0 0 3>;
status = "disabled";
};
port03: pci@3,0 {
device_type = "pci";
reg = <0x1800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
<0 0 0 2 &port03 0 0 0 1>,
<0 0 0 3 &port03 0 0 0 2>,
<0 0 0 4 &port03 0 0 0 3>;
status = "disabled";
};
};
pcie0_dart_0: iommu@594000000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x5 0x94000000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1341 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
};
pcie0_dart_1: iommu@595000000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x5 0x95000000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1345 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
status = "disabled";
};
pcie0_dart_2: iommu@596000000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x5 0x96000000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1349 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
status = "disabled";
};
pcie0_dart_3: iommu@597000000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x5 0x97000000 0x0 0x4000>;
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 0 1353 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp_sys>;
status = "disabled";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-dieX.dtsi
+340
View File
@@ -0,0 +1,340 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Nodes present on both dies of T6022 (M2 Ultra) and present on M2 Pro/Max.
*
* Copyright The Asahi Linux Contributors
*/
DIE_NODE(cpufreq_e): cpufreq@210e20000 {
compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";
reg = <0x2 0x10e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(cpufreq_p0): cpufreq@211e20000 {
compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";
reg = <0x2 0x11e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(cpufreq_p1): cpufreq@212e20000 {
compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";
reg = <0x2 0x12e20000 0 0x1000>;
#performance-domain-cells = <0>;
};
DIE_NODE(pmgr): power-management@28e080000 {
compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x8e080000 0 0x8000>;
};
DIE_NODE(pmgr_south): power-management@28e680000 {
compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x8e680000 0 0x8000>;
};
DIE_NODE(pmgr_east): power-management@290280000 {
compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x90280000 0 0xc000>;
};
DIE_NODE(pinctrl_nub): pinctrl@29e1f0000 {
compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";
reg = <0x2 0x9e1f0000 0x0 0x4000>;
power-domains = <&DIE_NODE(ps_nub_gpio)>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_nub) 0 0 30>;
apple,npins = <30>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 711 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 712 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 713 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 714 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 715 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 716 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 717 IRQ_TYPE_LEVEL_HIGH>;
};
DIE_NODE(pmgr_mini): power-management@29e280000 {
compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x9e280000 0 0x4000>;
};
DIE_NODE(pinctrl_aop): pinctrl@2a6820000 {
compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";
reg = <0x2 0xa6820000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_aop) 0 0 72>;
apple,npins = <72>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 598 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 599 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 600 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 601 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 602 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 603 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 604 IRQ_TYPE_LEVEL_HIGH>;
};
DIE_NODE(pinctrl_ap): pinctrl@39b028000 {
compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";
reg = <0x3 0x9b028000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 458 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 459 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 460 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 461 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 462 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 463 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 464 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkref>;
power-domains = <&DIE_NODE(ps_gpio)>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&DIE_NODE(pinctrl_ap) 0 0 255>;
apple,npins = <255>;
interrupt-controller;
#interrupt-cells = <2>;
};
DIE_NODE(pmgr_gfx): power-management@404e80000 {
compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x4 0x4e80000 0 0x4000>;
};
DIE_NODE(dwc3_0): usb@702280000 {
compatible = "apple,t6020-dwc3", "apple,t8103-dwc3";
reg = <0x7 0x02280000 0x0 0xcd00>, <0x7 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1256 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_0_dart_0) 0>,
<&DIE_NODE(dwc3_0_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
resets = <&DIE_NODE(atcphy0)>;
phys = <&DIE_NODE(atcphy0) PHY_TYPE_USB2>, <&DIE_NODE(atcphy0) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_0_dart_0): iommu@702f00000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x7 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1260 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_0_dart_1): iommu@702f80000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x7 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1260 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy0): phy@703000000 {
compatible = "apple,t6020-atcphy", "apple,t8103-atcphy";
reg = <0x7 0x03000000 0x0 0x4c000>,
<0x7 0x03050000 0x0 0x8000>,
<0x7 0x00000000 0x0 0x4000>,
<0x7 0x02a90000 0x0 0x4000>,
<0x7 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc0_usb)>;
};
DIE_NODE(dwc3_1): usb@b02280000 {
compatible = "apple,t6020-dwc3", "apple,t8103-dwc3";
reg = <0xb 0x02280000 0x0 0xcd00>, <0xb 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1274 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_1_dart_0) 0>,
<&DIE_NODE(dwc3_1_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
resets = <&DIE_NODE(atcphy1)>;
phys = <&DIE_NODE(atcphy1) PHY_TYPE_USB2>, <&DIE_NODE(atcphy1) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_1_dart_0): iommu@b02f00000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0xb 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1278 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_1_dart_1): iommu@b02f80000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0xb 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1278 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy1): phy@b03000000 {
compatible = "apple,t6020-atcphy", "apple,t8103-atcphy";
reg = <0xb 0x03000000 0x0 0x4c000>,
<0xb 0x03050000 0x0 0x8000>,
<0xb 0x00000000 0x0 0x4000>,
<0xb 0x02a90000 0x0 0x4000>,
<0xb 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc1_usb)>;
};
DIE_NODE(dwc3_2): usb@f02280000 {
compatible = "apple,t6020-dwc3", "apple,t8103-dwc3";
reg = <0xf 0x02280000 0x0 0xcd00>, <0xf 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1292 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_2_dart_0) 0>,
<&DIE_NODE(dwc3_2_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
resets = <&DIE_NODE(atcphy2)>;
phys = <&DIE_NODE(atcphy2) PHY_TYPE_USB2>, <&DIE_NODE(atcphy2) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_2_dart_0): iommu@f02f00000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0xf 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1296 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_2_dart_1): iommu@f02f80000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0xf 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1296 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy2): phy@f03000000 {
compatible = "apple,t6020-atcphy", "apple,t8103-atcphy";
reg = <0xf 0x03000000 0x0 0x4c000>,
<0xf 0x03050000 0x0 0x8000>,
<0xf 0x00000000 0x0 0x4000>,
<0xf 0x02a90000 0x0 0x4000>,
<0xf 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc2_usb)>;
};
DIE_NODE(dwc3_3): usb@1302280000 {
compatible = "apple,t6020-dwc3", "apple,t8103-dwc3";
reg = <0x13 0x02280000 0x0 0xcd00>, <0x13 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1310 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&DIE_NODE(dwc3_3_dart_0) 0>,
<&DIE_NODE(dwc3_3_dart_1) 1>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
resets = <&DIE_NODE(atcphy3)>;
phys = <&DIE_NODE(atcphy3) PHY_TYPE_USB2>, <&DIE_NODE(atcphy3) PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
DIE_NODE(dwc3_3_dart_0): iommu@1302f00000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x13 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1314 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(dwc3_3_dart_1): iommu@1302f80000 {
compatible = "apple,t6020-dart", "apple,t8110-dart";
reg = <0x13 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1314 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
#iommu-cells = <1>;
};
DIE_NODE(atcphy3): phy@1303000000 {
compatible = "apple,t6020-atcphy", "apple,t8103-atcphy";
reg = <0x13 0x03000000 0x0 0x4c000>,
<0x13 0x03050000 0x0 0x8000>,
<0x13 0x00000000 0x0 0x4000>,
<0x13 0x02a90000 0x0 0x4000>,
<0x13 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&DIE_NODE(ps_atc3_usb)>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* GPIO pin mappings for Apple T602x SoCs.
*
* Copyright The Asahi Linux Contributors
*/
&pinctrl_ap {
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(63, 1)>,
<APPLE_PINMUX(64, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(65, 1)>,
<APPLE_PINMUX(66, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(67, 1)>,
<APPLE_PINMUX(68, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(69, 1)>,
<APPLE_PINMUX(70, 1)>;
};
i2c4_pins: i2c4-pins {
pinmux = <APPLE_PINMUX(71, 1)>,
<APPLE_PINMUX(72, 1)>;
};
i2c5_pins: i2c5-pins {
pinmux = <APPLE_PINMUX(73, 1)>,
<APPLE_PINMUX(74, 1)>;
};
i2c6_pins: i2c6-pins {
pinmux = <APPLE_PINMUX(75, 1)>,
<APPLE_PINMUX(76, 1)>;
};
i2c7_pins: i2c7-pins {
pinmux = <APPLE_PINMUX(77, 1)>,
<APPLE_PINMUX(78, 1)>;
};
i2c8_pins: i2c8-pins {
pinmux = <APPLE_PINMUX(79, 1)>,
<APPLE_PINMUX(80, 1)>;
};
spi1_pins: spi1-pins {
pinmux = <APPLE_PINMUX(155, 1)>, /* SDI */
<APPLE_PINMUX(156, 1)>, /* SDO */
<APPLE_PINMUX(157, 1)>, /* SCK */
<APPLE_PINMUX(158, 1)>; /* CS */
};
spi2_pins: spi2-pins {
pinmux = <APPLE_PINMUX(159, 1)>, /* SDI */
<APPLE_PINMUX(160, 1)>, /* SDO */
<APPLE_PINMUX(161, 1)>, /* SCK */
<APPLE_PINMUX(162, 1)>; /* CS */
};
spi4_pins: spi4-pins {
pinmux = <APPLE_PINMUX(167, 1)>, /* SDI */
<APPLE_PINMUX(168, 1)>, /* SDO */
<APPLE_PINMUX(169, 1)>, /* SCK */
<APPLE_PINMUX(170, 1)>; /* CS */
};
pcie_pins: pcie-pins {
pinmux = <APPLE_PINMUX(0, 1)>,
<APPLE_PINMUX(1, 1)>,
<APPLE_PINMUX(2, 1)>,
<APPLE_PINMUX(3, 1)>;
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* MacBook Pro (14/16-inch, 2022)
*
* This file contains the parts common to J414 and J416 devices with both t6020 and t6021.
*
* target-type: J414s / J414c / J416s / J416c
*
* Copyright The Asahi Linux Contributors
*/
/*
* These models are essentially identical to the previous generation, other than
* the GPIO indices.
*/
#include "t600x-j314-j316.dtsi"
&framebuffer0 {
power-domains = <&ps_disp0_cpu0>, <&ps_dptx_phy_ps>;
};
&hpm0 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm1 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm2 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm5 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&wifi0 {
compatible = "pci14e4,4434";
};
&bluetooth0 {
compatible = "pci14e4,5f72";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac mini (M2 Pro, 2023) and Mac Studio (2023)
*
* This file contains the parts common to J474 and J475 devices with t6020,
* t6021 and t6022.
*
* target-type: J474s / J475c / J475d
*
* Copyright The Asahi Linux Contributors
*/
/*
* These models are very similar to the previous generation Mac Studio, other
* than GPIO indices.
*/
#include "t600x-j375.dtsi"
&framebuffer0 {
power-domains = <&ps_dispext0_cpu0>, <&ps_dptx_phy_ps>;
};
&hpm0 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm1 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm2 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
&hpm3 {
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-nvme.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* NVMe related devices for Apple T602x SoCs.
*
* Copyright The Asahi Linux Contributors
*/
DIE_NODE(ans_mbox): mbox@347408000 {
compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x3 0x47408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ DIE_NO 1169 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1170 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1171 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ DIE_NO 1172 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
power-domains = <&DIE_NODE(ps_ans2)>;
#mbox-cells = <0>;
};
DIE_NODE(sart): sart@34bc50000 {
compatible = "apple,t6020-sart", "apple,t6000-sart";
reg = <0x3 0x4bc50000 0x0 0x10000>;
power-domains = <&DIE_NODE(ps_ans2)>;
};
DIE_NODE(nvme): nvme@34bcc0000 {
compatible = "apple,t6020-nvme-ans2", "apple,t8103-nvme-ans2";
reg = <0x3 0x4bcc0000 0x0 0x40000>, <0x3 0x47400000 0x0 0x4000>;
reg-names = "nvme", "ans";
interrupt-parent = <&aic>;
/* The NVME interrupt is always routed to die 0 */
interrupts = <AIC_IRQ 0 1832 IRQ_TYPE_LEVEL_HIGH>;
mboxes = <&DIE_NODE(ans_mbox)>;
apple,sart = <&DIE_NODE(sart)>;
power-domains = <&DIE_NODE(ps_ans2)>,
<&DIE_NODE(ps_apcie_st_sys)>,
<&DIE_NODE(ps_apcie_st1_sys)>;
power-domain-names = "ans", "apcie0", "apcie1";
resets = <&DIE_NODE(ps_ans2)>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t602x-pmgr.dtsi
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linux-7.2.3/arch/arm64/boot/dts/apple/t7000-6.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6 / 6 Plus common device tree
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include <dt-bindings/input/input.h>
#include "t7000.dtsi"
#include "t7000-common.dtsi"
#include "t7000-handheld.dtsi"
/ {
chassis-type = "handset";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 45 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 46 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl 131 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
&typhoon_opp06 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-common.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple TV HD, iPhone 6, iPhone 6 Plus, iPad mini 4, iPod touch 6
*
* This file contains parts common to all Apple A8 devices.
*
* target-type: J42d, J96, J97, N56, N61, N102
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
aliases {
serial0 = &serial0;
serial6 = &serial6;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-handheld.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6, iPhone 6 Plus, iPad mini 4, iPod touch 6
*
* This file contains the parts common to handheld devices with t7000
*
* target-type: J96, J97, N56, N61, N102
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
chosen {
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
};
&dwi_bl {
status = "okay";
};
&serial0 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-j42d.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple TV HD, J42d, AppleTV5,3 (A1625)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000.dtsi"
#include "t7000-common.dtsi"
/ {
compatible = "apple,j42d", "apple,t7000", "apple,arm-platform";
model = "Apple TV HD";
chassis-type = "television";
chosen {
stdout-path = "serial6";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
power-domains = <&ps_disp0 &ps_dp>;
/* Format properties will be added by loader */
status = "disabled";
};
};
};
&serial6 {
status = "okay";
};
&typhoon_opp06 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-j96.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 4 (Wi-Fi), J96, iPad5,1 (A1538)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000-mini4.dtsi"
/ {
compatible = "apple,j96", "apple,t7000", "apple,arm-platform";
model = "Apple iPad mini 4 (Wi-Fi)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-j97.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 4 (Cellular), J97, iPad5,2 (A1550)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000-mini4.dtsi"
/ {
compatible = "apple,j97", "apple,t7000", "apple,arm-platform";
model = "Apple iPad mini 4 (Cellular)";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-mini4.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad mini 4 common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "t7000.dtsi"
#include "t7000-common.dtsi"
#include "t7000-handheld.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 45 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 46 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
switch-mute {
label = "Mute Switch";
gpios = <&pinctrl 36 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MUTE>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_dp>;
};
&typhoon_opp06 {
status = "okay";
};
&typhoon_opp07 {
status = "okay";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-n102.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPod touch 6, N102, iPod7,1 (A1574)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000.dtsi"
#include "t7000-common.dtsi"
#include "t7000-handheld.dtsi"
#include <dt-bindings/input/input.h>
/ {
compatible = "apple,n102", "apple,t7000", "apple,arm-platform";
model = "Apple iPod touch 6";
chassis-type = "handset";
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 46 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 45 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
};
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-n56.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6 Plus, N56, iPhone7,2 (A1549/A1586/A1589)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000-6.dtsi"
/ {
compatible = "apple,n56", "apple,t7000", "apple,arm-platform";
model = "Apple iPhone 6 Plus";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-n61.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 6, N61, iPhone7,2 (A1549/A1586/A1589)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t7000-6.dtsi"
/ {
compatible = "apple,n61", "apple,t7000", "apple,arm-platform";
model = "Apple iPhone 6";
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000-pmgr.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* PMGR Power domains for the Apple T7000 "A8" SoC
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
&pmgr {
ps_cpu0: power-controller@20000 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu0";
apple,always-on; /* Core device */
};
ps_cpu1: power-controller@20008 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu1";
apple,always-on; /* Core device */
};
ps_cpm: power-controller@20040 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20040 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpm";
apple,always-on; /* Core device */
};
ps_sio_p: power-controller@201f8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio_p";
};
ps_lio: power-controller@20100 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20100 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "lio";
apple,always-on; /* Core device */
};
ps_iomux: power-controller@20108 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20108 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "iomux";
apple,always-on; /* Core device */
};
ps_aic: power-controller@20110 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20110 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aic";
apple,always-on; /* Core device */
};
ps_debug: power-controller@20118 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20118 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "debug";
};
ps_dwi: power-controller@20120 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20120 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dwi";
};
ps_gpio: power-controller@20128 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20128 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gpio";
};
ps_mca0: power-controller@20130 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20130 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca0";
power-domains = <&ps_sio_p>;
};
ps_mca1: power-controller@20138 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20138 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca1";
power-domains = <&ps_sio_p>;
};
ps_mca2: power-controller@20140 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20140 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca2";
power-domains = <&ps_sio_p>;
};
ps_mca3: power-controller@20148 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20148 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca3";
power-domains = <&ps_sio_p>;
};
ps_mca4: power-controller@20150 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20150 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mca4";
power-domains = <&ps_sio_p>;
};
ps_pwm0: power-controller@20158 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20158 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pwm0";
power-domains = <&ps_sio_p>;
};
ps_i2c0: power-controller@20160 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20160 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c0";
power-domains = <&ps_sio_p>;
};
ps_i2c1: power-controller@20168 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20168 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c1";
power-domains = <&ps_sio_p>;
};
ps_i2c2: power-controller@20170 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20170 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c2";
power-domains = <&ps_sio_p>;
};
ps_i2c3: power-controller@20178 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20178 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "i2c3";
power-domains = <&ps_sio_p>;
};
ps_spi0: power-controller@20180 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20180 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi0";
power-domains = <&ps_sio_p>;
};
ps_spi1: power-controller@20188 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20188 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi1";
power-domains = <&ps_sio_p>;
};
ps_spi2: power-controller@20190 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20190 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi2";
power-domains = <&ps_sio_p>;
};
ps_spi3: power-controller@20198 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20198 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "spi3";
power-domains = <&ps_sio_p>;
};
ps_uart0: power-controller@201a0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart0";
power-domains = <&ps_sio_p>;
};
ps_uart1: power-controller@201a8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart1";
power-domains = <&ps_sio_p>;
};
ps_uart2: power-controller@201b0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart2";
power-domains = <&ps_sio_p>;
};
ps_uart3: power-controller@201b8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart3";
power-domains = <&ps_sio_p>;
};
ps_uart4: power-controller@201c0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart4";
power-domains = <&ps_sio_p>;
};
ps_uart5: power-controller@201c8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart5";
power-domains = <&ps_sio_p>;
};
ps_uart6: power-controller@201d0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart6";
power-domains = <&ps_sio_p>;
};
ps_uart7: power-controller@201d8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart7";
power-domains = <&ps_sio_p>;
};
ps_uart8: power-controller@201e0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart8";
power-domains = <&ps_sio_p>;
};
ps_aes0: power-controller@201e8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aes0";
power-domains = <&ps_sio_p>;
};
ps_sio: power-controller@201f0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x201f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio";
power-domains = <&ps_sio_p>;
apple,always-on; /* Core device */
};
ps_usb: power-controller@20248 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20248 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb";
};
ps_usbctrl: power-controller@20250 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20250 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbctrl";
power-domains = <&ps_usb>;
};
ps_usb2host0: power-controller@20258 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20258 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0";
power-domains = <&ps_usbctrl>;
};
ps_usb2host1: power-controller@20268 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20268 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host1";
power-domains = <&ps_usbctrl>;
};
ps_usb2host2: power-controller@20278 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20278 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host2";
power-domains = <&ps_usbctrl>;
};
ps_disp_busmux: power-controller@202a8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202a8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp_busmux";
};
ps_media: power-controller@202d8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202d8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "media";
};
ps_isp: power-controller@202d0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202d0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "isp";
};
ps_msr: power-controller@202e0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202e0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "msr";
power-domains = <&ps_media>;
};
ps_jpg: power-controller@202e8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202e8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "jpg";
power-domains = <&ps_media>;
};
ps_disp0: power-controller@202b0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202b0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp0";
power-domains = <&ps_disp_busmux>;
};
ps_disp1: power-controller@202c8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202c8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "disp1";
power-domains = <&ps_disp_busmux>;
};
ps_pcie_ref: power-controller@20220 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20220 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_ref";
};
ps_hsic0_phy: power-controller@20200 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20200 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic0_phy";
power-domains = <&ps_usb2host1>;
};
ps_hsic1_phy: power-controller@20208 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20208 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "hsic1_phy";
power-domains = <&ps_usb2host2>;
};
ps_ispsens0: power-controller@20210 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20210 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ispsens0";
};
ps_ispsens1: power-controller@20218 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20218 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ispsens1";
};
ps_mcc: power-controller@20230 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20230 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcc";
apple,always-on; /* Memory cache controller */
};
ps_mcu: power-controller@20238 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20238 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mcu";
apple,always-on; /* Core device */
};
ps_amp: power-controller@20240 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20240 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "amp";
apple,always-on; /* Core device */
};
ps_usb2host0_ohci: power-controller@20260 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20260 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usb2host0_ohci";
power-domains = <&ps_usb2host0>;
};
ps_usbotg: power-controller@20288 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20288 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "usbotg";
power-domains = <&ps_usbctrl>;
};
ps_smx: power-controller@20290 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20290 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "smx";
apple,always-on; /* Apple Fabric, critical block */
};
ps_sf: power-controller@20298 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20298 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sf";
apple,always-on; /* Apple Fabric, critical block */
};
ps_cp: power-controller@202a0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202a0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cp";
apple,always-on; /* Core device */
};
ps_mipi_dsi: power-controller@202b8 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202b8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "mipi_dsi";
power-domains = <&ps_disp_busmux>;
};
ps_dp: power-controller@202c0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202c0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "dp";
power-domains = <&ps_disp0>;
};
ps_vdec: power-controller@202f0 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x202f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "vdec";
power-domains = <&ps_media>;
};
ps_ans: power-controller@20318 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20318 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ans";
};
ps_venc: power-controller@20300 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20300 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc";
power-domains = <&ps_media>;
};
ps_pcie: power-controller@20308 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20308 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie";
};
ps_pcie_aux: power-controller@20310 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20310 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "pcie_aux";
};
ps_gfx: power-controller@20320 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20320 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "gfx";
};
ps_sep: power-controller@20400 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20400 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sep";
apple,always-on; /* Locked on */
};
ps_venc_pipe: power-controller@21000 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x21000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_pipe";
power-domains = <&ps_venc>;
};
ps_venc_me0: power-controller@21008 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x21008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me0";
power-domains = <&ps_venc>;
};
ps_venc_me1: power-controller@21010 {
compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x21010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "venc_me1";
power-domains = <&ps_venc>;
};
};
linux-7.2.3/arch/arm64/boot/dts/apple/t7000.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T7000 "A8" SoC
*
* Other names: H7P, "Fiji"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
* Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "apple,typhoon";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
compatible = "apple,typhoon";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x100000>;
};
};
typhoon_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <300>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <50000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <29000>;
};
opp04 {
opp-hz = /bits/ 64 <840000000>;
opp-level = <4>;
clock-latency-ns = <29000>;
};
opp05 {
opp-hz = /bits/ 64 <1128000000>;
opp-level = <5>;
clock-latency-ns = <36000>;
};
typhoon_opp06: opp06 {
opp-hz = /bits/ 64 <1392000000>;
opp-level = <6>;
clock-latency-ns = <42000>;
status = "disabled"; /* Not available on N102 */
};
typhoon_opp07: opp07 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <7>;
clock-latency-ns = <49000>;
status = "disabled"; /* J96 and J97 only */
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
serial6: serial@20a0d8000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0d8000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart6>;
status = "disabled";
};
i2c0: i2c@20a110000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a110000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 174 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@20a111000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a111000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 175 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@20a112000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a112000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 176 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@20a113000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a113000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 177 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pmgr: power-management@20e000000 {
compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0xe000000 0 0x24000>;
};
wdt: watchdog@20e027000 {
compatible = "apple,t7000-wdt", "apple,wdt";
reg = <0x2 0x0e027000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
};
aic: interrupt-controller@20e100000 {
compatible = "apple,t7000-aic", "apple,aic";
reg = <0x2 0x0e100000 0x0 0x100000>;
#interrupt-cells = <3>;
interrupt-controller;
power-domains = <&ps_aic>;
};
dwi_bl: backlight@20e200010 {
compatible = "apple,t7000-dwi-bl", "apple,dwi-bl";
reg = <0x2 0x0e200010 0x0 0x8>;
power-domains = <&ps_dwi>;
status = "disabled";
};
pinctrl: pinctrl@20e300000 {
compatible = "apple,t7000-pinctrl", "apple,pinctrl";
reg = <0x2 0x0e300000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 0 208>;
apple,npins = <208>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(97, 1)>,
<APPLE_PINMUX(96, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(139, 1)>,
<APPLE_PINMUX(138, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(65, 1)>,
<APPLE_PINMUX(64, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(87, 1)>,
<APPLE_PINMUX(86, 1)>;
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A8 doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "t7000-pmgr.dtsi"
linux-7.2.3/arch/arm64/boot/dts/apple/t7001-air2.dtsi
+75
View File
@@ -0,0 +1,75 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPad Air 2 common device tree
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "t7001.dtsi"
#include <dt-bindings/input/input.h>
/ {
chassis-type = "tablet";
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
power-domains = <&ps_disp0 &ps_dp>;
/* Format properties will be added by loader */
status = "disabled";
};
};
gpio-keys {
compatible = "gpio-keys";
button-home {
label = "Home Button";
gpios = <&pinctrl 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
wakeup-source;
};
button-power {
label = "Power Button";
gpios = <&pinctrl 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
button-volup {
label = "Volume Up";
gpios = <&pinctrl 92 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
button-voldown {
label = "Volume Down";
gpios = <&pinctrl 93 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
&serial0 {
status = "okay";
};

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