Resguardo inicial

This commit is contained in:
lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
@@ -0,0 +1,29 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* DT-overlay to run the PCIe3_4L Dual Mode controller in Endpoint mode
* in the SRNS (Separate Reference Clock No Spread) configuration.
*
* NOTE: If using a setup with two ROCK 5B:s, with one board running in
* RC mode and the other board running in EP mode, see also the device
* tree overlay: rk3588-rock-5b-pcie-srns.dtso.
*/
/dts-v1/;
/plugin/;
&pcie30phy {
rockchip,rx-common-refclk-mode = <0 0 0 0>;
};
&pcie3x4 {
status = "disabled";
};
&pcie3x4_ep {
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&mmu600_pcie {
status = "disabled";
};