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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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linux-7.2.3/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 07 Ralf Baechle
*/
#ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
#include <asm/cpu.h>
/*
* IP27 only comes with R1x000 family processors, all using the same config
*/
#define cpu_has_tlb 1
#define cpu_has_tlbinv 0
#define cpu_has_segments 0
#define cpu_has_eva 0
#define cpu_has_htw 0
#define cpu_has_rixiex 0
#define cpu_has_maar 0
#define cpu_has_rw_llb 0
#define cpu_has_3kex 0
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_nofpuex 0
#define cpu_has_32fpr 1
#define cpu_has_counter 1
#define cpu_has_watch 1
#define cpu_has_64bits 1
#define cpu_has_divec 0
#define cpu_has_vce 0
#define cpu_has_cache_cdex_p 0
#define cpu_has_cache_cdex_s 0
#define cpu_has_prefetch 1
#define cpu_has_mcheck 0
#define cpu_has_ejtag 0
#define cpu_has_llsc 1
#define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0
#define cpu_has_mips3d 0
#define cpu_has_smartmips 0
#define cpu_has_rixi 0
#define cpu_has_xpa 0
#define cpu_has_vtag_icache 0
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_icache_snoops_remote_store 1
#define cpu_has_mips32r1 0
#define cpu_has_mips32r2 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_mips32r6 0
#define cpu_has_mips64r6 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_has_inclusive_pcaches 1
#define cpu_has_perf_cntr_intr_bit 0
#define cpu_has_vz 0
#define cpu_has_fre 0
#define cpu_has_cdmm 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 64
#define cpu_scache_line_size() 128
#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/irq.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1999, 2000, 01, 02, 03 by Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 Kanoj Sarcar
*/
#ifndef __ASM_MACH_IP27_IRQ_H
#define __ASM_MACH_IP27_IRQ_H
#define NR_IRQS 256
#include <asm/mach-generic/irq.h>
#define IP27_HUB_PEND0_IRQ (MIPS_CPU_IRQ_BASE + 2)
#define IP27_HUB_PEND1_IRQ (MIPS_CPU_IRQ_BASE + 3)
#define IP27_RT_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 4)
#define IP27_HUB_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
#define IP27_HUB_IRQ_COUNT 128
#endif /* __ASM_MACH_IP27_IRQ_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Silicon Graphics, Inc.
* Copyright (C) 2005 Ralf Baechle <ralf@linux-mips.org>
*/
#ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H
#define __ASM_MACH_IP27_KERNEL_ENTRY_H
#include <asm/sn/addrs.h>
#include <asm/sn/agent.h>
#include <asm/sn/klkernvars.h>
/*
* TLB bits
*/
#define PAGE_GLOBAL (1 << 6)
#define PAGE_VALID (1 << 7)
#define PAGE_DIRTY (1 << 8)
#define CACHE_CACHABLE_COW (5 << 9)
/*
* inputs are the text nasid in t1, data nasid in t2.
*/
.macro MAPPED_KERNEL_SETUP_TLB
#ifdef CONFIG_MAPPED_KERNEL
/*
* This needs to read the nasid - assume 0 for now.
* Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
* 0+DVG in tlblo_1.
*/
dli t0, 0xffffffffc0000000
dmtc0 t0, CP0_ENTRYHI
li t0, 0x1c000 # Offset of text into node memory
dsll t1, NASID_SHFT # Shift text nasid into place
dsll t2, NASID_SHFT # Same for data nasid
or t1, t1, t0 # Physical load address of kernel text
or t2, t2, t0 # Physical load address of kernel data
dsrl t1, 12 # 4K pfn
dsrl t2, 12 # 4K pfn
dsll t1, 6 # Get pfn into place
dsll t2, 6 # Get pfn into place
li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
or t0, t0, t1
mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
li t0, ((PAGE_GLOBAL | PAGE_VALID | PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
or t0, t0, t2
mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
mtc0 t0, CP0_PAGEMASK
li t0, 0 # KMAP_INX
mtc0 t0, CP0_INDEX
li t0, 1
mtc0 t0, CP0_WIRED
tlbwi
#else
mtc0 zero, CP0_WIRED
#endif
.endm
/*
* Intentionally empty macro, used in head.S. Override in
* arch/mips/mach-xxx/kernel-entry-init.h when necessary.
*/
.macro kernel_entry_setup
GET_NASID_ASM t1
move t2, t1 # text and data are here
MAPPED_KERNEL_SETUP_TLB
.endm
/*
* Do SMP slave processor setup necessary before we can safely execute C code.
*/
.macro smp_slave_setup
GET_NASID_ASM t1
dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
KLDIR_OFF_POINTER + CAC_BASE
dsll t1, NASID_SHFT
or t0, t0, t1
ld t0, 0(t0) # t0 points to kern_vars struct
lh t1, KV_RO_NASID_OFFSET(t0)
lh t2, KV_RW_NASID_OFFSET(t0)
MAPPED_KERNEL_SETUP_TLB
/*
* We might not get launched at the address the kernel is linked to,
* so we jump there.
*/
PTR_LA t0, 0f
jr t0
0:
.endm
#endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/mangle-port.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 2004 Ralf Baechle
*/
#ifndef __ASM_MACH_IP27_MANGLE_PORT_H
#define __ASM_MACH_IP27_MANGLE_PORT_H
#define __swizzle_addr_b(port) ((port) ^ 3)
#define __swizzle_addr_w(port) ((port) ^ 2)
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
# define ioswabb(a, x) (x)
# define __mem_ioswabb(a, x) (x)
# define ioswabw(a, x) (x)
# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x))
# define ioswabl(a, x) (x)
# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x))
# define ioswabq(a, x) (x)
# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x))
#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/mmzone.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_MACH_MMZONE_H
#define _ASM_MACH_MMZONE_H
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/agent.h>
#include <asm/sn/klkernvars.h>
#define pa_to_nid(addr) NASID_GET(addr)
struct hub_data {
kern_vars_t kern_vars;
DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
cpumask_t h_cpus;
};
struct node_data {
struct pglist_data pglist;
struct hub_data hub;
};
extern struct node_data *__node_data[];
#define hub_data(n) (&__node_data[(n)]->hub)
#endif /* _ASM_MACH_MMZONE_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/spaces.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 99 Ralf Baechle
* Copyright (C) 2000, 2002 Maciej W. Rozycki
* Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
*/
#ifndef _ASM_MACH_IP27_SPACES_H
#define _ASM_MACH_IP27_SPACES_H
#include <linux/const.h>
/*
* IP27 uses the R10000's uncached attribute feature. Attribute 3 selects
* uncached memory addressing. Hide the definitions on 32-bit compilation
* of the compat-vdso code.
*/
#ifdef CONFIG_64BIT
#define HSPEC_BASE _AC(0x9000000000000000, UL)
#define IO_BASE _AC(0x9200000000000000, UL)
#define MSPEC_BASE _AC(0x9400000000000000, UL)
#define UNCAC_BASE _AC(0x9600000000000000, UL)
#define CAC_BASE _AC(0xa800000000000000, UL)
#endif
#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
#define HIGHMEM_START (~0UL)
#include <asm/mach-generic/spaces.h>
#endif /* _ASM_MACH_IP27_SPACES_H */
linux-7.2.3/arch/mips/include/asm/mach-ip27/topology.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_MACH_TOPOLOGY_H
#define _ASM_MACH_TOPOLOGY_H 1
#include <asm/sn/types.h>
#include <asm/mmzone.h>
struct cpuinfo_ip27 {
nasid_t p_nasid; /* my node ID in numa-as-id-space */
unsigned short p_speed; /* cpu speed in MHz */
unsigned char p_slice; /* Physical position on node board */
};
extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
#define cpu_to_node(cpu) (cputonasid(cpu))
#define cpumask_of_node(node) ((node) == -1 ? \
cpu_all_mask : \
&hub_data(node)->h_cpus)
struct pci_bus;
extern int pcibus_to_node(struct pci_bus *);
#define cpumask_of_pcibus(bus) (cpumask_of_node(pcibus_to_node(bus)))
extern unsigned char __node_distances[MAX_NUMNODES][MAX_NUMNODES];
#define node_distance(from, to) (__node_distances[(from)][(to)])
#include <asm-generic/topology.h>
#endif /* _ASM_MACH_TOPOLOGY_H */