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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
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linux-7.2.3/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 2004 Chris Dearman
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
*/
#ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
/*
* CPU feature overrides for MIPS boards
*/
#ifdef CONFIG_CPU_MIPS32
#define cpu_has_tlb 1
#define cpu_has_4kex 1
#define cpu_has_4k_cache 1
/* #define cpu_has_fpu ? */
/* #define cpu_has_32fpr ? */
#define cpu_has_counter 1
/* #define cpu_has_watch ? */
#define cpu_has_divec 1
#define cpu_has_vce 0
/* #define cpu_has_cache_cdex_p ? */
/* #define cpu_has_cache_cdex_s ? */
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
#define cpu_has_llsc 1
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
/* #define cpu_has_inclusive_pcaches ? */
#define cpu_icache_snoops_remote_store 1
#endif
#ifdef CONFIG_CPU_MIPS64
#define cpu_has_tlb 1
#define cpu_has_4kex 1
#define cpu_has_4k_cache 1
/* #define cpu_has_fpu ? */
/* #define cpu_has_32fpr ? */
#define cpu_has_counter 1
/* #define cpu_has_watch ? */
#define cpu_has_divec 1
#define cpu_has_vce 0
/* #define cpu_has_cache_cdex_p ? */
/* #define cpu_has_cache_cdex_s ? */
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
#define cpu_has_llsc 1
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
/* #define cpu_has_inclusive_pcaches ? */
#define cpu_icache_snoops_remote_store 1
#endif
#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
linux-7.2.3/arch/mips/include/asm/mach-malta/irq.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_MACH_MIPS_IRQ_H
#define __ASM_MACH_MIPS_IRQ_H
#define NR_IRQS 256
#include <asm/mach-generic/irq.h>
#endif /* __ASM_MACH_MIPS_IRQ_H */
linux-7.2.3/arch/mips/include/asm/mach-malta/kernel-entry-init.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Chris Dearman (chris@mips.com)
* Copyright (C) 2007 Mips Technologies, Inc.
* Copyright (C) 2014 Imagination Technologies Ltd.
*/
#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
#include <asm/regdef.h>
#include <asm/mipsregs.h>
/*
* Prepare segments for EVA boot:
*
* This is in case the processor boots in legacy configuration
* (SI_EVAReset is de-asserted and CONFIG5.K == 0)
*
* ========================= Mappings =============================
* Virtual memory Physical memory Mapping
* 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg)
* Flat 2GB physical memory
*
* 0x80000000 - 0x9fffffff 0x00000000 - 0x1ffffffff MUSUK (kseg0)
* 0xa0000000 - 0xbf000000 0x00000000 - 0x1ffffffff MUSUK (kseg1)
* 0xc0000000 - 0xdfffffff - MK (kseg2)
* 0xe0000000 - 0xffffffff - MK (kseg3)
*
*
* Lowmem is expanded to 2GB
*
* The following code uses the t0, t1, t2 and ra registers without
* previously preserving them.
*
*/
.macro platform_eva_init
.set push
.set reorder
/*
* Get Config.K0 value and use it to program
* the segmentation registers
*/
mfc0 t1, CP0_CONFIG
andi t1, 0x7 /* CCA */
move t2, t1
ins t2, t1, 16, 3
/* SegCtl0 */
li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \
(0 << MIPS_SEGCFG_PA_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) | \
(((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \
(0 << MIPS_SEGCFG_PA_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
or t0, t2
mtc0 t0, CP0_SEGCTL0
/* SegCtl1 */
li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
(0 << MIPS_SEGCFG_PA_SHIFT) | \
(2 << MIPS_SEGCFG_C_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) | \
(((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
(0 << MIPS_SEGCFG_PA_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
ins t0, t1, 16, 3
mtc0 t0, CP0_SEGCTL1
/* SegCtl2 */
li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
(6 << MIPS_SEGCFG_PA_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) | \
(((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
(4 << MIPS_SEGCFG_PA_SHIFT) | \
(1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
or t0, t2
mtc0 t0, CP0_SEGCTL2
jal mips_ihb
mfc0 t0, $16, 5
li t2, 0x40000000 /* K bit */
or t0, t0, t2
mtc0 t0, $16, 5
sync
jal mips_ihb
.set pop
.endm
.macro kernel_entry_setup
#ifdef CONFIG_EVA
sync
ehb
mfc0 t1, CP0_CONFIG
bgez t1, 9f
mfc0 t0, CP0_CONFIG, 1
bgez t0, 9f
mfc0 t0, CP0_CONFIG, 2
bgez t0, 9f
mfc0 t0, CP0_CONFIG, 3
sll t0, t0, 6 /* SC bit */
bgez t0, 9f
platform_eva_init
b 0f
9:
/* Assume we came from YAMON... */
PTR_LA v0, 0x9fc00534 /* YAMON print */
lw v0, (v0)
move a0, zero
PTR_LA a1, nonsc_processor
jal v0
PTR_LA v0, 0x9fc00520 /* YAMON exit */
lw v0, (v0)
li a0, 1
jal v0
1: b 1b
nop
__INITDATA
nonsc_processor:
.asciz "EVA kernel requires a MIPS core with Segment Control implemented\n"
__FINIT
#endif /* CONFIG_EVA */
0:
.endm
/*
* Do SMP slave processor setup necessary before we can safely execute C code.
*/
.macro smp_slave_setup
#ifdef CONFIG_EVA
sync
ehb
platform_eva_init
#endif
.endm
#endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */
linux-7.2.3/arch/mips/include/asm/mach-malta/mach-gt64120.h
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* This is a direct copy of the ev96100.h file, with a global
* search and replace. The numbers are the same.
*
* The reason I'm duplicating this is so that the 64120/96100
* defines won't be confusing in the source code.
*/
#ifndef _ASM_MACH_MIPS_MACH_GT64120_DEP_H
#define _ASM_MACH_MIPS_MACH_GT64120_DEP_H
#define MIPS_GT_BASE 0x1be00000
extern unsigned long _pcictrl_gt64120;
/*
* GT64120 config space base address
*/
#define GT64120_BASE _pcictrl_gt64120
#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */
linux-7.2.3/arch/mips/include/asm/mach-malta/mc146818rtc.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
* Copyright (C) 2003 by Ralf Baechle
*
* RTC routines for Malta style attached PIIX4 device, which contains a
* Motorola MC146818A-compatible Real Time Clock.
*/
#ifndef __ASM_MACH_MALTA_MC146818RTC_H
#define __ASM_MACH_MALTA_MC146818RTC_H
#include <asm/io.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h>
#define RTC_PORT(x) (0x70 + (x))
#define RTC_IRQ 8
static inline unsigned char CMOS_READ(unsigned long addr)
{
outb(addr, MALTA_RTC_ADR_REG);
return inb(MALTA_RTC_DAT_REG);
}
static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
{
outb(addr, MALTA_RTC_ADR_REG);
outb(data, MALTA_RTC_DAT_REG);
}
#define RTC_ALWAYS_BCD 0
#endif /* __ASM_MACH_MALTA_MC146818RTC_H */
linux-7.2.3/arch/mips/include/asm/mach-malta/spaces.h
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2014 Imagination Technologies Ltd.
*/
#ifndef _ASM_MALTA_SPACES_H
#define _ASM_MALTA_SPACES_H
#ifdef CONFIG_EVA
/*
* Traditional Malta Board Memory Map for EVA
*
* 0x00000000 - 0x0fffffff: 1st RAM region, 256MB
* 0x10000000 - 0x1bffffff: GIC and CPC Control Registers
* 0x1c000000 - 0x1fffffff: I/O And Flash
* 0x20000000 - 0x7fffffff: 2nd RAM region, 1.5GB
* 0x80000000 - 0xffffffff: Physical memory aliases to 0x0 (2GB)
*
* The kernel is still located in 0x80000000(kseg0). However,
* the physical mask has been shifted to 0x80000000 which exploits the alias
* on the Malta board. As a result of which, we override the __pa_symbol
* to perform direct mapping from virtual to physical addresses. In other
* words, the 0x80000000 virtual address maps to 0x80000000 physical address
* which in turn aliases to 0x0. We do this in order to be able to use a flat
* 2GB of memory (0x80000000 - 0xffffffff) so we can avoid the I/O hole in
* 0x10000000 - 0x1fffffff.
* The last 64KB of physical memory are reserved for correct HIGHMEM
* macros arithmetic.
*
*/
#define PAGE_OFFSET _AC(0x0, UL)
#define PHYS_OFFSET _AC(0x80000000, UL)
#define HIGHMEM_START _AC(0xffff0000, UL)
#define __pa_symbol(x) (RELOC_HIDE((unsigned long)(x), 0))
#endif /* CONFIG_EVA */
#include <asm/mach-generic/spaces.h>
#endif /* _ASM_MALTA_SPACES_H */