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lastdragon
2026-09-06 12:53:21 -06:00
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linux-7.2.3/drivers/iio/accel/Kconfig
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# SPDX-License-Identifier: GPL-2.0-only
#
# Accelerometer drivers
#
# When adding new entries keep the list in alphabetical order
menu "Accelerometers"
config ADIS16201
tristate "Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer"
depends on SPI
select IIO_ADIS_LIB
select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
help
Say Y here to build support for Analog Devices adis16201 dual-axis
digital inclinometer and accelerometer.
To compile this driver as a module, say M here: the module will
be called adis16201.
config ADIS16209
tristate "Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer"
depends on SPI
select IIO_ADIS_LIB
select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
help
Say Y here to build support for Analog Devices adis16209 dual-axis digital inclinometer
and accelerometer.
To compile this driver as a module, say M here: the module will be
called adis16209.
config ADXL313
tristate
config ADXL313_I2C
tristate "Analog Devices ADXL313 3-Axis Digital Accelerometer I2C Driver"
depends on I2C
select ADXL313
select REGMAP_I2C
help
Say Y here if you want to build i2c support for the Analog Devices
ADXL313 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl313_i2c and you will also get adxl313_core
for the core module.
config ADXL313_SPI
tristate "Analog Devices ADXL313 3-Axis Digital Accelerometer SPI Driver"
depends on SPI
select ADXL313
select REGMAP_SPI
help
Say Y here if you want to build spi support for the Analog Devices
ADXL313 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl313_spi and you will also get adxl313_core
for the core module.
config ADXL345
tristate
config ADXL345_I2C
tristate "Analog Devices ADXL345 3-Axis Digital Accelerometer I2C Driver"
depends on !INPUT_ADXL34X
depends on I2C
select ADXL345
select REGMAP_I2C
help
Say Y here if you want to build support for the Analog Devices
ADXL345 or ADXL375 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl345_i2c and you will also get adxl345_core
for the core module. INPUT_ADXL34X share compatibles with this
driver, do not add both modules to the kernel.
config ADXL345_SPI
tristate "Analog Devices ADXL345 3-Axis Digital Accelerometer SPI Driver"
depends on !INPUT_ADXL34X
depends on SPI
select ADXL345
select REGMAP_SPI
help
Say Y here if you want to build support for the Analog Devices
ADXL345 or ADXL375 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl345_spi and you will also get adxl345_core
for the core module. INPUT_ADXL34X share compatibles with this
driver, do not add both modules to the kernel.
config ADXL355
tristate
config ADXL355_I2C
tristate "Analog Devices ADXL355 3-Axis Digital Accelerometer I2C Driver"
depends on I2C
select ADXL355
select REGMAP_I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build i2c support for the Analog Devices
ADXL355 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl355_i2c and you will also get adxl355_core
for the core module.
config ADXL355_SPI
tristate "Analog Devices ADXL355 3-Axis Digital Accelerometer SPI Driver"
depends on SPI
select ADXL355
select REGMAP_SPI
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build spi support for the Analog Devices
ADXL355 3-axis digital accelerometer.
To compile this driver as a module, choose M here: the module
will be called adxl355_spi and you will also get adxl355_core
for the core module.
config ADXL367
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
config ADXL367_SPI
tristate "Analog Devices ADXL367 3-Axis Accelerometer SPI Driver"
depends on SPI
select ADXL367
select REGMAP_SPI
help
Say yes here to add support for the Analog Devices ADXL367 triaxial
acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl367_spi.
config ADXL367_I2C
tristate "Analog Devices ADXL367 3-Axis Accelerometer I2C Driver"
depends on I2C
select ADXL367
select REGMAP_I2C
help
Say yes here to add support for the Analog Devices ADXL367 triaxial
acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl367_i2c.
config ADXL372
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
config ADXL372_SPI
tristate "Analog Devices ADXL371/ADXL372 3-Axis Accelerometer SPI Driver"
depends on SPI
select ADXL372
select REGMAP_SPI
help
Say yes here to add support for the Analog Devices ADXL371/ADXL372
triaxial acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl372_spi.
config ADXL372_I2C
tristate "Analog Devices ADXL371/ADXL372 3-Axis Accelerometer I2C Driver"
depends on I2C
select ADXL372
select REGMAP_I2C
help
Say yes here to add support for the Analog Devices ADXL371/ADXL372
triaxial acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl372_i2c.
config ADXL380
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
config ADXL380_SPI
tristate "Analog Devices ADXL380 3-Axis Accelerometer SPI Driver"
depends on SPI
select ADXL380
select REGMAP_SPI
help
Say yes here to add support for the Analog Devices ADXL380 triaxial
acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl380_spi.
config ADXL380_I2C
tristate "Analog Devices ADXL380 3-Axis Accelerometer I2C Driver"
depends on I2C
select ADXL380
select REGMAP_I2C
help
Say yes here to add support for the Analog Devices ADXL380 triaxial
acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called adxl380_i2c.
config BMA180
tristate "Bosch BMA023/BMA1x0/BMA250 3-Axis Accelerometer Driver"
depends on I2C && INPUT_BMA150=n
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build a driver for the Bosch BMA023, BMA150
BMA180, BMA250 or SMB380 triaxial acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called bma180.
config BMA220
tristate "Bosch BMA220 3-Axis Accelerometer Driver"
depends on I2C || SPI
select REGMAP
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select BMA220_I2C if I2C
select BMA220_SPI if SPI
help
Say yes here to add support for the Bosch BMA220 triaxial
acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called bma220_core and you will also get
bma220_i2c if I2C is enabled and bma220_spi if SPI is
enabled.
config BMA220_I2C
tristate
select REGMAP_I2C
depends on BMA220
config BMA220_SPI
tristate
select REGMAP_SPI
depends on BMA220
config BMA400
tristate "Bosch BMA400 3-Axis Accelerometer Driver"
select REGMAP
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select BMA400_I2C if I2C
select BMA400_SPI if SPI
help
Say Y here if you want to build a driver for the Bosch BMA400
triaxial acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called bma400_core and you will also get
bma400_i2c if I2C is enabled and bma400_spi if SPI is
enabled.
config BMA400_I2C
tristate
select REGMAP_I2C
depends on BMA400
config BMA400_SPI
tristate
select REGMAP_SPI
depends on BMA400
config BMC150_ACCEL
tristate "Bosch BMC150 Accelerometer Driver"
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select REGMAP
select BMC150_ACCEL_I2C if I2C
select BMC150_ACCEL_SPI if SPI
help
Say yes here to build support for the following Bosch accelerometers:
BMA222, BMA222E, BMA250E, BMA253, BMA254, BMA255, BMA280, BMC150, BMC156
BMI055.
Note that some of these are combo modules:
- BMC150/BMC156: accelerometer and magnetometer
- BMI055: accelerometer and gyroscope
This driver is only implementing accelerometer part, which has
its own address and register map.
config BMC150_ACCEL_I2C
tristate
select REGMAP_I2C
config BMC150_ACCEL_SPI
tristate
select REGMAP_SPI
config BMI088_ACCEL
tristate "Bosch BMI088 Accelerometer Driver"
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select REGMAP
select BMI088_ACCEL_SPI if SPI
select BMI088_ACCEL_I2C if I2C
help
Say yes here to build support for the following Bosch accelerometers:
BMI088, BMI085, BMI090L. Note that all of these are combo module that
include both accelerometer and gyroscope.
This driver only implements the accelerometer part, which has its own
address and register map. BMG160 provides the gyroscope driver.
config BMI088_ACCEL_I2C
tristate
select REGMAP_I2C
config BMI088_ACCEL_SPI
tristate
select REGMAP_SPI
config DA280
tristate "MiraMEMS DA280 3-axis 14-bit digital accelerometer driver"
depends on I2C
help
Say yes here to build support for the MiraMEMS DA280 3-axis 14-bit
digital accelerometer.
To compile this driver as a module, choose M here: the
module will be called da280.
config DA311
tristate "MiraMEMS DA311 3-axis 12-bit digital accelerometer driver"
depends on I2C
help
Say yes here to build support for the MiraMEMS DA311 3-axis 12-bit
digital accelerometer.
To compile this driver as a module, choose M here: the
module will be called da311.
config DMARD06
tristate "Domintech DMARD06 Digital Accelerometer Driver"
depends on I2C
help
Say yes here to build support for the Domintech low-g tri-axial
digital accelerometers: DMARD05, DMARD06, DMARD07.
To compile this driver as a module, choose M here: the
module will be called dmard06.
config DMARD09
tristate "Domintech DMARD09 3-axis Accelerometer Driver"
depends on I2C
help
Say yes here to get support for the Domintech DMARD09 3-axis
accelerometer.
Choosing M will build the driver as a module. If so, the module
will be called dmard09.
config DMARD10
tristate "Domintech DMARD10 3-axis Accelerometer Driver"
depends on I2C
help
Say yes here to get support for the Domintech DMARD10 3-axis
accelerometer.
Choosing M will build the driver as a module. If so, the module
will be called dmard10.
config FXLS8962AF
tristate
depends on I2C || !I2C # cannot be built-in for modular I2C
select IIO_BUFFER
select IIO_KFIFO_BUF
config FXLS8962AF_I2C
tristate "NXP FXLS8962AF/FXLS8964AF Accelerometer I2C Driver"
depends on I2C
select FXLS8962AF
select REGMAP_I2C
help
Say yes here to build support for the NXP 3-axis automotive
accelerometer FXLS8962AF/FXLS8964AF with I2C support.
To compile this driver as a module, choose M here: the module
will be called fxls8962af_i2c.
config FXLS8962AF_SPI
tristate "NXP FXLS8962AF/FXLS8964AF Accelerometer SPI Driver"
depends on SPI
depends on I2C || !I2C
select FXLS8962AF
select REGMAP_SPI
help
Say yes here to build support for the NXP 3-axis automotive
accelerometer FXLS8962AF/FXLS8964AF with SPI support.
To compile this driver as a module, choose M here: the module
will be called fxls8962af_spi.
config HID_SENSOR_ACCEL_3D
depends on HID_SENSOR_HUB
select IIO_BUFFER
select HID_SENSOR_IIO_COMMON
select HID_SENSOR_IIO_TRIGGER
tristate "HID Accelerometers 3D"
help
Say yes here to build support for the HID SENSOR
accelerometers 3D.
To compile this driver as a module, choose M here: the
module will be called hid-sensor-accel-3d.
config IIO_CROS_EC_ACCEL_LEGACY
tristate "ChromeOS EC Legacy Accelerometer Sensor"
depends on IIO_CROS_EC_SENSORS_CORE
help
Say yes here to get support for accelerometers on Chromebook using
legacy EC firmware.
Sensor data is retrieved through IO memory.
Newer devices should use IIO_CROS_EC_SENSORS.
config IIO_ST_ACCEL_3AXIS
tristate "STMicroelectronics accelerometers 3-Axis Driver"
depends on (I2C || SPI_MASTER) && SYSFS
depends on !SENSORS_LIS3_I2C
depends on !SENSORS_LIS3_SPI
select IIO_ST_SENSORS_CORE
select IIO_TRIGGERED_BUFFER if (IIO_BUFFER)
help
Say yes here to build support for STMicroelectronics accelerometers:
LSM303C, LSM303DLH, LSM303DLHC, LIS3DH, LSM330D, LSM330DL, LSM330DLC,
LIS331DLH, LSM303DL, LSM303DLM, LSM330, LIS2DH12, H3LIS331DL,
LNG2DM, LIS3DE, LIS2DE12, LIS2HH12
Also need to enable at least one of I2C and SPI interface drivers
below.
config IIO_ST_ACCEL_I2C_3AXIS
tristate "STMicroelectronics accelerometers 3-Axis I2C Interface"
depends on I2C && IIO_ST_ACCEL_3AXIS
default I2C && IIO_ST_ACCEL_3AXIS
select IIO_ST_SENSORS_I2C
help
Build support for STMicroelectronics accelerometers I2C interface.
To compile this driver as a module, choose M here. The module
will be called st_accel_i2c.
config IIO_ST_ACCEL_SPI_3AXIS
tristate "STMicroelectronics accelerometers 3-Axis SPI Interface"
depends on SPI_MASTER && IIO_ST_ACCEL_3AXIS
default SPI_MASTER && IIO_ST_ACCEL_3AXIS
select IIO_ST_SENSORS_SPI
help
Build support for STMicroelectronics accelerometers SPI interface.
To compile this driver as a module, choose M here. The module
will be called st_accel_spi.
config IIO_KX022A
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
config IIO_KX022A_SPI
tristate "Kionix KX022A tri-axis digital accelerometer SPI interface"
depends on SPI
select IIO_KX022A
select REGMAP_SPI
help
Enable support for the Kionix digital tri-axis accelerometers
connected to SPI interface. Supported devices are:
KX022A, KX132-1211, KX132ACR-LBZ
config IIO_KX022A_I2C
tristate "Kionix KX022A tri-axis digital accelerometer I2C interface"
depends on I2C
select IIO_KX022A
select REGMAP_I2C
help
Enable support for the Kionix digital tri-axis accelerometers
connected to I2C interface. Supported devices are:
KX022A, KX132-1211, KX132ACR-LBZ
config KXSD9
tristate "Kionix KXSD9 Accelerometer Driver"
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for the Kionix KXSD9 accelerometer.
It can be accessed using an (optional) SPI or I2C interface.
To compile this driver as a module, choose M here: the module
will be called kxsd9.
config KXSD9_SPI
tristate "Kionix KXSD9 SPI transport"
depends on KXSD9
depends on SPI
default KXSD9
select REGMAP_SPI
help
Say yes here to enable the Kionix KXSD9 accelerometer
SPI transport channel.
config KXSD9_I2C
tristate "Kionix KXSD9 I2C transport"
depends on KXSD9
depends on I2C
default KXSD9
select REGMAP_I2C
help
Say yes here to enable the Kionix KXSD9 accelerometer
I2C transport channel.
config KXCJK1013
tristate "Kionix 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build a driver for the Kionix KXCJK-1013
triaxial acceleration sensor. This driver also supports KXCJ9-1008,
KXTJ2-1009 and KXTF9.
To compile this driver as a module, choose M here: the module will
be called kxcjk-1013.
config MC3230
tristate "mCube MC3230 Digital Accelerometer Driver"
depends on I2C
help
Say yes here to build support for the mCube MC3230 low-g tri-axial
digital accelerometer.
To compile this driver as a module, choose M here: the
module will be called mc3230.
config MMA7455
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
config MMA7455_I2C
tristate "Freescale MMA7455L/MMA7456L Accelerometer I2C Driver"
depends on I2C
select MMA7455
select REGMAP_I2C
help
Say yes here to build support for the Freescale MMA7455L and
MMA7456L 3-axis accelerometer.
To compile this driver as a module, choose M here: the module
will be called mma7455_i2c.
config MMA7455_SPI
tristate "Freescale MMA7455L/MMA7456L Accelerometer SPI Driver"
depends on SPI_MASTER
select MMA7455
select REGMAP_SPI
help
Say yes here to build support for the Freescale MMA7455L and
MMA7456L 3-axis accelerometer.
To compile this driver as a module, choose M here: the module
will be called mma7455_spi.
config MMA7660
tristate "Freescale MMA7660FC 3-Axis Accelerometer Driver"
depends on I2C
help
Say yes here to get support for the Freescale MMA7660FC 3-Axis
accelerometer.
Choosing M will build the driver as a module. If so, the module
will be called mma7660.
config MMA8452
tristate "Freescale / NXP MMA8452Q and similar Accelerometers Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for the following Freescale / NXP 3-axis
accelerometers: MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC,
FXLS8471Q.
To compile this driver as a module, choose M here: the module
will be called mma8452.
config MMA9551_CORE
tristate
config MMA9551
tristate "Freescale MMA9551L Intelligent Motion-Sensing Platform Driver"
depends on I2C
select MMA9551_CORE
help
Say yes here to build support for the Freescale MMA9551L
Intelligent Motion-Sensing Platform Driver.
To compile this driver as a module, choose M here: the module
will be called mma9551.
config MMA9553
tristate "Freescale MMA9553L Intelligent Pedometer Platform Driver"
depends on I2C
select MMA9551_CORE
help
Say yes here to build support for the Freescale MMA9553L
Intelligent Pedometer Platform Driver.
To compile this driver as a module, choose M here: the module
will be called mma9553.
config MSA311
tristate "MEMSensing Digital 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select REGMAP_I2C
help
Say yes here to build support for the MEMSensing MSA311
accelerometer driver.
To compile this driver as a module, choose M here: the module will be
called msa311.
config MXC4005
tristate "Memsic MXC4005XC 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select REGMAP_I2C
help
Say yes here to build support for the Memsic MXC4005XC 3-axis
accelerometer.
To compile this driver as a module, choose M. The module will be
called mxc4005.
config MXC6255
tristate "Memsic MXC6255 Orientation Sensing Accelerometer Driver"
depends on I2C
select REGMAP_I2C
help
Say yes here to build support for the Memsic MXC6255 Orientation
Sensing Accelerometer Driver.
To compile this driver as a module, choose M here: the module will be
called mxc6255.
config SCA3000
select IIO_BUFFER
select IIO_KFIFO_BUF
depends on SPI
tristate "VTI SCA3000 series accelerometers"
help
Say Y here to build support for the VTI SCA3000 series of SPI
accelerometers. These devices use a hardware ring buffer.
To compile this driver as a module, say M here: the module will be
called sca3000.
config SCA3300
tristate "Murata SCA3300 3-Axis Accelerometer Driver"
depends on SPI
select CRC8
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for Murata SCA3300 3-Axis
accelerometer.
To compile this driver as a module, choose M here: the module will be
called sca3300.
config STK8312
tristate "Sensortek STK8312 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to get support for the Sensortek STK8312 3-axis
accelerometer.
Choosing M will build the driver as a module. If so, the module
will be called stk8312.
config STK8BA50
tristate "Sensortek STK8BA50 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to get support for the Sensortek STK8BA50 3-axis
accelerometer.
Choosing M will build the driver as a module. If so, the module
will be called stk8ba50.
endmenu
linux-7.2.3/drivers/iio/accel/Makefile
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# SPDX-License-Identifier: GPL-2.0
#
# Makefile for industrial I/O accelerometer drivers
#
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_ADIS16201) += adis16201.o
obj-$(CONFIG_ADIS16209) += adis16209.o
obj-$(CONFIG_ADXL313) += adxl313_core.o
obj-$(CONFIG_ADXL313_I2C) += adxl313_i2c.o
obj-$(CONFIG_ADXL313_SPI) += adxl313_spi.o
obj-$(CONFIG_ADXL345) += adxl345_core.o
obj-$(CONFIG_ADXL345_I2C) += adxl345_i2c.o
obj-$(CONFIG_ADXL345_SPI) += adxl345_spi.o
obj-$(CONFIG_ADXL355) += adxl355_core.o
obj-$(CONFIG_ADXL355_I2C) += adxl355_i2c.o
obj-$(CONFIG_ADXL355_SPI) += adxl355_spi.o
obj-$(CONFIG_ADXL367) += adxl367.o
obj-$(CONFIG_ADXL367_I2C) += adxl367_i2c.o
obj-$(CONFIG_ADXL367_SPI) += adxl367_spi.o
obj-$(CONFIG_ADXL372) += adxl372.o
obj-$(CONFIG_ADXL372_I2C) += adxl372_i2c.o
obj-$(CONFIG_ADXL372_SPI) += adxl372_spi.o
obj-$(CONFIG_ADXL380) += adxl380.o
obj-$(CONFIG_ADXL380_I2C) += adxl380_i2c.o
obj-$(CONFIG_ADXL380_SPI) += adxl380_spi.o
obj-$(CONFIG_BMA180) += bma180.o
obj-$(CONFIG_BMA220) += bma220_core.o
obj-$(CONFIG_BMA220_I2C) += bma220_i2c.o
obj-$(CONFIG_BMA220_SPI) += bma220_spi.o
obj-$(CONFIG_BMA400) += bma400_core.o
obj-$(CONFIG_BMA400_I2C) += bma400_i2c.o
obj-$(CONFIG_BMA400_SPI) += bma400_spi.o
obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o
obj-$(CONFIG_BMC150_ACCEL_I2C) += bmc150-accel-i2c.o
obj-$(CONFIG_BMC150_ACCEL_SPI) += bmc150-accel-spi.o
obj-$(CONFIG_BMI088_ACCEL) += bmi088-accel-core.o
obj-$(CONFIG_BMI088_ACCEL_I2C) += bmi088-accel-i2c.o
obj-$(CONFIG_BMI088_ACCEL_SPI) += bmi088-accel-spi.o
obj-$(CONFIG_DA280) += da280.o
obj-$(CONFIG_DA311) += da311.o
obj-$(CONFIG_DMARD06) += dmard06.o
obj-$(CONFIG_DMARD09) += dmard09.o
obj-$(CONFIG_DMARD10) += dmard10.o
obj-$(CONFIG_FXLS8962AF) += fxls8962af-core.o
obj-$(CONFIG_FXLS8962AF_I2C) += fxls8962af-i2c.o
obj-$(CONFIG_FXLS8962AF_SPI) += fxls8962af-spi.o
obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
obj-$(CONFIG_IIO_KX022A) += kionix-kx022a.o
obj-$(CONFIG_IIO_KX022A_I2C) += kionix-kx022a-i2c.o
obj-$(CONFIG_IIO_KX022A_SPI) += kionix-kx022a-spi.o
obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
obj-$(CONFIG_KXSD9) += kxsd9.o
obj-$(CONFIG_KXSD9_SPI) += kxsd9-spi.o
obj-$(CONFIG_KXSD9_I2C) += kxsd9-i2c.o
obj-$(CONFIG_MC3230) += mc3230.o
obj-$(CONFIG_MMA7455) += mma7455_core.o
obj-$(CONFIG_MMA7455_I2C) += mma7455_i2c.o
obj-$(CONFIG_MMA7455_SPI) += mma7455_spi.o
obj-$(CONFIG_MMA7660) += mma7660.o
obj-$(CONFIG_MMA8452) += mma8452.o
obj-$(CONFIG_MMA9551_CORE) += mma9551_core.o
obj-$(CONFIG_MMA9551) += mma9551.o
obj-$(CONFIG_MMA9553) += mma9553.o
obj-$(CONFIG_MSA311) += msa311.o
obj-$(CONFIG_MXC4005) += mxc4005.o
obj-$(CONFIG_MXC6255) += mxc6255.o
obj-$(CONFIG_SCA3000) += sca3000.o
obj-$(CONFIG_SCA3300) += sca3300.o
obj-$(CONFIG_STK8312) += stk8312.o
obj-$(CONFIG_STK8BA50) += stk8ba50.o
obj-$(CONFIG_IIO_CROS_EC_ACCEL_LEGACY) += cros_ec_accel_legacy.o
obj-$(CONFIG_IIO_SSP_SENSORS_COMMONS) += ssp_accel_sensor.o
obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
st_accel-y := st_accel_core.o
st_accel-$(CONFIG_IIO_BUFFER) += st_accel_buffer.o
obj-$(CONFIG_IIO_ST_ACCEL_I2C_3AXIS) += st_accel_i2c.o
obj-$(CONFIG_IIO_ST_ACCEL_SPI_3AXIS) += st_accel_spi.o
linux-7.2.3/drivers/iio/accel/adis16201.c
+303
View File
@@ -0,0 +1,303 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS16201_STARTUP_DELAY_MS 220
#define ADIS16201_FLASH_CNT 0x00
/* Data Output Register Information */
#define ADIS16201_SUPPLY_OUT_REG 0x02
#define ADIS16201_XACCL_OUT_REG 0x04
#define ADIS16201_YACCL_OUT_REG 0x06
#define ADIS16201_AUX_ADC_REG 0x08
#define ADIS16201_TEMP_OUT_REG 0x0A
#define ADIS16201_XINCL_OUT_REG 0x0C
#define ADIS16201_YINCL_OUT_REG 0x0E
/* Calibration Register Definition */
#define ADIS16201_XACCL_OFFS_REG 0x10
#define ADIS16201_YACCL_OFFS_REG 0x12
#define ADIS16201_XACCL_SCALE_REG 0x14
#define ADIS16201_YACCL_SCALE_REG 0x16
#define ADIS16201_XINCL_OFFS_REG 0x18
#define ADIS16201_YINCL_OFFS_REG 0x1A
#define ADIS16201_XINCL_SCALE_REG 0x1C
#define ADIS16201_YINCL_SCALE_REG 0x1E
/* Alarm Register Definition */
#define ADIS16201_ALM_MAG1_REG 0x20
#define ADIS16201_ALM_MAG2_REG 0x22
#define ADIS16201_ALM_SMPL1_REG 0x24
#define ADIS16201_ALM_SMPL2_REG 0x26
#define ADIS16201_ALM_CTRL_REG 0x28
#define ADIS16201_AUX_DAC_REG 0x30
#define ADIS16201_GPIO_CTRL_REG 0x32
#define ADIS16201_SMPL_PRD_REG 0x36
/* Operation, filter configuration */
#define ADIS16201_AVG_CNT_REG 0x38
#define ADIS16201_SLP_CNT_REG 0x3A
/* Miscellaneous Control Register Definition */
#define ADIS16201_MSC_CTRL_REG 0x34
#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
/* Data-ready enable: 1 = enabled, 0 = disabled */
#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH BIT(1)
/* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
/* Diagnostics System Status Register Definition */
#define ADIS16201_DIAG_STAT_REG 0x3C
#define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
#define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
#define ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */
#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
/* Power supply below 2.975 V */
#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
/* System Command Register Definition */
#define ADIS16201_GLOB_CMD_REG 0x3E
#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16201_GLOB_CMD_FACTORY_RESET BIT(1)
#define ADIS16201_ERROR_ACTIVE BIT(14)
enum adis16201_scan {
ADIS16201_SCAN_ACC_X,
ADIS16201_SCAN_ACC_Y,
ADIS16201_SCAN_INCLI_X,
ADIS16201_SCAN_INCLI_Y,
ADIS16201_SCAN_SUPPLY,
ADIS16201_SCAN_AUX_ADC,
ADIS16201_SCAN_TEMP,
};
static const u8 adis16201_addresses[] = {
[ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS_REG,
[ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS_REG,
[ADIS16201_SCAN_INCLI_X] = ADIS16201_XINCL_OFFS_REG,
[ADIS16201_SCAN_INCLI_Y] = ADIS16201_YINCL_OFFS_REG,
};
static int adis16201_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int ret;
int bits;
u8 addr;
s16 val16;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan,
ADIS16201_ERROR_ACTIVE, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
if (chan->channel == 0) {
/* Voltage base units are mV hence 1.22 mV */
*val = 1;
*val2 = 220000;
} else {
/* Voltage base units are mV hence 0.61 mV */
*val = 0;
*val2 = 610000;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = -470;
*val2 = 0;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
/*
* IIO base unit for sensitivity of accelerometer
* is milli g.
* 1 LSB represents 0.244 mg.
*/
*val = 0;
*val2 = IIO_G_TO_M_S_2(462400);
return IIO_VAL_INT_PLUS_NANO;
case IIO_INCLI:
*val = 0;
*val2 = 100000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
/*
* The raw ADC value is 1278 when the temperature
* is 25 degrees and the scale factor per milli
* degree Celsius is -470.
*/
*val = 25000 / -470 - 1278;
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ACCEL:
bits = 12;
break;
case IIO_INCLI:
bits = 9;
break;
default:
return -EINVAL;
}
addr = adis16201_addresses[chan->scan_index];
ret = adis_read_reg_16(st, addr, &val16);
if (ret)
return ret;
*val = sign_extend32(val16, bits - 1);
return IIO_VAL_INT;
}
return -EINVAL;
}
static int adis16201_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int m;
if (mask != IIO_CHAN_INFO_CALIBBIAS)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
m = GENMASK(11, 0);
break;
case IIO_INCLI:
m = GENMASK(8, 0);
break;
default:
return -EINVAL;
}
return adis_write_reg_16(st, adis16201_addresses[chan->scan_index],
val & m);
}
static const struct iio_chan_spec adis16201_channels[] = {
ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT_REG, ADIS16201_SCAN_SUPPLY, 0,
12),
ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT_REG, ADIS16201_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT_REG, ADIS16201_SCAN_ACC_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT_REG, ADIS16201_SCAN_ACC_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC_REG, ADIS16201_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT_REG, ADIS16201_SCAN_INCLI_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 12),
ADIS_INCLI_CHAN(Y, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 12),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
static const struct iio_info adis16201_info = {
.read_raw = adis16201_read_raw,
.write_raw = adis16201_write_raw,
.update_scan_mode = adis_update_scan_mode,
};
static const char * const adis16201_status_error_msgs[] = {
[ADIS16201_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
[ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
[ADIS16201_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
[ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
};
static const struct adis_timeout adis16201_timeouts = {
.reset_ms = ADIS16201_STARTUP_DELAY_MS,
.sw_reset_ms = ADIS16201_STARTUP_DELAY_MS,
.self_test_ms = ADIS16201_STARTUP_DELAY_MS,
};
static const struct adis_data adis16201_data = {
.read_delay = 20,
.msc_ctrl_reg = ADIS16201_MSC_CTRL_REG,
.glob_cmd_reg = ADIS16201_GLOB_CMD_REG,
.diag_stat_reg = ADIS16201_DIAG_STAT_REG,
.self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN,
.self_test_reg = ADIS16201_MSC_CTRL_REG,
.self_test_no_autoclear = true,
.timeouts = &adis16201_timeouts,
.status_error_msgs = adis16201_status_error_msgs,
.status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
};
static int adis16201_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
indio_dev->name = spi->dev.driver->name;
indio_dev->info = &adis16201_info;
indio_dev->channels = adis16201_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(st, indio_dev, spi, &adis16201_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
if (ret)
return ret;
ret = __adis_initial_startup(st);
if (ret)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static struct spi_driver adis16201_driver = {
.driver = {
.name = "adis16201",
},
.probe = adis16201_probe,
};
module_spi_driver(adis16201_driver);
MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:adis16201");
MODULE_IMPORT_NS("IIO_ADISLIB");
linux-7.2.3/drivers/iio/accel/adis16209.c
+313
View File
@@ -0,0 +1,313 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer
*
* Copyright 2010 Analog Devices Inc.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/imu/adis.h>
#define ADIS16209_STARTUP_DELAY_MS 220
#define ADIS16209_FLASH_CNT_REG 0x00
/* Data Output Register Definitions */
#define ADIS16209_SUPPLY_OUT_REG 0x02
#define ADIS16209_XACCL_OUT_REG 0x04
#define ADIS16209_YACCL_OUT_REG 0x06
/* Output, auxiliary ADC input */
#define ADIS16209_AUX_ADC_REG 0x08
/* Output, temperature */
#define ADIS16209_TEMP_OUT_REG 0x0A
/* Output, +/- 90 degrees X-axis inclination */
#define ADIS16209_XINCL_OUT_REG 0x0C
#define ADIS16209_YINCL_OUT_REG 0x0E
/* Output, +/-180 vertical rotational position */
#define ADIS16209_ROT_OUT_REG 0x10
/*
* Calibration Register Definitions.
* Acceleration, inclination or rotation offset null.
*/
#define ADIS16209_XACCL_NULL_REG 0x12
#define ADIS16209_YACCL_NULL_REG 0x14
#define ADIS16209_XINCL_NULL_REG 0x16
#define ADIS16209_YINCL_NULL_REG 0x18
#define ADIS16209_ROT_NULL_REG 0x1A
/* Alarm Register Definitions */
#define ADIS16209_ALM_MAG1_REG 0x20
#define ADIS16209_ALM_MAG2_REG 0x22
#define ADIS16209_ALM_SMPL1_REG 0x24
#define ADIS16209_ALM_SMPL2_REG 0x26
#define ADIS16209_ALM_CTRL_REG 0x28
#define ADIS16209_AUX_DAC_REG 0x30
#define ADIS16209_GPIO_CTRL_REG 0x32
#define ADIS16209_SMPL_PRD_REG 0x36
#define ADIS16209_AVG_CNT_REG 0x38
#define ADIS16209_SLP_CNT_REG 0x3A
#define ADIS16209_MSC_CTRL_REG 0x34
#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
#define ADIS16209_MSC_CTRL_SELF_TEST_EN BIT(8)
#define ADIS16209_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16209_MSC_CTRL_ACTIVE_HIGH BIT(1)
#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
#define ADIS16209_STAT_REG 0x3C
#define ADIS16209_STAT_ALARM2 BIT(9)
#define ADIS16209_STAT_ALARM1 BIT(8)
#define ADIS16209_STAT_SELFTEST_FAIL_BIT 5
#define ADIS16209_STAT_SPI_FAIL_BIT 3
#define ADIS16209_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */
#define ADIS16209_STAT_POWER_HIGH_BIT 1
/* Power supply below 2.975 V */
#define ADIS16209_STAT_POWER_LOW_BIT 0
#define ADIS16209_CMD_REG 0x3E
#define ADIS16209_CMD_SW_RESET BIT(7)
#define ADIS16209_CMD_CLEAR_STAT BIT(4)
#define ADIS16209_CMD_FACTORY_CAL BIT(1)
#define ADIS16209_ERROR_ACTIVE BIT(14)
enum adis16209_scan {
ADIS16209_SCAN_SUPPLY,
ADIS16209_SCAN_ACC_X,
ADIS16209_SCAN_ACC_Y,
ADIS16209_SCAN_AUX_ADC,
ADIS16209_SCAN_TEMP,
ADIS16209_SCAN_INCLI_X,
ADIS16209_SCAN_INCLI_Y,
ADIS16209_SCAN_ROT,
};
static const u8 adis16209_addresses[8][1] = {
[ADIS16209_SCAN_SUPPLY] = { },
[ADIS16209_SCAN_AUX_ADC] = { },
[ADIS16209_SCAN_ACC_X] = { ADIS16209_XACCL_NULL_REG },
[ADIS16209_SCAN_ACC_Y] = { ADIS16209_YACCL_NULL_REG },
[ADIS16209_SCAN_INCLI_X] = { ADIS16209_XINCL_NULL_REG },
[ADIS16209_SCAN_INCLI_Y] = { ADIS16209_YINCL_NULL_REG },
[ADIS16209_SCAN_ROT] = { },
[ADIS16209_SCAN_TEMP] = { },
};
static int adis16209_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int m;
if (mask != IIO_CHAN_INFO_CALIBBIAS)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
case IIO_INCLI:
m = GENMASK(13, 0);
break;
default:
return -EINVAL;
}
return adis_write_reg_16(st, adis16209_addresses[chan->scan_index][0],
val & m);
}
static int adis16209_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct adis *st = iio_priv(indio_dev);
int ret;
int bits;
u8 addr;
s16 val16;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return adis_single_conversion(indio_dev, chan,
ADIS16209_ERROR_ACTIVE, val);
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
*val = 0;
switch (chan->channel) {
case 0:
*val2 = 305180; /* 0.30518 mV */
break;
case 1:
*val2 = 610500; /* 0.6105 mV */
break;
default:
return -EINVAL;
}
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = -470;
*val2 = 0;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
/*
* IIO base unit for sensitivity of accelerometer
* is milli g.
* 1 LSB represents 0.244 mg.
*/
*val = 0;
*val2 = IIO_G_TO_M_S_2(244140);
return IIO_VAL_INT_PLUS_NANO;
case IIO_INCLI:
case IIO_ROT:
/*
* IIO base units for rotation are degrees.
* 1 LSB represents 0.025 milli degrees.
*/
*val = 0;
*val2 = 25000;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
break;
case IIO_CHAN_INFO_OFFSET:
/*
* The raw ADC value is 0x4FE when the temperature
* is 45 degrees and the scale factor per milli
* degree Celsius is -470.
*/
*val = 25000 / -470 - 0x4FE;
return IIO_VAL_INT;
case IIO_CHAN_INFO_CALIBBIAS:
switch (chan->type) {
case IIO_ACCEL:
bits = 14;
break;
default:
return -EINVAL;
}
addr = adis16209_addresses[chan->scan_index][0];
ret = adis_read_reg_16(st, addr, &val16);
if (ret)
return ret;
*val = sign_extend32(val16, bits - 1);
return IIO_VAL_INT;
}
return -EINVAL;
}
static const struct iio_chan_spec adis16209_channels[] = {
ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT_REG, ADIS16209_SCAN_SUPPLY,
0, 14),
ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT_REG, ADIS16209_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT_REG, ADIS16209_SCAN_ACC_X,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT_REG, ADIS16209_SCAN_ACC_Y,
BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC_REG, ADIS16209_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT_REG, ADIS16209_SCAN_INCLI_X,
0, 0, 14),
ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT_REG, ADIS16209_SCAN_INCLI_Y,
0, 0, 14),
ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT_REG, ADIS16209_SCAN_ROT, 0, 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(8)
};
static const struct iio_info adis16209_info = {
.read_raw = adis16209_read_raw,
.write_raw = adis16209_write_raw,
.update_scan_mode = adis_update_scan_mode,
};
static const char * const adis16209_status_error_msgs[] = {
[ADIS16209_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
[ADIS16209_STAT_SPI_FAIL_BIT] = "SPI failure",
[ADIS16209_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
[ADIS16209_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
[ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
};
static const struct adis_timeout adis16209_timeouts = {
.reset_ms = ADIS16209_STARTUP_DELAY_MS,
.self_test_ms = ADIS16209_STARTUP_DELAY_MS,
.sw_reset_ms = ADIS16209_STARTUP_DELAY_MS,
};
static const struct adis_data adis16209_data = {
.read_delay = 30,
.msc_ctrl_reg = ADIS16209_MSC_CTRL_REG,
.glob_cmd_reg = ADIS16209_CMD_REG,
.diag_stat_reg = ADIS16209_STAT_REG,
.self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN,
.self_test_reg = ADIS16209_MSC_CTRL_REG,
.self_test_no_autoclear = true,
.timeouts = &adis16209_timeouts,
.status_error_msgs = adis16209_status_error_msgs,
.status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) |
BIT(ADIS16209_STAT_SPI_FAIL_BIT) |
BIT(ADIS16209_STAT_FLASH_UPT_FAIL_BIT) |
BIT(ADIS16209_STAT_POWER_HIGH_BIT) |
BIT(ADIS16209_STAT_POWER_LOW_BIT),
};
static int adis16209_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adis *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
indio_dev->name = spi->dev.driver->name;
indio_dev->info = &adis16209_info;
indio_dev->channels = adis16209_channels;
indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = adis_init(st, indio_dev, spi, &adis16209_data);
if (ret)
return ret;
ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
if (ret)
return ret;
ret = __adis_initial_startup(st);
if (ret)
return ret;
return devm_iio_device_register(&spi->dev, indio_dev);
}
static struct spi_driver adis16209_driver = {
.driver = {
.name = "adis16209",
},
.probe = adis16209_probe,
};
module_spi_driver(adis16209_driver);
MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:adis16209");
MODULE_IMPORT_NS("IIO_ADISLIB");
linux-7.2.3/drivers/iio/accel/adxl313.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
*/
#ifndef _ADXL313_H_
#define _ADXL313_H_
#include <linux/iio/iio.h>
/* ADXL313 register definitions */
#define ADXL313_REG_DEVID0 0x00
#define ADXL313_REG_DEVID1 0x01
#define ADXL313_REG_PARTID 0x02
#define ADXL313_REG_XID 0x04
#define ADXL313_REG_SOFT_RESET 0x18
#define ADXL313_REG_OFS_AXIS(index) (0x1E + (index))
#define ADXL313_REG_THRESH_ACT 0x24
#define ADXL313_REG_THRESH_INACT 0x25
#define ADXL313_REG_TIME_INACT 0x26
#define ADXL313_REG_ACT_INACT_CTL 0x27
#define ADXL313_REG_BW_RATE 0x2C
#define ADXL313_REG_POWER_CTL 0x2D
#define ADXL313_REG_INT_ENABLE 0x2E
#define ADXL313_REG_INT_MAP 0x2F
#define ADXL313_REG_INT_SOURCE 0x30
#define ADXL313_REG_DATA_FORMAT 0x31
#define ADXL313_REG_DATA_AXIS(index) (0x32 + ((index) * 2))
#define ADXL313_REG_FIFO_CTL 0x38
#define ADXL313_REG_FIFO_STATUS 0x39
#define ADXL313_DEVID0 0xAD
#define ADXL313_DEVID0_ADXL312_314 0xE5
#define ADXL313_DEVID1 0x1D
#define ADXL313_PARTID 0xCB
#define ADXL313_SOFT_RESET 0x52
#define ADXL313_RATE_MSK GENMASK(3, 0)
#define ADXL313_RATE_BASE 6
#define ADXL313_POWER_CTL_MSK BIT(3)
#define ADXL313_POWER_CTL_INACT_MSK GENMASK(5, 4)
#define ADXL313_POWER_CTL_LINK BIT(5)
#define ADXL313_POWER_CTL_AUTO_SLEEP BIT(4)
#define ADXL313_RANGE_MSK GENMASK(1, 0)
#define ADXL313_RANGE_MAX 3
#define ADXL313_FULL_RES BIT(3)
#define ADXL313_SPI_3WIRE BIT(6)
#define ADXL313_I2C_DISABLE BIT(6)
#define ADXL313_INT_OVERRUN BIT(0)
#define ADXL313_INT_WATERMARK BIT(1)
#define ADXL313_INT_INACTIVITY BIT(3)
#define ADXL313_INT_ACTIVITY BIT(4)
#define ADXL313_INT_DREADY BIT(7)
/* FIFO entries: how many values are stored in the FIFO */
#define ADXL313_REG_FIFO_STATUS_ENTRIES_MSK GENMASK(5, 0)
/* FIFO samples: number of samples needed for watermark (FIFO mode) */
#define ADXL313_REG_FIFO_CTL_SAMPLES_MSK GENMASK(4, 0)
#define ADXL313_REG_FIFO_CTL_MODE_MSK GENMASK(7, 6)
#define ADXL313_FIFO_BYPASS 0
#define ADXL313_FIFO_STREAM 2
#define ADXL313_FIFO_SIZE 32
#define ADXL313_NUM_AXIS 3
extern const struct regmap_access_table adxl312_readable_regs_table;
extern const struct regmap_access_table adxl313_readable_regs_table;
extern const struct regmap_access_table adxl314_readable_regs_table;
extern const struct regmap_access_table adxl312_writable_regs_table;
extern const struct regmap_access_table adxl313_writable_regs_table;
extern const struct regmap_access_table adxl314_writable_regs_table;
bool adxl313_is_volatile_reg(struct device *dev, unsigned int reg);
enum adxl313_device_type {
ADXL312,
ADXL313,
ADXL314,
};
struct adxl313_data {
struct regmap *regmap;
const struct adxl313_chip_info *chip_info;
struct mutex lock; /* lock to protect transf_buf */
u8 watermark;
__le16 transf_buf __aligned(IIO_DMA_MINALIGN);
__le16 fifo_buf[ADXL313_NUM_AXIS * ADXL313_FIFO_SIZE + 1];
};
struct adxl313_chip_info {
const char *name;
enum adxl313_device_type type;
int scale_factor;
bool variable_range;
bool soft_reset;
int (*check_id)(struct device *dev, struct adxl313_data *data);
};
extern const struct adxl313_chip_info adxl31x_chip_info[];
int adxl313_core_probe(struct device *dev,
struct regmap *regmap,
const struct adxl313_chip_info *chip_info,
int (*setup)(struct device *, struct regmap *));
#endif /* _ADXL313_H_ */
linux-7.2.3/drivers/iio/accel/adxl313_core.c
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linux-7.2.3/drivers/iio/accel/adxl313_i2c.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl313.h"
static const struct regmap_config adxl31x_i2c_regmap_config[] = {
[ADXL312] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl312_readable_regs_table,
.wr_table = &adxl312_writable_regs_table,
.max_register = 0x39,
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL313] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl313_readable_regs_table,
.wr_table = &adxl313_writable_regs_table,
.max_register = 0x39,
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL314] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl314_readable_regs_table,
.wr_table = &adxl314_writable_regs_table,
.max_register = 0x39,
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
};
static const struct i2c_device_id adxl313_i2c_id[] = {
{ .name = "adxl312", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] },
{ .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL313] },
{ .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl313_i2c_id);
static const struct of_device_id adxl313_of_match[] = {
{ .compatible = "adi,adxl312", .data = &adxl31x_chip_info[ADXL312] },
{ .compatible = "adi,adxl313", .data = &adxl31x_chip_info[ADXL313] },
{ .compatible = "adi,adxl314", .data = &adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl313_of_match);
static int adxl313_i2c_probe(struct i2c_client *client)
{
const struct adxl313_chip_info *chip_data;
struct device *dev = &client->dev;
struct regmap *regmap;
/*
* Retrieves device specific data as a pointer to a
* adxl313_chip_info structure
*/
chip_data = i2c_get_match_data(client);
regmap = devm_regmap_init_i2c(client,
&adxl31x_i2c_regmap_config[chip_data->type]);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing i2c regmap\n");
return adxl313_core_probe(dev, regmap, chip_data, NULL);
}
static struct i2c_driver adxl313_i2c_driver = {
.driver = {
.name = "adxl313_i2c",
.of_match_table = adxl313_of_match,
},
.probe = adxl313_i2c_probe,
.id_table = adxl313_i2c_id,
};
module_i2c_driver(adxl313_i2c_driver);
MODULE_AUTHOR("Lucas Stankus <lucas.p.stankus@gmail.com>");
MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL313");
linux-7.2.3/drivers/iio/accel/adxl313_spi.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL313 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/property.h>
#include "adxl313.h"
static const struct regmap_config adxl31x_spi_regmap_config[] = {
[ADXL312] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl312_readable_regs_table,
.wr_table = &adxl312_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL313] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl313_readable_regs_table,
.wr_table = &adxl313_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
[ADXL314] = {
.reg_bits = 8,
.val_bits = 8,
.rd_table = &adxl314_readable_regs_table,
.wr_table = &adxl314_writable_regs_table,
.max_register = 0x39,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl313_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
},
};
static int adxl313_spi_setup(struct device *dev, struct regmap *regmap)
{
struct spi_device *spi = container_of(dev, struct spi_device, dev);
int ret;
if (spi->mode & SPI_3WIRE) {
ret = regmap_write(regmap, ADXL313_REG_DATA_FORMAT,
ADXL313_SPI_3WIRE);
if (ret)
return ret;
}
return regmap_update_bits(regmap, ADXL313_REG_POWER_CTL,
ADXL313_I2C_DISABLE, ADXL313_I2C_DISABLE);
}
static int adxl313_spi_probe(struct spi_device *spi)
{
const struct adxl313_chip_info *chip_data;
struct device *dev = &spi->dev;
struct regmap *regmap;
int ret;
spi->mode |= SPI_MODE_3;
ret = spi_setup(spi);
if (ret)
return ret;
chip_data = spi_get_device_match_data(spi);
regmap = devm_regmap_init_spi(spi,
&adxl31x_spi_regmap_config[chip_data->type]);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing spi regmap\n");
return adxl313_core_probe(dev, regmap, chip_data, &adxl313_spi_setup);
}
static const struct spi_device_id adxl313_spi_id[] = {
{ .name = "adxl312", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] },
{ .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL313] },
{ .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl313_spi_id);
static const struct of_device_id adxl313_of_match[] = {
{ .compatible = "adi,adxl312", .data = &adxl31x_chip_info[ADXL312] },
{ .compatible = "adi,adxl313", .data = &adxl31x_chip_info[ADXL313] },
{ .compatible = "adi,adxl314", .data = &adxl31x_chip_info[ADXL314] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl313_of_match);
static struct spi_driver adxl313_spi_driver = {
.driver = {
.name = "adxl313_spi",
.of_match_table = adxl313_of_match,
},
.probe = adxl313_spi_probe,
.id_table = adxl313_spi_id,
};
module_spi_driver(adxl313_spi_driver);
MODULE_AUTHOR("Lucas Stankus <lucas.p.stankus@gmail.com>");
MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL313");
linux-7.2.3/drivers/iio/accel/adxl345.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ADXL345 3-Axis Digital Accelerometer
*
* Copyright (c) 2017 Eva Rachel Retuya <eraretuya@gmail.com>
*/
#ifndef _ADXL345_H_
#define _ADXL345_H_
#define ADXL345_REG_DEVID 0x00
#define ADXL345_REG_THRESH_TAP 0x1D
#define ADXL345_REG_OFSX 0x1E
#define ADXL345_REG_OFSY 0x1F
#define ADXL345_REG_OFSZ 0x20
#define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index))
/* Tap duration */
#define ADXL345_REG_DUR 0x21
/* Tap latency */
#define ADXL345_REG_LATENT 0x22
/* Tap window */
#define ADXL345_REG_WINDOW 0x23
/* Activity threshold */
#define ADXL345_REG_THRESH_ACT 0x24
/* Inactivity threshold */
#define ADXL345_REG_THRESH_INACT 0x25
/* Inactivity time */
#define ADXL345_REG_TIME_INACT 0x26
/* Axis enable control for activity and inactivity detection */
#define ADXL345_REG_ACT_INACT_CTRL 0x27
/* Free-fall threshold */
#define ADXL345_REG_THRESH_FF 0x28
/* Free-fall time */
#define ADXL345_REG_TIME_FF 0x29
/* Axis control for single tap or double tap */
#define ADXL345_REG_TAP_AXIS 0x2A
/* Source of single tap or double tap */
#define ADXL345_REG_ACT_TAP_STATUS 0x2B
/* Data rate and power mode control */
#define ADXL345_REG_BW_RATE 0x2C
#define ADXL345_REG_POWER_CTL 0x2D
#define ADXL345_REG_INT_ENABLE 0x2E
#define ADXL345_REG_INT_MAP 0x2F
#define ADXL345_REG_INT_SOURCE 0x30
#define ADXL345_REG_DATA_FORMAT 0x31
#define ADXL345_REG_XYZ_BASE 0x32
#define ADXL345_REG_DATA_AXIS(index) \
(ADXL345_REG_XYZ_BASE + (index) * sizeof(__le16))
#define ADXL345_REG_FIFO_CTL 0x38
#define ADXL345_FIFO_CTL_SAMPLES_MSK GENMASK(4, 0)
/* 0: INT1, 1: INT2 */
#define ADXL345_FIFO_CTL_TRIGGER_MSK BIT(5)
#define ADXL345_FIFO_CTL_MODE_MSK GENMASK(7, 6)
#define ADXL345_REG_FIFO_STATUS 0x39
#define ADXL345_REG_FIFO_STATUS_MSK 0x3F
#define ADXL345_INT_OVERRUN BIT(0)
#define ADXL345_INT_WATERMARK BIT(1)
#define ADXL345_INT_FREE_FALL BIT(2)
#define ADXL345_INT_INACTIVITY BIT(3)
#define ADXL345_INT_ACTIVITY BIT(4)
#define ADXL345_INT_DOUBLE_TAP BIT(5)
#define ADXL345_INT_SINGLE_TAP BIT(6)
#define ADXL345_INT_DATA_READY BIT(7)
/*
* BW_RATE bits - Bandwidth and output data rate. The default value is
* 0x0A, which translates to a 100 Hz output data rate
*/
#define ADXL345_BW_RATE_MSK GENMASK(3, 0)
#define ADXL345_BW_LOW_POWER BIT(4)
#define ADXL345_BASE_RATE_NANO_HZ 97656250LL
#define ADXL345_POWER_CTL_WAKEUP GENMASK(1, 0)
#define ADXL345_POWER_CTL_SLEEP BIT(2)
#define ADXL345_POWER_CTL_MEASURE BIT(3)
#define ADXL345_POWER_CTL_AUTO_SLEEP BIT(4)
#define ADXL345_POWER_CTL_LINK BIT(5)
/* Set the g range */
#define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0)
/* Data is left justified */
#define ADXL345_DATA_FORMAT_JUSTIFY BIT(2)
/* Up to 13-bits resolution */
#define ADXL345_DATA_FORMAT_FULL_RES BIT(3)
#define ADXL345_DATA_FORMAT_SPI_3WIRE BIT(6)
#define ADXL345_DATA_FORMAT_SELF_TEST BIT(7)
#define ADXL345_DATA_FORMAT_2G 0
#define ADXL345_DATA_FORMAT_4G 1
#define ADXL345_DATA_FORMAT_8G 2
#define ADXL345_DATA_FORMAT_16G 3
#define ADXL345_DEVID 0xE5
#define ADXL345_FIFO_SIZE 32
/*
* In full-resolution mode, scale factor is maintained at ~4 mg/LSB
* in all g ranges.
*
* At +/- 16g with 13-bit resolution, scale is computed as:
* (16 + 16) * 9.81 / (2^13 - 1) = 0.0383
*/
#define ADXL345_USCALE 38300
/*
* The Datasheet lists a resolution of Resolution is ~49 mg per LSB. That's
* ~480mm/s**2 per LSB.
*/
#define ADXL375_USCALE 480000
struct regmap;
bool adxl345_is_volatile_reg(struct device *dev, unsigned int reg);
struct adxl345_chip_info {
const char *name;
int uscale;
};
int adxl345_core_probe(struct device *dev, struct regmap *regmap,
bool fifo_delay_default,
int (*setup)(struct device*, struct regmap*));
#endif /* _ADXL345_H_ */
linux-7.2.3/drivers/iio/accel/adxl345_core.c
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linux-7.2.3/drivers/iio/accel/adxl345_i2c.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL345 3-Axis Digital Accelerometer I2C driver
*
* Copyright (c) 2017 Eva Rachel Retuya <eraretuya@gmail.com>
*
* 7-bit I2C slave address: 0x1D (ALT ADDRESS pin tied to VDDIO) or
* 0x53 (ALT ADDRESS pin grounded)
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl345.h"
static const struct regmap_config adxl345_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.volatile_reg = adxl345_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
};
static int adxl345_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &adxl345_i2c_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&client->dev, PTR_ERR(regmap), "Error initializing regmap\n");
return adxl345_core_probe(&client->dev, regmap, false, NULL);
}
static const struct adxl345_chip_info adxl345_i2c_info = {
.name = "adxl345",
.uscale = ADXL345_USCALE,
};
static const struct adxl345_chip_info adxl375_i2c_info = {
.name = "adxl375",
.uscale = ADXL375_USCALE,
};
static const struct i2c_device_id adxl345_i2c_id[] = {
{ .name = "adxl345", .driver_data = (kernel_ulong_t)&adxl345_i2c_info },
{ .name = "adxl375", .driver_data = (kernel_ulong_t)&adxl375_i2c_info },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl345_i2c_id);
static const struct of_device_id adxl345_of_match[] = {
{ .compatible = "adi,adxl345", .data = &adxl345_i2c_info },
{ .compatible = "adi,adxl375", .data = &adxl375_i2c_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl345_of_match);
static const struct acpi_device_id adxl345_acpi_match[] = {
{ "ADS0345", (kernel_ulong_t)&adxl345_i2c_info },
{ }
};
MODULE_DEVICE_TABLE(acpi, adxl345_acpi_match);
static struct i2c_driver adxl345_i2c_driver = {
.driver = {
.name = "adxl345_i2c",
.of_match_table = adxl345_of_match,
.acpi_match_table = adxl345_acpi_match,
},
.probe = adxl345_i2c_probe,
.id_table = adxl345_i2c_id,
};
module_i2c_driver(adxl345_i2c_driver);
MODULE_AUTHOR("Eva Rachel Retuya <eraretuya@gmail.com>");
MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL345");
linux-7.2.3/drivers/iio/accel/adxl345_spi.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL345 3-Axis Digital Accelerometer SPI driver
*
* Copyright (c) 2017 Eva Rachel Retuya <eraretuya@gmail.com>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "adxl345.h"
#define ADXL345_MAX_SPI_FREQ_HZ 5000000
#define ADXL345_MAX_FREQ_NO_FIFO_DELAY 1500000
static const struct regmap_config adxl345_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
/* Setting bits 7 and 6 enables multiple-byte read */
.read_flag_mask = BIT(7) | BIT(6),
.volatile_reg = adxl345_is_volatile_reg,
.cache_type = REGCACHE_MAPLE,
};
static int adxl345_spi_setup(struct device *dev, struct regmap *regmap)
{
return regmap_write(regmap, ADXL345_REG_DATA_FORMAT, ADXL345_DATA_FORMAT_SPI_3WIRE);
}
static int adxl345_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
bool needs_delay;
/* Bail out if max_speed_hz exceeds 5 MHz */
if (spi->max_speed_hz > ADXL345_MAX_SPI_FREQ_HZ)
return dev_err_probe(&spi->dev, -EINVAL, "SPI CLK, %d Hz exceeds 5 MHz\n",
spi->max_speed_hz);
regmap = devm_regmap_init_spi(spi, &adxl345_spi_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&spi->dev, PTR_ERR(regmap), "Error initializing regmap\n");
needs_delay = spi->max_speed_hz > ADXL345_MAX_FREQ_NO_FIFO_DELAY;
if (spi->mode & SPI_3WIRE)
return adxl345_core_probe(&spi->dev, regmap, needs_delay, adxl345_spi_setup);
else
return adxl345_core_probe(&spi->dev, regmap, needs_delay, NULL);
}
static const struct adxl345_chip_info adxl345_spi_info = {
.name = "adxl345",
.uscale = ADXL345_USCALE,
};
static const struct adxl345_chip_info adxl375_spi_info = {
.name = "adxl375",
.uscale = ADXL375_USCALE,
};
static const struct spi_device_id adxl345_spi_id[] = {
{ "adxl345", (kernel_ulong_t)&adxl345_spi_info },
{ "adxl375", (kernel_ulong_t)&adxl375_spi_info },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl345_spi_id);
static const struct of_device_id adxl345_of_match[] = {
{ .compatible = "adi,adxl345", .data = &adxl345_spi_info },
{ .compatible = "adi,adxl375", .data = &adxl375_spi_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl345_of_match);
static const struct acpi_device_id adxl345_acpi_match[] = {
{ "ADS0345", (kernel_ulong_t)&adxl345_spi_info },
{ }
};
MODULE_DEVICE_TABLE(acpi, adxl345_acpi_match);
static struct spi_driver adxl345_spi_driver = {
.driver = {
.name = "adxl345_spi",
.of_match_table = adxl345_of_match,
.acpi_match_table = adxl345_acpi_match,
},
.probe = adxl345_spi_probe,
.id_table = adxl345_spi_id,
};
module_spi_driver(adxl345_spi_driver);
MODULE_AUTHOR("Eva Rachel Retuya <eraretuya@gmail.com>");
MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL345");
linux-7.2.3/drivers/iio/accel/adxl355.h
+39
View File
@@ -0,0 +1,39 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ADXL355 3-Axis Digital Accelerometer
*
* Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
*/
#ifndef _ADXL355_H_
#define _ADXL355_H_
#include <linux/regmap.h>
enum adxl355_device_type {
ADXL355,
ADXL359,
};
struct adxl355_fractional_type {
int integer;
int decimal;
};
struct device;
struct adxl355_chip_info {
const char *name;
u8 part_id;
struct adxl355_fractional_type accel_scale;
struct adxl355_fractional_type temp_offset;
};
extern const struct regmap_access_table adxl355_readable_regs_tbl;
extern const struct regmap_access_table adxl355_writeable_regs_tbl;
extern const struct adxl355_chip_info adxl35x_chip_info[];
int adxl355_core_probe(struct device *dev, struct regmap *regmap,
const struct adxl355_chip_info *chip_info);
#endif /* _ADXL355_H_ */
linux-7.2.3/drivers/iio/accel/adxl355_core.c
+834
View File
@@ -0,0 +1,834 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer IIO core driver
*
* Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
*
* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
*/
#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/limits.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/units.h>
#include <linux/unaligned.h>
#include "adxl355.h"
/* ADXL355 Register Definitions */
#define ADXL355_DEVID_AD_REG 0x00
#define ADXL355_DEVID_MST_REG 0x01
#define ADXL355_PARTID_REG 0x02
#define ADXL355_STATUS_REG 0x04
#define ADXL355_FIFO_ENTRIES_REG 0x05
#define ADXL355_TEMP2_REG 0x06
#define ADXL355_XDATA3_REG 0x08
#define ADXL355_YDATA3_REG 0x0B
#define ADXL355_ZDATA3_REG 0x0E
#define ADXL355_FIFO_DATA_REG 0x11
#define ADXL355_OFFSET_X_H_REG 0x1E
#define ADXL355_OFFSET_Y_H_REG 0x20
#define ADXL355_OFFSET_Z_H_REG 0x22
#define ADXL355_ACT_EN_REG 0x24
#define ADXL355_ACT_THRESH_H_REG 0x25
#define ADXL355_ACT_THRESH_L_REG 0x26
#define ADXL355_ACT_COUNT_REG 0x27
#define ADXL355_FILTER_REG 0x28
#define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
#define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
#define ADXL355_FIFO_SAMPLES_REG 0x29
#define ADXL355_INT_MAP_REG 0x2A
#define ADXL355_SYNC_REG 0x2B
#define ADXL355_RANGE_REG 0x2C
#define ADXL355_POWER_CTL_REG 0x2D
#define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
#define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
#define ADXL355_SELF_TEST_REG 0x2E
#define ADXL355_RESET_REG 0x2F
#define ADXL355_BASE_ADDR_SHADOW_REG 0x50
#define ADXL355_SHADOW_REG_COUNT 5
#define ADXL355_DEVID_AD_VAL 0xAD
#define ADXL355_DEVID_MST_VAL 0x1D
#define ADXL355_PARTID_VAL 0xED
#define ADXL359_PARTID_VAL 0xE9
#define ADXL355_RESET_CODE 0x52
static const struct regmap_range adxl355_read_reg_range[] = {
regmap_reg_range(ADXL355_DEVID_AD_REG, ADXL355_FIFO_DATA_REG),
regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_SELF_TEST_REG),
};
const struct regmap_access_table adxl355_readable_regs_tbl = {
.yes_ranges = adxl355_read_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl355_readable_regs_tbl, "IIO_ADXL355");
static const struct regmap_range adxl355_write_reg_range[] = {
regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_RESET_REG),
};
const struct regmap_access_table adxl355_writeable_regs_tbl = {
.yes_ranges = adxl355_write_reg_range,
.n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
};
EXPORT_SYMBOL_NS_GPL(adxl355_writeable_regs_tbl, "IIO_ADXL355");
const struct adxl355_chip_info adxl35x_chip_info[] = {
[ADXL355] = {
.name = "adxl355",
.part_id = ADXL355_PARTID_VAL,
/*
* At +/- 2g with 20-bit resolution, scale is given in datasheet
* as 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2.
*/
.accel_scale = {
.integer = 0,
.decimal = 38245,
},
/*
* The datasheet defines an intercept of 1885 LSB at 25 degC
* and a slope of -9.05 LSB/C. The following formula can be used
* to find the temperature:
* Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow
* the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
* Hence using some rearranging we get the scale as -110.497238
* and offset as -2111.25.
*/
.temp_offset = {
.integer = -2111,
.decimal = 250000,
},
},
[ADXL359] = {
.name = "adxl359",
.part_id = ADXL359_PARTID_VAL,
/*
* At +/- 10g with 20-bit resolution, scale is given in datasheet
* as 19.5ug/LSB = 0.0000195 * 9.80665 = 0.0.00019122967 m/s^2.
*/
.accel_scale = {
.integer = 0,
.decimal = 191229,
},
/*
* The datasheet defines an intercept of 1852 LSB at 25 degC
* and a slope of -9.05 LSB/C. The following formula can be used
* to find the temperature:
* Temp = ((RAW - 1852)/(-9.05)) + 25 but this doesn't follow
* the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
* Hence using some rearranging we get the scale as -110.497238
* and offset as -2079.25.
*/
.temp_offset = {
.integer = -2079,
.decimal = 250000,
},
},
};
EXPORT_SYMBOL_NS_GPL(adxl35x_chip_info, "IIO_ADXL355");
enum adxl355_op_mode {
ADXL355_MEASUREMENT,
ADXL355_STANDBY,
ADXL355_TEMP_OFF,
};
enum adxl355_odr {
ADXL355_ODR_4000HZ,
ADXL355_ODR_2000HZ,
ADXL355_ODR_1000HZ,
ADXL355_ODR_500HZ,
ADXL355_ODR_250HZ,
ADXL355_ODR_125HZ,
ADXL355_ODR_62_5HZ,
ADXL355_ODR_31_25HZ,
ADXL355_ODR_15_625HZ,
ADXL355_ODR_7_813HZ,
ADXL355_ODR_3_906HZ,
};
enum adxl355_hpf_3db {
ADXL355_HPF_OFF,
ADXL355_HPF_24_7,
ADXL355_HPF_6_2084,
ADXL355_HPF_1_5545,
ADXL355_HPF_0_3862,
ADXL355_HPF_0_0954,
ADXL355_HPF_0_0238,
};
static const int adxl355_odr_table[][2] = {
[0] = {4000, 0},
[1] = {2000, 0},
[2] = {1000, 0},
[3] = {500, 0},
[4] = {250, 0},
[5] = {125, 0},
[6] = {62, 500000},
[7] = {31, 250000},
[8] = {15, 625000},
[9] = {7, 813000},
[10] = {3, 906000},
};
static const int adxl355_hpf_3db_multipliers[] = {
0,
247000,
62084,
15545,
3862,
954,
238,
};
enum adxl355_chans {
chan_x, chan_y, chan_z,
};
struct adxl355_chan_info {
u8 data_reg;
u8 offset_reg;
};
static const struct adxl355_chan_info adxl355_chans[] = {
[chan_x] = {
.data_reg = ADXL355_XDATA3_REG,
.offset_reg = ADXL355_OFFSET_X_H_REG
},
[chan_y] = {
.data_reg = ADXL355_YDATA3_REG,
.offset_reg = ADXL355_OFFSET_Y_H_REG
},
[chan_z] = {
.data_reg = ADXL355_ZDATA3_REG,
.offset_reg = ADXL355_OFFSET_Z_H_REG
},
};
struct adxl355_data {
const struct adxl355_chip_info *chip_info;
struct regmap *regmap;
struct device *dev;
struct mutex lock; /* lock to protect op_mode */
enum adxl355_op_mode op_mode;
enum adxl355_odr odr;
enum adxl355_hpf_3db hpf_3db;
int calibbias[3];
int adxl355_hpf_3db_table[7][2];
struct iio_trigger *dready_trig;
union {
u8 transf_buf[3];
struct {
u8 buf[14];
aligned_s64 ts;
} buffer;
} __aligned(IIO_DMA_MINALIGN);
};
static int adxl355_set_op_mode(struct adxl355_data *data,
enum adxl355_op_mode op_mode)
{
int ret;
if (data->op_mode == op_mode)
return 0;
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_MODE_MSK, op_mode);
if (ret)
return ret;
data->op_mode = op_mode;
return ret;
}
static int adxl355_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_DRDY_MSK,
FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,
state ? 0 : 1));
mutex_unlock(&data->lock);
return ret;
}
static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
{
u32 multiplier;
u64 div, rem;
u64 odr;
int i;
odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
adxl355_odr_table[data->odr][1];
for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
multiplier = adxl355_hpf_3db_multipliers[i];
div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
TERA * 100, &rem);
data->adxl355_hpf_3db_table[i][0] = div;
data->adxl355_hpf_3db_table[i][1] = div_u64(rem, MEGA * 100);
}
}
static int adxl355_setup(struct adxl355_data *data)
{
unsigned int regval;
int retries = 5; /* the number is chosen based on empirical reasons */
int ret;
u8 *shadow_regs __free(kfree) = kzalloc(ADXL355_SHADOW_REG_COUNT, GFP_KERNEL);
if (!shadow_regs)
return -ENOMEM;
ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, &regval);
if (ret)
return ret;
if (regval != ADXL355_DEVID_AD_VAL) {
dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, ADXL355_DEVID_MST_REG, &regval);
if (ret)
return ret;
if (regval != ADXL355_DEVID_MST_VAL) {
dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, ADXL355_PARTID_REG, &regval);
if (ret)
return ret;
if (regval != ADXL355_PARTID_VAL)
dev_warn(data->dev, "Invalid DEV ID 0x%02x\n", regval);
/* Read shadow registers to be compared after reset */
ret = regmap_bulk_read(data->regmap,
ADXL355_BASE_ADDR_SHADOW_REG,
shadow_regs, ADXL355_SHADOW_REG_COUNT);
if (ret)
return ret;
do {
if (--retries == 0)
return dev_err_probe(data->dev, -EIO, "Shadow registers mismatch\n");
/*
* Perform a software reset to make sure the device is in a consistent
* state after start-up.
*/
ret = regmap_write(data->regmap, ADXL355_RESET_REG,
ADXL355_RESET_CODE);
if (ret)
return ret;
/* Wait at least 5ms after software reset */
fsleep(5 * USEC_PER_MSEC);
/* Read shadow registers for comparison */
ret = regmap_bulk_read(data->regmap,
ADXL355_BASE_ADDR_SHADOW_REG,
data->buffer.buf,
ADXL355_SHADOW_REG_COUNT);
if (ret)
return ret;
} while (memcmp(shadow_regs, data->buffer.buf,
ADXL355_SHADOW_REG_COUNT));
ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
ADXL355_POWER_CTL_DRDY_MSK,
FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));
if (ret)
return ret;
adxl355_fill_3db_frequency_table(data);
return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
}
static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
{
return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
}
static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
{
int ret;
ret = regmap_bulk_read(data->regmap, addr, data->transf_buf,
ARRAY_SIZE(data->transf_buf));
if (ret)
return ret;
return get_unaligned_be24(data->transf_buf);
}
static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
const int val, const int val2)
{
int i;
for (i = 0; i < n; i++) {
if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
return i;
}
return -EINVAL;
}
static int adxl355_set_odr(struct adxl355_data *data,
enum adxl355_odr odr)
{
int ret;
mutex_lock(&data->lock);
if (data->odr == odr) {
mutex_unlock(&data->lock);
return 0;
}
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
ADXL355_FILTER_ODR_MSK,
FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
if (ret)
goto err_set_opmode;
data->odr = odr;
adxl355_fill_3db_frequency_table(data);
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_set_hpf_3db(struct adxl355_data *data,
enum adxl355_hpf_3db hpf)
{
int ret;
mutex_lock(&data->lock);
if (data->hpf_3db == hpf) {
mutex_unlock(&data->lock);
return 0;
}
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
ADXL355_FILTER_HPF_MSK,
FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
if (ret)
goto err_set_opmode;
data->hpf_3db = hpf;
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_set_calibbias(struct adxl355_data *data,
enum adxl355_chans chan, int calibbias)
{
int ret;
mutex_lock(&data->lock);
ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
if (ret)
goto err_unlock;
put_unaligned_be16(calibbias, data->transf_buf);
ret = regmap_bulk_write(data->regmap,
adxl355_chans[chan].offset_reg,
data->transf_buf, 2);
if (ret)
goto err_set_opmode;
data->calibbias[chan] = calibbias;
ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
if (ret)
goto err_set_opmode;
mutex_unlock(&data->lock);
return 0;
err_set_opmode:
adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
err_unlock:
mutex_unlock(&data->lock);
return ret;
}
static int adxl355_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
ret = adxl355_get_temp_data(data, chan->address);
if (ret < 0)
return ret;
*val = get_unaligned_be16(data->transf_buf);
return IIO_VAL_INT;
case IIO_ACCEL:
ret = adxl355_read_axis(data, adxl355_chans[
chan->address].data_reg);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/*
* Temperature scale is -110.497238.
* See the detailed explanation in adxl35x_chip_info
* definition above.
*/
*val = -110;
*val2 = 497238;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
*val = data->chip_info->accel_scale.integer;
*val2 = data->chip_info->accel_scale.decimal;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = data->chip_info->temp_offset.integer;
*val2 = data->chip_info->temp_offset.decimal;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_CALIBBIAS:
*val = sign_extend32(data->calibbias[chan->address], 15);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = adxl355_odr_table[data->odr][0];
*val2 = adxl355_odr_table[data->odr][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
*val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int adxl355_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
int odr_idx, hpf_idx, calibbias;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
odr_idx = adxl355_find_match(adxl355_odr_table,
ARRAY_SIZE(adxl355_odr_table),
val, val2);
if (odr_idx < 0)
return odr_idx;
return adxl355_set_odr(data, odr_idx);
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
ARRAY_SIZE(data->adxl355_hpf_3db_table),
val, val2);
if (hpf_idx < 0)
return hpf_idx;
return adxl355_set_hpf_3db(data, hpf_idx);
case IIO_CHAN_INFO_CALIBBIAS:
calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
return adxl355_set_calibbias(data, chan->address, calibbias);
default:
return -EINVAL;
}
}
static int adxl355_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct adxl355_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = (const int *)adxl355_odr_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(adxl355_odr_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)data->adxl355_hpf_3db_table;
*type = IIO_VAL_INT_PLUS_MICRO;
/* Values are stored in a 2D matrix */
*length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const unsigned long adxl355_avail_scan_masks[] = {
GENMASK(3, 0),
0
};
static const struct iio_info adxl355_info = {
.read_raw = adxl355_read_raw,
.write_raw = adxl355_write_raw,
.read_avail = &adxl355_read_avail,
};
static const struct iio_trigger_ops adxl355_trigger_ops = {
.set_trigger_state = &adxl355_data_rdy_trigger_set_state,
.validate_device = &iio_trigger_validate_own_device,
};
static irqreturn_t adxl355_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->lock);
/*
* data->buffer is used both for triggered buffer support
* and read/write_raw(), hence, it has to be zeroed here before usage.
*/
data->buffer.buf[0] = 0;
/*
* The acceleration data is 24 bits and big endian. It has to be saved
* in 32 bits, hence, it is saved in the 2nd byte of the 4 byte buffer.
* The buf array is 14 bytes as it includes 3x4=12 bytes for
* acceleration data of x, y, and z axis. It also includes 2 bytes for
* temperature data.
*/
ret = regmap_bulk_read(data->regmap, ADXL355_XDATA3_REG,
&data->buffer.buf[1], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_YDATA3_REG,
&data->buffer.buf[5], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_ZDATA3_REG,
&data->buffer.buf[9], 3);
if (ret)
goto out_unlock_notify;
ret = regmap_bulk_read(data->regmap, ADXL355_TEMP2_REG,
&data->buffer.buf[12], 2);
if (ret)
goto out_unlock_notify;
iio_push_to_buffers_with_ts(indio_dev, &data->buffer,
sizeof(data->buffer), pf->timestamp);
out_unlock_notify:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
#define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 20, \
.storagebits = 32, \
.shift = 4, \
.endianness = IIO_BE, \
} \
}
static const struct iio_chan_spec adxl355_channels[] = {
ADXL355_ACCEL_CHANNEL(0, chan_x, X),
ADXL355_ACCEL_CHANNEL(1, chan_y, Y),
ADXL355_ACCEL_CHANNEL(2, chan_z, Z),
{
.type = IIO_TEMP,
.address = ADXL355_TEMP2_REG,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = 3,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
.endianness = IIO_BE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static int adxl355_probe_trigger(struct iio_dev *indio_dev, int irq)
{
struct adxl355_data *data = iio_priv(indio_dev);
int ret;
data->dready_trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
data->dready_trig->ops = &adxl355_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = devm_request_irq(data->dev, irq, &iio_trigger_generic_data_rdy_poll,
IRQF_NO_THREAD, "adxl355_irq", data->dready_trig);
if (ret)
return dev_err_probe(data->dev, ret, "request irq %d failed\n",
irq);
ret = devm_iio_trigger_register(data->dev, data->dready_trig);
if (ret)
return dev_err_probe(data->dev, ret, "iio trigger register failed\n");
indio_dev->trig = iio_trigger_get(data->dready_trig);
return 0;
}
int adxl355_core_probe(struct device *dev, struct regmap *regmap,
const struct adxl355_chip_info *chip_info)
{
struct adxl355_data *data;
struct iio_dev *indio_dev;
int ret;
int irq;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
data->dev = dev;
data->op_mode = ADXL355_STANDBY;
data->chip_info = chip_info;
ret = devm_mutex_init(dev, &data->lock);
if (ret)
return ret;
indio_dev->name = chip_info->name;
indio_dev->info = &adxl355_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = adxl355_channels;
indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
indio_dev->available_scan_masks = adxl355_avail_scan_masks;
ret = adxl355_setup(data);
if (ret)
return dev_err_probe(dev, ret, "ADXL355 setup failed\n");
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
&iio_pollfunc_store_time,
&adxl355_trigger_handler, NULL);
if (ret)
return dev_err_probe(dev, ret, "iio triggered buffer setup failed\n");
irq = fwnode_irq_get_byname(dev_fwnode(dev), "DRDY");
if (irq > 0) {
ret = adxl355_probe_trigger(indio_dev, irq);
if (ret)
return ret;
}
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(adxl355_core_probe, "IIO_ADXL355");
MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/adxl355_i2c.c
+66
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@@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer I2C driver
*
* Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl355.h"
static const struct regmap_config adxl355_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x2F,
.rd_table = &adxl355_readable_regs_tbl,
.wr_table = &adxl355_writeable_regs_tbl,
};
static int adxl355_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
struct device *dev = &client->dev;
const struct adxl355_chip_info *chip_data;
chip_data = i2c_get_match_data(client);
if (!chip_data)
return -ENODEV;
regmap = devm_regmap_init_i2c(client, &adxl355_i2c_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing i2c regmap\n");
return adxl355_core_probe(dev, regmap, chip_data);
}
static const struct i2c_device_id adxl355_i2c_id[] = {
{ .name = "adxl355", .driver_data = (kernel_ulong_t)&adxl35x_chip_info[ADXL355] },
{ .name = "adxl359", .driver_data = (kernel_ulong_t)&adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl355_i2c_id);
static const struct of_device_id adxl355_of_match[] = {
{ .compatible = "adi,adxl355", .data = &adxl35x_chip_info[ADXL355] },
{ .compatible = "adi,adxl359", .data = &adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl355_of_match);
static struct i2c_driver adxl355_i2c_driver = {
.driver = {
.name = "adxl355_i2c",
.of_match_table = adxl355_of_match,
},
.probe = adxl355_i2c_probe,
.id_table = adxl355_i2c_id,
};
module_i2c_driver(adxl355_i2c_driver);
MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer I2C driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL355");
linux-7.2.3/drivers/iio/accel/adxl355_spi.c
+69
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@@ -0,0 +1,69 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADXL355 3-Axis Digital Accelerometer SPI driver
*
* Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/property.h>
#include "adxl355.h"
static const struct regmap_config adxl355_spi_regmap_config = {
.reg_bits = 7,
.pad_bits = 1,
.val_bits = 8,
.read_flag_mask = BIT(0),
.max_register = 0x2F,
.rd_table = &adxl355_readable_regs_tbl,
.wr_table = &adxl355_writeable_regs_tbl,
};
static int adxl355_spi_probe(struct spi_device *spi)
{
const struct adxl355_chip_info *chip_data;
struct device *dev = &spi->dev;
struct regmap *regmap;
chip_data = spi_get_device_match_data(spi);
if (!chip_data)
return -EINVAL;
regmap = devm_regmap_init_spi(spi, &adxl355_spi_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing spi regmap\n");
return adxl355_core_probe(dev, regmap, chip_data);
}
static const struct spi_device_id adxl355_spi_id[] = {
{ "adxl355", (kernel_ulong_t)&adxl35x_chip_info[ADXL355] },
{ "adxl359", (kernel_ulong_t)&adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl355_spi_id);
static const struct of_device_id adxl355_of_match[] = {
{ .compatible = "adi,adxl355", .data = &adxl35x_chip_info[ADXL355] },
{ .compatible = "adi,adxl359", .data = &adxl35x_chip_info[ADXL359] },
{ }
};
MODULE_DEVICE_TABLE(of, adxl355_of_match);
static struct spi_driver adxl355_spi_driver = {
.driver = {
.name = "adxl355_spi",
.of_match_table = adxl355_of_match,
},
.probe = adxl355_spi_probe,
.id_table = adxl355_spi_id,
};
module_spi_driver(adxl355_spi_driver);
MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ADXL355");
linux-7.2.3/drivers/iio/accel/adxl367.c
+1497
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/adxl367.h
+23
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@@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <cosmin.tanislav@analog.com>
*/
#ifndef _ADXL367_H_
#define _ADXL367_H_
#include <linux/types.h>
struct device;
struct regmap;
struct adxl367_ops {
int (*read_fifo)(void *context, __be16 *fifo_buf,
unsigned int fifo_entries);
};
int adxl367_probe(struct device *dev, const struct adxl367_ops *ops,
void *context, struct regmap *regmap, int irq);
#endif /* _ADXL367_H_ */
linux-7.2.3/drivers/iio/accel/adxl367_i2c.c
+88
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@@ -0,0 +1,88 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <cosmin.tanislav@analog.com>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl367.h"
#define ADXL367_I2C_FIFO_DATA 0x18
struct adxl367_i2c_state {
struct regmap *regmap;
};
static bool adxl367_readable_noinc_reg(struct device *dev, unsigned int reg)
{
return reg == ADXL367_I2C_FIFO_DATA;
}
static int adxl367_i2c_read_fifo(void *context, __be16 *fifo_buf,
unsigned int fifo_entries)
{
struct adxl367_i2c_state *st = context;
return regmap_noinc_read(st->regmap, ADXL367_I2C_FIFO_DATA, fifo_buf,
fifo_entries * sizeof(*fifo_buf));
}
static const struct regmap_config adxl367_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.readable_noinc_reg = adxl367_readable_noinc_reg,
};
static const struct adxl367_ops adxl367_i2c_ops = {
.read_fifo = adxl367_i2c_read_fifo,
};
static int adxl367_i2c_probe(struct i2c_client *client)
{
struct adxl367_i2c_state *st;
struct regmap *regmap;
st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &adxl367_i2c_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
st->regmap = regmap;
return adxl367_probe(&client->dev, &adxl367_i2c_ops, st, regmap,
client->irq);
}
static const struct i2c_device_id adxl367_i2c_id[] = {
{ .name = "adxl367" },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl367_i2c_id);
static const struct of_device_id adxl367_of_match[] = {
{ .compatible = "adi,adxl367" },
{ }
};
MODULE_DEVICE_TABLE(of, adxl367_of_match);
static struct i2c_driver adxl367_i2c_driver = {
.driver = {
.name = "adxl367_i2c",
.of_match_table = adxl367_of_match,
},
.probe = adxl367_i2c_probe,
.id_table = adxl367_i2c_id,
};
module_i2c_driver(adxl367_i2c_driver);
MODULE_IMPORT_NS("IIO_ADXL367");
MODULE_AUTHOR("Cosmin Tanislav <cosmin.tanislav@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL367 3-axis accelerometer I2C driver");
MODULE_LICENSE("GPL");
linux-7.2.3/drivers/iio/accel/adxl367_spi.c
+165
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@@ -0,0 +1,165 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Analog Devices, Inc.
* Author: Cosmin Tanislav <cosmin.tanislav@analog.com>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include "adxl367.h"
#define ADXL367_SPI_WRITE_COMMAND 0x0A
#define ADXL367_SPI_READ_COMMAND 0x0B
#define ADXL367_SPI_FIFO_COMMAND 0x0D
struct adxl367_spi_state {
struct spi_device *spi;
struct spi_message reg_write_msg;
struct spi_transfer reg_write_xfer[2];
struct spi_message reg_read_msg;
struct spi_transfer reg_read_xfer[2];
struct spi_message fifo_msg;
struct spi_transfer fifo_xfer[2];
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers live in their own cache lines.
*/
u8 reg_write_tx_buf[1] __aligned(IIO_DMA_MINALIGN);
u8 reg_read_tx_buf[2];
u8 fifo_tx_buf[1];
};
static int adxl367_read_fifo(void *context, __be16 *fifo_buf,
unsigned int fifo_entries)
{
struct adxl367_spi_state *st = context;
st->fifo_xfer[1].rx_buf = fifo_buf;
st->fifo_xfer[1].len = fifo_entries * sizeof(*fifo_buf);
return spi_sync(st->spi, &st->fifo_msg);
}
static int adxl367_read(void *context, const void *reg_buf, size_t reg_size,
void *val_buf, size_t val_size)
{
struct adxl367_spi_state *st = context;
u8 reg = ((const u8 *)reg_buf)[0];
st->reg_read_tx_buf[1] = reg;
st->reg_read_xfer[1].rx_buf = val_buf;
st->reg_read_xfer[1].len = val_size;
return spi_sync(st->spi, &st->reg_read_msg);
}
static int adxl367_write(void *context, const void *val_buf, size_t val_size)
{
struct adxl367_spi_state *st = context;
st->reg_write_xfer[1].tx_buf = val_buf;
st->reg_write_xfer[1].len = val_size;
return spi_sync(st->spi, &st->reg_write_msg);
}
static const struct regmap_bus adxl367_spi_regmap_bus = {
.read = adxl367_read,
.write = adxl367_write,
};
static const struct regmap_config adxl367_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct adxl367_ops adxl367_spi_ops = {
.read_fifo = adxl367_read_fifo,
};
static int adxl367_spi_probe(struct spi_device *spi)
{
struct adxl367_spi_state *st;
struct regmap *regmap;
st = devm_kzalloc(&spi->dev, sizeof(*st), GFP_KERNEL);
if (!st)
return -ENOMEM;
st->spi = spi;
/*
* Xfer: [XFR1] [ XFR2 ]
* Master: 0x0A ADDR DATA0 DATA1 ... DATAN
* Slave: .... ..........................
*/
st->reg_write_tx_buf[0] = ADXL367_SPI_WRITE_COMMAND;
st->reg_write_xfer[0].tx_buf = st->reg_write_tx_buf;
st->reg_write_xfer[0].len = sizeof(st->reg_write_tx_buf);
spi_message_init_with_transfers(&st->reg_write_msg,
st->reg_write_xfer, 2);
/*
* Xfer: [ XFR1 ] [ XFR2 ]
* Master: 0x0B ADDR .....................
* Slave: ......... DATA0 DATA1 ... DATAN
*/
st->reg_read_tx_buf[0] = ADXL367_SPI_READ_COMMAND;
st->reg_read_xfer[0].tx_buf = st->reg_read_tx_buf;
st->reg_read_xfer[0].len = sizeof(st->reg_read_tx_buf);
spi_message_init_with_transfers(&st->reg_read_msg,
st->reg_read_xfer, 2);
/*
* Xfer: [XFR1] [ XFR2 ]
* Master: 0x0D .....................
* Slave: .... DATA0 DATA1 ... DATAN
*/
st->fifo_tx_buf[0] = ADXL367_SPI_FIFO_COMMAND;
st->fifo_xfer[0].tx_buf = st->fifo_tx_buf;
st->fifo_xfer[0].len = sizeof(st->fifo_tx_buf);
spi_message_init_with_transfers(&st->fifo_msg, st->fifo_xfer, 2);
regmap = devm_regmap_init(&spi->dev, &adxl367_spi_regmap_bus, st,
&adxl367_spi_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl367_probe(&spi->dev, &adxl367_spi_ops, st, regmap, spi->irq);
}
static const struct spi_device_id adxl367_spi_id[] = {
{ "adxl367", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl367_spi_id);
static const struct of_device_id adxl367_of_match[] = {
{ .compatible = "adi,adxl367" },
{ }
};
MODULE_DEVICE_TABLE(of, adxl367_of_match);
static struct spi_driver adxl367_spi_driver = {
.driver = {
.name = "adxl367_spi",
.of_match_table = adxl367_of_match,
},
.probe = adxl367_spi_probe,
.id_table = adxl367_spi_id,
};
module_spi_driver(adxl367_spi_driver);
MODULE_IMPORT_NS("IIO_ADXL367");
MODULE_AUTHOR("Cosmin Tanislav <cosmin.tanislav@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL367 3-axis accelerometer SPI driver");
MODULE_LICENSE("GPL");
linux-7.2.3/drivers/iio/accel/adxl372.c
+1335
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/adxl372.h
+33
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@@ -0,0 +1,33 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* ADXL371/ADXL372 3-Axis Digital Accelerometer
*
* Copyright 2018 Analog Devices Inc.
*/
#ifndef _ADXL372_H_
#define _ADXL372_H_
#define ADXL372_REVID 0x03
struct adxl372_chip_info {
const char *name;
const int *samp_freq_tbl;
const int *bw_freq_tbl;
unsigned int num_freqs;
unsigned int act_time_scale_us;
unsigned int act_time_scale_low_us;
unsigned int inact_time_scale_ms;
unsigned int inact_time_scale_low_ms;
unsigned int max_odr;
bool fifo_supported;
};
extern const struct adxl372_chip_info adxl371_chip_info;
extern const struct adxl372_chip_info adxl372_chip_info;
int adxl372_probe(struct device *dev, struct regmap *regmap,
int irq, const struct adxl372_chip_info *chip_info);
bool adxl372_readable_noinc_reg(struct device *dev, unsigned int reg);
#endif /* _ADXL372_H_ */
linux-7.2.3/drivers/iio/accel/adxl372_i2c.c
+74
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@@ -0,0 +1,74 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL371/ADXL372 3-Axis Digital Accelerometer I2C driver
*
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl372.h"
static const struct regmap_config adxl372_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.readable_noinc_reg = adxl372_readable_noinc_reg,
};
static int adxl372_i2c_probe(struct i2c_client *client)
{
const struct adxl372_chip_info *chip_info;
struct regmap *regmap;
unsigned int regval;
int ret;
chip_info = i2c_get_match_data(client);
regmap = devm_regmap_init_i2c(client, &adxl372_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
ret = regmap_read(regmap, ADXL372_REVID, &regval);
if (ret < 0)
return ret;
/* Starting with the 3rd revision an I2C chip bug was fixed */
if (regval < 3)
dev_warn(&client->dev,
"I2C might not work properly with other devices on the bus");
return adxl372_probe(&client->dev, regmap, client->irq, chip_info);
}
static const struct i2c_device_id adxl372_i2c_id[] = {
{ .name = "adxl371", .driver_data = (kernel_ulong_t)&adxl371_chip_info },
{ .name = "adxl372", .driver_data = (kernel_ulong_t)&adxl372_chip_info },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id);
static const struct of_device_id adxl372_of_match[] = {
{ .compatible = "adi,adxl371", .data = &adxl371_chip_info },
{ .compatible = "adi,adxl372", .data = &adxl372_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl372_of_match);
static struct i2c_driver adxl372_i2c_driver = {
.driver = {
.name = "adxl372_i2c",
.of_match_table = adxl372_of_match,
},
.probe = adxl372_i2c_probe,
.id_table = adxl372_i2c_id,
};
module_i2c_driver(adxl372_i2c_driver);
MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>");
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL371/ADXL372 3-axis accelerometer I2C driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_ADXL372");
linux-7.2.3/drivers/iio/accel/adxl372_spi.c
+65
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@@ -0,0 +1,65 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL371/ADXL372 3-Axis Digital Accelerometer SPI driver
*
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "adxl372.h"
static const struct regmap_config adxl372_spi_regmap_config = {
.reg_bits = 7,
.pad_bits = 1,
.val_bits = 8,
.read_flag_mask = BIT(0),
.readable_noinc_reg = adxl372_readable_noinc_reg,
};
static int adxl372_spi_probe(struct spi_device *spi)
{
const struct adxl372_chip_info *chip_info;
struct regmap *regmap;
chip_info = spi_get_device_match_data(spi);
regmap = devm_regmap_init_spi(spi, &adxl372_spi_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl372_probe(&spi->dev, regmap, spi->irq, chip_info);
}
static const struct spi_device_id adxl372_spi_id[] = {
{ "adxl371", (kernel_ulong_t)&adxl371_chip_info },
{ "adxl372", (kernel_ulong_t)&adxl372_chip_info },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl372_spi_id);
static const struct of_device_id adxl372_of_match[] = {
{ .compatible = "adi,adxl371", .data = &adxl371_chip_info },
{ .compatible = "adi,adxl372", .data = &adxl372_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl372_of_match);
static struct spi_driver adxl372_spi_driver = {
.driver = {
.name = "adxl372_spi",
.of_match_table = adxl372_of_match,
},
.probe = adxl372_spi_probe,
.id_table = adxl372_spi_id,
};
module_spi_driver(adxl372_spi_driver);
MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>");
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL371/ADXL372 3-axis accelerometer SPI driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_ADXL372");
linux-7.2.3/drivers/iio/accel/adxl380.c
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linux-7.2.3/drivers/iio/accel/adxl380.h
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* ADXL380 3-Axis Digital Accelerometer
*
* Copyright 2024 Analog Devices Inc.
*/
#ifndef _ADXL380_H_
#define _ADXL380_H_
enum adxl380_odr {
ADXL380_ODR_VLP,
ADXL380_ODR_DSM,
ADXL380_ODR_DSM_2X,
ADXL380_ODR_DSM_4X,
ADXL380_ODR_MAX
};
struct adxl380_chip_info {
const char *name;
const int scale_tbl[3][2];
const int samp_freq_tbl[ADXL380_ODR_MAX];
const struct iio_info *info;
const int temp_offset;
const u16 chip_id;
const bool has_low_power;
};
extern const struct adxl380_chip_info adxl318_chip_info;
extern const struct adxl380_chip_info adxl319_chip_info;
extern const struct adxl380_chip_info adxl380_chip_info;
extern const struct adxl380_chip_info adxl382_chip_info;
int adxl380_probe(struct device *dev, struct regmap *regmap,
const struct adxl380_chip_info *chip_info);
bool adxl380_readable_noinc_reg(struct device *dev, unsigned int reg);
#endif /* _ADXL380_H_ */
linux-7.2.3/drivers/iio/accel/adxl380_i2c.c
+67
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// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL380 3-Axis Digital Accelerometer I2C driver
*
* Copyright 2024 Analog Devices Inc.
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "adxl380.h"
static const struct regmap_config adxl380_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.readable_noinc_reg = adxl380_readable_noinc_reg,
};
static int adxl380_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
const struct adxl380_chip_info *chip_data;
chip_data = i2c_get_match_data(client);
regmap = devm_regmap_init_i2c(client, &adxl380_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl380_probe(&client->dev, regmap, chip_data);
}
static const struct i2c_device_id adxl380_i2c_id[] = {
{ .name = "adxl318", .driver_data = (kernel_ulong_t)&adxl318_chip_info },
{ .name = "adxl319", .driver_data = (kernel_ulong_t)&adxl319_chip_info },
{ .name = "adxl380", .driver_data = (kernel_ulong_t)&adxl380_chip_info },
{ .name = "adxl382", .driver_data = (kernel_ulong_t)&adxl382_chip_info },
{ }
};
MODULE_DEVICE_TABLE(i2c, adxl380_i2c_id);
static const struct of_device_id adxl380_of_match[] = {
{ .compatible = "adi,adxl318", .data = &adxl318_chip_info },
{ .compatible = "adi,adxl319", .data = &adxl319_chip_info },
{ .compatible = "adi,adxl380", .data = &adxl380_chip_info },
{ .compatible = "adi,adxl382", .data = &adxl382_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl380_of_match);
static struct i2c_driver adxl380_i2c_driver = {
.driver = {
.name = "adxl380_i2c",
.of_match_table = adxl380_of_match,
},
.probe = adxl380_i2c_probe,
.id_table = adxl380_i2c_id,
};
module_i2c_driver(adxl380_i2c_driver);
MODULE_AUTHOR("Ramona Gradinariu <ramona.gradinariu@analog.com>");
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL380 3-axis accelerometer I2C driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_ADXL380");
linux-7.2.3/drivers/iio/accel/adxl380_spi.c
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// SPDX-License-Identifier: GPL-2.0+
/*
* ADXL380 3-Axis Digital Accelerometer SPI driver
*
* Copyright 2024 Analog Devices Inc.
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "adxl380.h"
static const struct regmap_config adxl380_spi_regmap_config = {
.reg_bits = 7,
.pad_bits = 1,
.val_bits = 8,
.read_flag_mask = BIT(0),
.readable_noinc_reg = adxl380_readable_noinc_reg,
};
static int adxl380_spi_probe(struct spi_device *spi)
{
const struct adxl380_chip_info *chip_data;
struct regmap *regmap;
chip_data = spi_get_device_match_data(spi);
regmap = devm_regmap_init_spi(spi, &adxl380_spi_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return adxl380_probe(&spi->dev, regmap, chip_data);
}
static const struct spi_device_id adxl380_spi_id[] = {
{ "adxl318", (kernel_ulong_t)&adxl318_chip_info },
{ "adxl319", (kernel_ulong_t)&adxl319_chip_info },
{ "adxl380", (kernel_ulong_t)&adxl380_chip_info },
{ "adxl382", (kernel_ulong_t)&adxl382_chip_info },
{ }
};
MODULE_DEVICE_TABLE(spi, adxl380_spi_id);
static const struct of_device_id adxl380_of_match[] = {
{ .compatible = "adi,adxl318", .data = &adxl318_chip_info },
{ .compatible = "adi,adxl319", .data = &adxl319_chip_info },
{ .compatible = "adi,adxl380", .data = &adxl380_chip_info },
{ .compatible = "adi,adxl382", .data = &adxl382_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, adxl380_of_match);
static struct spi_driver adxl380_spi_driver = {
.driver = {
.name = "adxl380_spi",
.of_match_table = adxl380_of_match,
},
.probe = adxl380_spi_probe,
.id_table = adxl380_spi_id,
};
module_spi_driver(adxl380_spi_driver);
MODULE_AUTHOR("Ramona Gradinariu <ramona.gradinariu@analog.com>");
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
MODULE_DESCRIPTION("Analog Devices ADXL380 3-axis accelerometer SPI driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_ADXL380");
linux-7.2.3/drivers/iio/accel/bma180.c
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linux-7.2.3/drivers/iio/accel/bma220.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Forward declarations needed by the bma220 sources.
*
* Copyright 2025 Petre Rodan <petre.rodan@subdimension.ro>
*/
#ifndef _BMA220_H
#define _BMA220_H
#include <linux/pm.h>
#include <linux/regmap.h>
#define BMA220_REG_WDT 0x17
#define BMA220_WDT_MASK GENMASK(2, 1)
#define BMA220_WDT_OFF 0x0
#define BMA220_WDT_1MS 0x2
#define BMA220_WDT_10MS 0x3
struct device;
extern const struct regmap_config bma220_i2c_regmap_config;
extern const struct regmap_config bma220_spi_regmap_config;
extern const struct dev_pm_ops bma220_pm_ops;
int bma220_common_probe(struct device *dev, struct regmap *regmap, int irq);
#endif
linux-7.2.3/drivers/iio/accel/bma220_core.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* BMA220 Digital triaxial acceleration sensor driver
*
* Copyright (c) 2016,2020 Intel Corporation.
* Copyright (c) 2025 Petre Rodan <petre.rodan@subdimension.ro>
*/
#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/types.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include "bma220.h"
#define BMA220_REG_ID 0x00
#define BMA220_REG_REVISION_ID 0x01
#define BMA220_REG_ACCEL_X 0x02
#define BMA220_REG_ACCEL_Y 0x03
#define BMA220_REG_ACCEL_Z 0x04
#define BMA220_REG_CONF0 0x05
#define BMA220_HIGH_DUR_MSK GENMASK(5, 0)
#define BMA220_HIGH_HY_MSK GENMASK(7, 6)
#define BMA220_REG_CONF1 0x06
#define BMA220_HIGH_TH_MSK GENMASK(3, 0)
#define BMA220_LOW_TH_MSK GENMASK(7, 4)
#define BMA220_REG_CONF2 0x07
#define BMA220_LOW_DUR_MSK GENMASK(5, 0)
#define BMA220_LOW_HY_MSK GENMASK(7, 6)
#define BMA220_REG_CONF3 0x08
#define BMA220_TT_DUR_MSK GENMASK(2, 0)
#define BMA220_TT_TH_MSK GENMASK(6, 3)
#define BMA220_REG_CONF4 0x09
#define BMA220_SLOPE_DUR_MSK GENMASK(1, 0)
#define BMA220_SLOPE_TH_MSK GENMASK(5, 2)
#define BMA220_REG_CONF5 0x0a
#define BMA220_TIP_EN_MSK BIT(4)
#define BMA220_REG_IF0 0x0b
#define BMA220_REG_IF1 0x0c
#define BMA220_IF_SLOPE BIT(0)
#define BMA220_IF_DRDY BIT(1)
#define BMA220_IF_HIGH BIT(2)
#define BMA220_IF_LOW BIT(3)
#define BMA220_IF_TT BIT(4)
#define BMA220_REG_IE0 0x0d
#define BMA220_INT_EN_TAP_Z_MSK BIT(0)
#define BMA220_INT_EN_TAP_Y_MSK BIT(1)
#define BMA220_INT_EN_TAP_X_MSK BIT(2)
#define BMA220_INT_EN_SLOPE_Z_MSK BIT(3)
#define BMA220_INT_EN_SLOPE_Y_MSK BIT(4)
#define BMA220_INT_EN_SLOPE_X_MSK BIT(5)
#define BMA220_INT_EN_DRDY_MSK BIT(7)
#define BMA220_REG_IE1 0x0e
#define BMA220_INT_EN_HIGH_Z_MSK BIT(0)
#define BMA220_INT_EN_HIGH_Y_MSK BIT(1)
#define BMA220_INT_EN_HIGH_X_MSK BIT(2)
#define BMA220_INT_EN_LOW_MSK BIT(3)
#define BMA220_INT_LATCH_MSK GENMASK(6, 4)
#define BMA220_INT_RST_MSK BIT(7)
#define BMA220_REG_IE2 0x0f
#define BMA220_REG_FILTER 0x10
#define BMA220_FILTER_MASK GENMASK(3, 0)
#define BMA220_REG_RANGE 0x11
#define BMA220_RANGE_MASK GENMASK(1, 0)
#define BMA220_REG_SUSPEND 0x18
#define BMA220_REG_SOFTRESET 0x19
#define BMA220_CHIP_ID 0xDD
#define BMA220_SUSPEND_SLEEP 0xFF
#define BMA220_SUSPEND_WAKE 0x00
#define BMA220_RESET_MODE 0xFF
#define BMA220_NONRESET_MODE 0x00
#define BMA220_DEVICE_NAME "bma220"
#define BMA220_COF_1000Hz 0x0
#define BMA220_COF_500Hz 0x1
#define BMA220_COF_250Hz 0x2
#define BMA220_COF_125Hz 0x3
#define BMA220_COF_64Hz 0x4
#define BMA220_COF_32Hz 0x5
#define BMA220_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |\
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 6, \
.storagebits = 8, \
.shift = 2, \
.endianness = IIO_CPU, \
}, \
}
enum bma220_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
static const int bma220_scale_table[][2] = {
{ 0, 623000 }, { 1, 248000 }, { 2, 491000 }, { 4, 983000 },
};
struct bma220_data {
struct regmap *regmap;
struct mutex lock;
u8 lpf_3dB_freq_idx;
u8 range_idx;
struct iio_trigger *trig;
struct {
s8 chans[3];
/* Ensure timestamp is naturally aligned. */
aligned_s64 timestamp;
} scan __aligned(IIO_DMA_MINALIGN);
};
static const struct iio_chan_spec bma220_channels[] = {
BMA220_ACCEL_CHANNEL(0, BMA220_REG_ACCEL_X, X),
BMA220_ACCEL_CHANNEL(1, BMA220_REG_ACCEL_Y, Y),
BMA220_ACCEL_CHANNEL(2, BMA220_REG_ACCEL_Z, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
/* Available cut-off frequencies of the low pass filter in Hz. */
static const int bma220_lpf_3dB_freq_Hz_table[] = {
[BMA220_COF_1000Hz] = 1000,
[BMA220_COF_500Hz] = 500,
[BMA220_COF_250Hz] = 250,
[BMA220_COF_125Hz] = 125,
[BMA220_COF_64Hz] = 64,
[BMA220_COF_32Hz] = 32,
};
static const unsigned long bma220_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
static bool bma220_is_writable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case BMA220_REG_CONF0:
case BMA220_REG_CONF1:
case BMA220_REG_CONF2:
case BMA220_REG_CONF3:
case BMA220_REG_CONF4:
case BMA220_REG_CONF5:
case BMA220_REG_IE0:
case BMA220_REG_IE1:
case BMA220_REG_IE2:
case BMA220_REG_FILTER:
case BMA220_REG_RANGE:
case BMA220_REG_WDT:
return true;
default:
return false;
}
}
const struct regmap_config bma220_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.read_flag_mask = BIT(7),
.max_register = BMA220_REG_SOFTRESET,
.cache_type = REGCACHE_NONE,
.writeable_reg = bma220_is_writable_reg,
};
EXPORT_SYMBOL_NS_GPL(bma220_spi_regmap_config, "IIO_BOSCH_BMA220");
/*
* Based on the datasheet the memory map differs between the SPI and the I2C
* implementations. I2C register addresses are simply shifted to the left
* by 1 bit yet the register size remains unchanged.
* This driver employs the SPI memory map to correlate register names to
* addresses regardless of the bus type.
*/
const struct regmap_config bma220_i2c_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.reg_shift = -1,
.max_register = BMA220_REG_SOFTRESET,
.cache_type = REGCACHE_NONE,
.writeable_reg = bma220_is_writable_reg,
};
EXPORT_SYMBOL_NS_GPL(bma220_i2c_regmap_config, "IIO_BOSCH_BMA220");
static int bma220_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct bma220_data *data = iio_priv(indio_dev);
return regmap_update_bits(data->regmap, BMA220_REG_IE0,
BMA220_INT_EN_DRDY_MSK,
FIELD_PREP(BMA220_INT_EN_DRDY_MSK, state));
}
static const struct iio_trigger_ops bma220_trigger_ops = {
.set_trigger_state = &bma220_data_rdy_trigger_set_state,
.validate_device = &iio_trigger_validate_own_device,
};
static irqreturn_t bma220_trigger_handler(int irq, void *p)
{
int ret;
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct bma220_data *data = iio_priv(indio_dev);
ret = regmap_bulk_read(data->regmap, BMA220_REG_ACCEL_X,
&data->scan.chans,
sizeof(data->scan.chans));
if (ret < 0)
return IRQ_NONE;
iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
iio_get_time_ns(indio_dev));
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int bma220_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret;
u8 index;
unsigned int reg;
struct bma220_data *data = iio_priv(indio_dev);
guard(mutex)(&data->lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_read(data->regmap, chan->address, &reg);
if (ret < 0)
return -EINVAL;
*val = sign_extend32(reg >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
index = data->range_idx;
*val = bma220_scale_table[index][0];
*val2 = bma220_scale_table[index][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
index = data->lpf_3dB_freq_idx;
*val = bma220_lpf_3dB_freq_Hz_table[index];
return IIO_VAL_INT;
}
return -EINVAL;
}
static int bma220_find_match_2dt(const int (*tbl)[2], const int n,
const int val, const int val2)
{
int i;
for (i = 0; i < n; i++) {
if (tbl[i][0] == val && tbl[i][1] == val2)
return i;
}
return -EINVAL;
}
static int bma220_find_match(const int *arr, const int n, const int val)
{
int i;
for (i = 0; i < n; i++) {
if (arr[i] == val)
return i;
}
return -EINVAL;
}
static int bma220_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int ret;
int index = -1;
struct bma220_data *data = iio_priv(indio_dev);
guard(mutex)(&data->lock);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
index = bma220_find_match_2dt(bma220_scale_table,
ARRAY_SIZE(bma220_scale_table),
val, val2);
if (index < 0)
return -EINVAL;
ret = regmap_update_bits(data->regmap, BMA220_REG_RANGE,
BMA220_RANGE_MASK,
FIELD_PREP(BMA220_RANGE_MASK, index));
if (ret < 0)
return ret;
data->range_idx = index;
return 0;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
index = bma220_find_match(bma220_lpf_3dB_freq_Hz_table,
ARRAY_SIZE(bma220_lpf_3dB_freq_Hz_table),
val);
if (index < 0)
return -EINVAL;
ret = regmap_update_bits(data->regmap, BMA220_REG_FILTER,
BMA220_FILTER_MASK,
FIELD_PREP(BMA220_FILTER_MASK, index));
if (ret < 0)
return ret;
data->lpf_3dB_freq_idx = index;
return 0;
}
return -EINVAL;
}
static int bma220_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = (int *)bma220_scale_table;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = ARRAY_SIZE(bma220_scale_table) * 2;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)bma220_lpf_3dB_freq_Hz_table;
*type = IIO_VAL_INT;
*length = ARRAY_SIZE(bma220_lpf_3dB_freq_Hz_table);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int bma220_reg_access(struct iio_dev *indio_dev, unsigned int reg,
unsigned int writeval, unsigned int *readval)
{
struct bma220_data *data = iio_priv(indio_dev);
if (readval)
return regmap_read(data->regmap, reg, readval);
return regmap_write(data->regmap, reg, writeval);
}
static const struct iio_info bma220_info = {
.read_raw = bma220_read_raw,
.write_raw = bma220_write_raw,
.read_avail = bma220_read_avail,
.debugfs_reg_access = &bma220_reg_access,
};
static int bma220_reset(struct bma220_data *data, bool up)
{
int ret;
unsigned int i, val;
/*
* The chip can be reset by a simple register read.
* We need up to 2 register reads of the softreset register
* to make sure that the device is in the desired state.
*/
for (i = 0; i < 2; i++) {
ret = regmap_read(data->regmap, BMA220_REG_SOFTRESET, &val);
if (ret < 0)
return ret;
if (up && val == BMA220_RESET_MODE)
return 0;
if (!up && val == BMA220_NONRESET_MODE)
return 0;
}
return -EBUSY;
}
static int bma220_power(struct bma220_data *data, bool up)
{
int ret;
unsigned int i, val;
/*
* The chip can be suspended/woken up by a simple register read.
* So, we need up to 2 register reads of the suspend register
* to make sure that the device is in the desired state.
*/
for (i = 0; i < 2; i++) {
ret = regmap_read(data->regmap, BMA220_REG_SUSPEND, &val);
if (ret < 0)
return ret;
if (up && val == BMA220_SUSPEND_SLEEP)
return 0;
if (!up && val == BMA220_SUSPEND_WAKE)
return 0;
}
return -EBUSY;
}
static int bma220_init(struct device *dev, struct bma220_data *data)
{
int ret;
unsigned int val;
static const char * const regulator_names[] = { "vddd", "vddio", "vdda" };
ret = devm_regulator_bulk_get_enable(dev,
ARRAY_SIZE(regulator_names),
regulator_names);
if (ret)
return dev_err_probe(dev, ret, "Failed to get regulators\n");
ret = regmap_read(data->regmap, BMA220_REG_ID, &val);
if (ret)
return dev_err_probe(dev, ret,
"Failed to read chip id register\n");
if (val != BMA220_CHIP_ID)
dev_info(dev, "Unknown chip found: 0x%02x\n", val);
ret = bma220_power(data, true);
if (ret)
return dev_err_probe(dev, ret, "Failed to power-on chip\n");
ret = bma220_reset(data, true);
if (ret)
return dev_err_probe(dev, ret, "Failed to soft reset chip\n");
return 0;
}
static void bma220_deinit(void *data_ptr)
{
struct bma220_data *data = data_ptr;
int ret;
struct device *dev = regmap_get_device(data->regmap);
ret = bma220_power(data, false);
if (ret)
dev_warn(dev,
"Failed to put device into suspend mode (%pe)\n",
ERR_PTR(ret));
}
static irqreturn_t bma220_irq_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bma220_data *data = iio_priv(indio_dev);
int ret;
unsigned int bma220_reg_if1;
ret = regmap_read(data->regmap, BMA220_REG_IF1, &bma220_reg_if1);
if (ret)
return IRQ_NONE;
if (FIELD_GET(BMA220_IF_DRDY, bma220_reg_if1))
iio_trigger_poll_nested(data->trig);
return IRQ_HANDLED;
}
int bma220_common_probe(struct device *dev, struct regmap *regmap, int irq)
{
int ret;
struct iio_dev *indio_dev;
struct bma220_data *data;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->regmap = regmap;
ret = bma220_init(dev, data);
if (ret)
return ret;
ret = devm_mutex_init(dev, &data->lock);
if (ret)
return ret;
indio_dev->info = &bma220_info;
indio_dev->name = BMA220_DEVICE_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = bma220_channels;
indio_dev->num_channels = ARRAY_SIZE(bma220_channels);
indio_dev->available_scan_masks = bma220_accel_scan_masks;
if (irq > 0) {
data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->trig)
return -ENOMEM;
data->trig->ops = &bma220_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
ret = devm_iio_trigger_register(dev, data->trig);
if (ret)
return dev_err_probe(dev, ret,
"iio trigger register fail\n");
indio_dev->trig = iio_trigger_get(data->trig);
ret = devm_request_threaded_irq(dev, irq, NULL,
&bma220_irq_handler, IRQF_ONESHOT,
indio_dev->name, indio_dev);
if (ret)
return dev_err_probe(dev, ret,
"request irq %d failed\n", irq);
}
ret = devm_add_action_or_reset(dev, bma220_deinit, data);
if (ret)
return ret;
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
bma220_trigger_handler, NULL);
if (ret < 0)
dev_err_probe(dev, ret, "iio triggered buffer setup failed\n");
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(bma220_common_probe, "IIO_BOSCH_BMA220");
static int bma220_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bma220_data *data = iio_priv(indio_dev);
return bma220_power(data, false);
}
static int bma220_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bma220_data *data = iio_priv(indio_dev);
return bma220_power(data, true);
}
EXPORT_NS_SIMPLE_DEV_PM_OPS(bma220_pm_ops, bma220_suspend, bma220_resume,
IIO_BOSCH_BMA220);
MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
MODULE_DESCRIPTION("BMA220 acceleration sensor driver");
MODULE_LICENSE("GPL");
linux-7.2.3/drivers/iio/accel/bma220_i2c.c
+68
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Bosch triaxial acceleration sensor
*
* Copyright (c) 2025 Petre Rodan <petre.rodan@subdimension.ro>
*
* Datasheet: https://media.digikey.com/pdf/Data%20Sheets/Bosch/BMA220.pdf
* I2C address is either 0x0b or 0x0a depending on CSB (pin 10)
*/
#include <linux/bitfield.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include "bma220.h"
static int bma220_set_wdt(struct regmap *regmap, const u8 val)
{
return regmap_update_bits(regmap, BMA220_REG_WDT, BMA220_WDT_MASK,
FIELD_PREP(BMA220_WDT_MASK, val));
}
static int bma220_i2c_probe(struct i2c_client *client)
{
struct regmap *regmap;
int ret;
regmap = devm_regmap_init_i2c(client, &bma220_i2c_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&client->dev, PTR_ERR(regmap),
"failed to create regmap\n");
ret = bma220_common_probe(&client->dev, regmap, client->irq);
if (ret)
return ret;
return bma220_set_wdt(regmap, BMA220_WDT_1MS);
}
static const struct of_device_id bma220_i2c_match[] = {
{ .compatible = "bosch,bma220" },
{ }
};
MODULE_DEVICE_TABLE(of, bma220_i2c_match);
static const struct i2c_device_id bma220_i2c_id[] = {
{ .name = "bma220" },
{ }
};
MODULE_DEVICE_TABLE(i2c, bma220_i2c_id);
static struct i2c_driver bma220_i2c_driver = {
.driver = {
.name = "bma220_i2c",
.pm = pm_sleep_ptr(&bma220_pm_ops),
.of_match_table = bma220_i2c_match,
},
.probe = bma220_i2c_probe,
.id_table = bma220_i2c_id,
};
module_i2c_driver(bma220_i2c_driver);
MODULE_AUTHOR("Petre Rodan <petre.rodan@subdimension.ro>");
MODULE_DESCRIPTION("Bosch triaxial acceleration sensor i2c driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_BOSCH_BMA220");
linux-7.2.3/drivers/iio/accel/bma220_spi.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* BMA220 Digital triaxial acceleration sensor driver
*
* Copyright (c) 2016,2020 Intel Corporation.
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include <linux/spi/spi.h>
#include "bma220.h"
static int bma220_spi_probe(struct spi_device *spi)
{
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &bma220_spi_regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(&spi->dev, PTR_ERR(regmap),
"failed to create regmap\n");
return bma220_common_probe(&spi->dev, regmap, spi->irq);
}
static const struct spi_device_id bma220_spi_id[] = {
{ "bma220", 0 },
{ }
};
static const struct acpi_device_id bma220_acpi_id[] = {
{ "BMA0220", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, bma220_spi_id);
static const struct of_device_id bma220_of_spi_match[] = {
{ .compatible = "bosch,bma220" },
{ }
};
MODULE_DEVICE_TABLE(of, bma220_of_spi_match);
static struct spi_driver bma220_spi_driver = {
.driver = {
.name = "bma220_spi",
.pm = pm_sleep_ptr(&bma220_pm_ops),
.of_match_table = bma220_of_spi_match,
.acpi_match_table = bma220_acpi_id,
},
.probe = bma220_spi_probe,
.id_table = bma220_spi_id,
};
module_spi_driver(bma220_spi_driver);
MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
MODULE_DESCRIPTION("BMA220 triaxial acceleration sensor spi driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_BOSCH_BMA220");
linux-7.2.3/drivers/iio/accel/bma400.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Register constants and other forward declarations needed by the bma400
* sources.
*
* Copyright 2019 Dan Robertson <dan@dlrobertson.com>
*/
#ifndef _BMA400_H_
#define _BMA400_H_
#include <linux/bits.h>
#include <linux/regmap.h>
/*
* Read-Only Registers
*/
/* Chip ID of BMA 400 devices found in the chip ID register. */
#define BMA400_ID_REG_VAL 0x90
/* Status and ID registers */
#define BMA400_CHIP_ID_REG 0x00
#define BMA400_ERR_REG 0x02
#define BMA400_STATUS_REG 0x03
/* Acceleration registers */
#define BMA400_ACC_X_LSB_REG 0x04
#define BMA400_ACC_X_MSB_REG 0x05
#define BMA400_ACC_Y_LSB_REG 0x06
#define BMA400_ACC_Y_MSB_REG 0x07
#define BMA400_ACC_Z_LSB_REG 0x08
#define BMA400_ACC_Z_MSB_REG 0x09
/* Sensor time registers */
#define BMA400_SENSOR_TIME0_REG 0x0a
#define BMA400_SENSOR_TIME1_REG 0x0b
#define BMA400_SENSOR_TIME2_REG 0x0c
/* Event and interrupt registers */
#define BMA400_EVENT_REG 0x0d
#define BMA400_INT_STAT0_REG 0x0e
#define BMA400_INT_STAT0_GEN1_MASK BIT(2)
#define BMA400_INT_STAT0_GEN2_MASK BIT(3)
#define BMA400_INT_STAT0_DRDY_MASK BIT(7)
#define BMA400_INT_STAT1_REG 0x0f
#define BMA400_INT_STAT1_STEP_INT_MASK GENMASK(9, 8)
#define BMA400_INT_STAT1_S_TAP_MASK BIT(10)
#define BMA400_INT_STAT1_D_TAP_MASK BIT(11)
#define BMA400_INT_STAT2_REG 0x10
/* Bit present in all INT_STAT registers */
#define BMA400_INT_STAT_ENG_OVRRUN_MASK BIT(4)
/* Temperature register */
#define BMA400_TEMP_DATA_REG 0x11
/* FIFO length and data registers */
#define BMA400_FIFO_LENGTH0_REG 0x12
#define BMA400_FIFO_LENGTH1_REG 0x13
#define BMA400_FIFO_DATA_REG 0x14
/* Step count registers */
#define BMA400_STEP_CNT0_REG 0x15
#define BMA400_STEP_CNT1_REG 0x16
#define BMA400_STEP_CNT3_REG 0x17
#define BMA400_STEP_STAT_REG 0x18
#define BMA400_STEP_RAW_LEN 0x03
/*
* Read-write configuration registers
*/
#define BMA400_ACC_CONFIG0_REG 0x19
#define BMA400_ACC_CONFIG0_LP_OSR_MASK GENMASK(6, 5)
#define BMA400_ACC_CONFIG1_REG 0x1a
#define BMA400_ACC_CONFIG1_ODR_MASK GENMASK(3, 0)
#define BMA400_ACC_CONFIG1_ODR_MIN_RAW 0x05
#define BMA400_ACC_CONFIG1_ODR_LP_RAW 0x06
#define BMA400_ACC_CONFIG1_ODR_MAX_RAW 0x0b
#define BMA400_ACC_CONFIG1_ODR_MAX_HZ 800
#define BMA400_ACC_CONFIG1_ODR_MIN_WHOLE_HZ 25
#define BMA400_ACC_CONFIG1_ODR_MIN_HZ 12
#define BMA400_ACC_CONFIG1_NP_OSR_MASK GENMASK(5, 4)
#define BMA400_ACC_CONFIG1_ACC_RANGE_MASK GENMASK(7, 6)
#define BMA400_ACC_CONFIG2_REG 0x1b
/* Interrupt registers */
#define BMA400_INT_CONFIG0_REG 0x1f
#define BMA400_INT_CONFIG0_GEN1_MASK BIT(2)
#define BMA400_INT_CONFIG0_GEN2_MASK BIT(3)
#define BMA400_INT_CONFIG0_DRDY_MASK BIT(7)
enum bma400_generic_intr {
BMA400_GEN1_INTR = 0x1,
BMA400_GEN2_INTR = 0x2,
};
#define BMA400_INT_CONFIG1_REG 0x20
#define BMA400_INT_CONFIG1_STEP_INT_MASK BIT(0)
#define BMA400_INT_CONFIG1_S_TAP_MASK BIT(2)
#define BMA400_INT_CONFIG1_D_TAP_MASK BIT(3)
#define BMA400_INT1_MAP_REG 0x21
#define BMA400_INT12_MAP_REG 0x23
#define BMA400_INT_IO_CTRL_REG 0x24
#define BMA400_TWO_BITS_MASK GENMASK(1, 0)
/* Generic interrupts register */
#define BMA400_GENINT_CONFIG_REG_BASE 0x3f
#define BMA400_NUM_GENINT_CONFIG_REGS 11
#define BMA400_GENINT_CONFIG_REG(gen_intr, config_idx) \
(BMA400_GENINT_CONFIG_REG_BASE + \
(gen_intr - 1) * BMA400_NUM_GENINT_CONFIG_REGS + \
(config_idx))
#define BMA400_GENINT_CONFIG0_HYST_MASK GENMASK(1, 0)
#define BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK GENMASK(3, 2)
#define BMA400_GENINT_CONFIG0_DATA_SRC_MASK BIT(4)
#define BMA400_GENINT_CONFIG0_X_EN_MASK BIT(5)
#define BMA400_GENINT_CONFIG0_Y_EN_MASK BIT(6)
#define BMA400_GENINT_CONFIG0_Z_EN_MASK BIT(7)
enum bma400_accel_data_src {
ACCEL_FILT1 = 0x0,
ACCEL_FILT2 = 0x1,
};
enum bma400_ref_updt_mode {
BMA400_REF_MANUAL_UPDT_MODE = 0x0,
BMA400_REF_ONETIME_UPDT_MODE = 0x1,
BMA400_REF_EVERYTIME_UPDT_MODE = 0x2,
BMA400_REF_EVERYTIME_LP_UPDT_MODE = 0x3,
};
#define BMA400_GEN_CONFIG1_OFF 0x01
#define BMA400_GENINT_CONFIG1_AXES_COMB_MASK BIT(0)
#define BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK BIT(1)
enum bma400_genintr_acceleval_axescomb {
BMA400_EVAL_X_OR_Y_OR_Z = 0x0,
BMA400_EVAL_X_AND_Y_AND_Z = 0x1,
};
enum bma400_detect_criterion {
BMA400_DETECT_INACTIVITY = 0x0,
BMA400_DETECT_ACTIVITY = 0x1,
};
/* TAP config registers */
#define BMA400_TAP_CONFIG_REG 0x57
#define BMA400_TAP_CONFIG_SEN_MASK GENMASK(2, 0)
#define BMA400_TAP_CONFIG1_REG 0x58
#define BMA400_TAP_CONFIG1_TICSTH_MASK GENMASK(1, 0)
#define BMA400_TAP_CONFIG1_QUIET_MASK GENMASK(3, 2)
#define BMA400_TAP_CONFIG1_QUIETDT_MASK GENMASK(5, 4)
#define BMA400_TAP_TIM_LIST_LEN 4
#define BMA400_CMD_REG 0x7e
/*
* BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
* converting to micro values for +-2g range.
*
* For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
* For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2
* For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2
*
* The raw value which is used to select the different ranges is determined
* by the first bit set position from the scale value, so BMA400_SCALE_MIN
* should be odd.
*
* Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales
* array by left shifting BMA400_SCALE_MIN.
* e.g.:
* To select +-2g = 9577 << 0 = raw value to write is 0.
* To select +-8g = 9577 << 2 = raw value to write is 2.
* To select +-16g = 9577 << 3 = raw value to write is 3.
*/
#define BMA400_ACC_SCALE_MIN 9577
#define BMA400_ACC_SCALE_MAX 76617
extern const struct regmap_config bma400_regmap_config;
int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name);
#endif
linux-7.2.3/drivers/iio/accel/bma400_core.c
+1809
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linux-7.2.3/drivers/iio/accel/bma400_i2c.c
+55
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@@ -0,0 +1,55 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* I2C IIO driver for Bosch BMA400 triaxial acceleration sensor.
*
* Copyright 2019 Dan Robertson <dan@dlrobertson.com>
*
* I2C address is either 0x14 or 0x15 depending on SDO
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "bma400.h"
static int bma400_i2c_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &bma400_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to create regmap\n");
return PTR_ERR(regmap);
}
return bma400_probe(&client->dev, regmap, client->irq, id->name);
}
static const struct i2c_device_id bma400_i2c_ids[] = {
{ .name = "bma400" },
{ }
};
MODULE_DEVICE_TABLE(i2c, bma400_i2c_ids);
static const struct of_device_id bma400_of_i2c_match[] = {
{ .compatible = "bosch,bma400" },
{ }
};
MODULE_DEVICE_TABLE(of, bma400_of_i2c_match);
static struct i2c_driver bma400_i2c_driver = {
.driver = {
.name = "bma400",
.of_match_table = bma400_of_i2c_match,
},
.probe = bma400_i2c_probe,
.id_table = bma400_i2c_ids,
};
module_i2c_driver(bma400_i2c_driver);
MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>");
MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor (I2C)");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_BMA400");
linux-7.2.3/drivers/iio/accel/bma400_spi.c
+114
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// SPDX-License-Identifier: GPL-2.0-only
/*
* SPI IIO driver for Bosch BMA400 triaxial acceleration sensor.
*
* Copyright 2020 Dan Robertson <dan@dlrobertson.com>
*
*/
#include <linux/bits.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "bma400.h"
#define BMA400_MAX_SPI_READ 2
#define BMA400_SPI_READ_BUFFER_SIZE (BMA400_MAX_SPI_READ + 1)
static int bma400_regmap_spi_read(void *context,
const void *reg, size_t reg_size,
void *val, size_t val_size)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
u8 result[BMA400_SPI_READ_BUFFER_SIZE];
ssize_t status;
if (val_size > BMA400_MAX_SPI_READ)
return -EINVAL;
status = spi_write_then_read(spi, reg, 1, result, val_size + 1);
if (status)
return status;
/*
* From the BMA400 datasheet:
*
* > For a basic read operation two bytes have to be read and the first
* > has to be dropped and the second byte must be interpreted.
*/
memcpy(val, result + 1, val_size);
return 0;
}
static int bma400_regmap_spi_write(void *context, const void *data,
size_t count)
{
struct device *dev = context;
struct spi_device *spi = to_spi_device(dev);
return spi_write(spi, data, count);
}
static const struct regmap_bus bma400_regmap_bus = {
.read = bma400_regmap_spi_read,
.write = bma400_regmap_spi_write,
.read_flag_mask = BIT(7),
.max_raw_read = BMA400_MAX_SPI_READ,
};
static int bma400_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
unsigned int val;
int ret;
regmap = devm_regmap_init(&spi->dev, &bma400_regmap_bus,
&spi->dev, &bma400_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "failed to create regmap\n");
return PTR_ERR(regmap);
}
/*
* Per the bma400 datasheet, the first SPI read may
* return garbage. As the datasheet recommends, the
* chip ID register will be read here and checked
* again in the following probe.
*/
ret = regmap_read(regmap, BMA400_CHIP_ID_REG, &val);
if (ret)
dev_err(&spi->dev, "Failed to read chip id register\n");
return bma400_probe(&spi->dev, regmap, spi->irq, id->name);
}
static const struct spi_device_id bma400_spi_ids[] = {
{ "bma400", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, bma400_spi_ids);
static const struct of_device_id bma400_of_spi_match[] = {
{ .compatible = "bosch,bma400" },
{ }
};
MODULE_DEVICE_TABLE(of, bma400_of_spi_match);
static struct spi_driver bma400_spi_driver = {
.driver = {
.name = "bma400",
.of_match_table = bma400_of_spi_match,
},
.probe = bma400_spi_probe,
.id_table = bma400_spi_ids,
};
module_spi_driver(bma400_spi_driver);
MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>");
MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor (SPI)");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_BMA400");
linux-7.2.3/drivers/iio/accel/bmc150-accel-core.c
+1866
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linux-7.2.3/drivers/iio/accel/bmc150-accel-i2c.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis accelerometer driver supporting many I2C Bosch-Sensortec chips
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/regmap.h>
#include "bmc150-accel.h"
#ifdef CONFIG_ACPI
static const struct acpi_device_id bmc150_acpi_dual_accel_ids[] = {
{"BOSC0200"},
{"DUAL250E"},
{ }
};
/*
* The DUAL250E ACPI device for 360° hinges type 2-in-1s with 1 accelerometer
* in the display and 1 in the hinge has an ACPI-method (DSM) to tell the
* ACPI code about the angle between the 2 halves. This will make the ACPI
* code enable/disable the keyboard and touchpad. We need to call this to avoid
* the keyboard being disabled when the 2-in-1 is turned-on or resumed while
* fully folded into tablet mode (which gets detected with a HALL-sensor).
* If we don't call this then the keyboard won't work even when the 2-in-1 is
* changed to be used in laptop mode after the power-on / resume.
*
* This DSM takes 2 angles, selected by setting aux0 to 0 or 1, these presumably
* define the angle between the gravity vector measured by the accelerometer in
* the display (aux0=0) resp. the base (aux0=1) and some reference vector.
* The 2 angles get subtracted from each other so the reference vector does
* not matter and we can simply leave the second angle at 0.
*/
#define BMC150_DSM_GUID "7681541e-8827-4239-8d9d-36be7fe12542"
#define DUAL250E_SET_ANGLE_FN_INDEX 3
struct dual250e_set_angle_args {
u32 aux0;
u32 ang0;
u32 rawx;
u32 rawy;
u32 rawz;
} __packed;
static bool bmc150_acpi_set_angle_dsm(struct i2c_client *client, u32 aux0, u32 ang0)
{
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
struct dual250e_set_angle_args args = {
.aux0 = aux0,
.ang0 = ang0,
};
union acpi_object args_obj, *obj;
guid_t guid;
if (!acpi_dev_hid_uid_match(adev, "DUAL250E", NULL))
return false;
guid_parse(BMC150_DSM_GUID, &guid);
if (!acpi_check_dsm(adev->handle, &guid, 0, BIT(DUAL250E_SET_ANGLE_FN_INDEX)))
return false;
/*
* Note this triggers the following warning:
* "ACPI Warning: \_SB.PCI0.I2C2.ACC1._DSM: Argument #4 type mismatch -
* Found [Buffer], ACPI requires [Package]"
* This is unavoidable since the _DSM implementation expects a "naked"
* buffer, so wrapping it in a package will _not_ work.
*/
args_obj.type = ACPI_TYPE_BUFFER;
args_obj.buffer.length = sizeof(args);
args_obj.buffer.pointer = (u8 *)&args;
obj = acpi_evaluate_dsm(adev->handle, &guid, 0, DUAL250E_SET_ANGLE_FN_INDEX, &args_obj);
if (!obj) {
dev_err(&client->dev, "Failed to call DSM to enable keyboard and touchpad\n");
return false;
}
ACPI_FREE(obj);
return true;
}
static bool bmc150_acpi_enable_keyboard(struct i2c_client *client)
{
/*
* The EC must see a change for it to re-enable the kbd, so first
* set the angle to 270° (tent/stand mode) and then change it to
* 90° (laptop mode).
*/
if (!bmc150_acpi_set_angle_dsm(client, 0, 270))
return false;
/* The EC needs some time to notice the angle being changed */
msleep(100);
return bmc150_acpi_set_angle_dsm(client, 0, 90);
}
static void bmc150_acpi_resume_work(struct work_struct *work)
{
struct bmc150_accel_data *data =
container_of(work, struct bmc150_accel_data, resume_work.work);
bmc150_acpi_enable_keyboard(data->second_device);
}
static void bmc150_acpi_resume_handler(struct device *dev)
{
struct bmc150_accel_data *data = iio_priv(dev_get_drvdata(dev));
/*
* Delay the bmc150_acpi_enable_keyboard() call till after the system
* resume has completed, otherwise it will not work.
*/
schedule_delayed_work(&data->resume_work, msecs_to_jiffies(1000));
}
/*
* Some acpi_devices describe 2 accelerometers in a single ACPI device,
* try instantiating a second i2c_client for an I2cSerialBusV2 ACPI resource
* with index 1.
*/
static void bmc150_acpi_dual_accel_probe(struct i2c_client *client)
{
struct bmc150_accel_data *data = iio_priv(i2c_get_clientdata(client));
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
char dev_name[16];
struct i2c_board_info board_info = {
.type = "bmc150_accel",
.dev_name = dev_name,
.fwnode = client->dev.fwnode,
};
if (acpi_match_device_ids(adev, bmc150_acpi_dual_accel_ids))
return;
/*
* The 2nd accel sits in the base of 2-in-1s. The suffix is static, as
* there should never be more then 1 ACPI node with 2 accelerometers.
*/
snprintf(dev_name, sizeof(dev_name), "%s:base", acpi_device_hid(adev));
board_info.irq = acpi_dev_gpio_irq_get(adev, 1);
data->second_device = i2c_acpi_new_device(&client->dev, 1, &board_info);
if (!IS_ERR(data->second_device) && bmc150_acpi_enable_keyboard(data->second_device)) {
INIT_DELAYED_WORK(&data->resume_work, bmc150_acpi_resume_work);
data->resume_callback = bmc150_acpi_resume_handler;
}
}
static void bmc150_acpi_dual_accel_remove(struct i2c_client *client)
{
struct bmc150_accel_data *data = iio_priv(i2c_get_clientdata(client));
if (data->resume_callback)
cancel_delayed_work_sync(&data->resume_work);
i2c_unregister_device(data->second_device);
}
#else
static void bmc150_acpi_dual_accel_probe(struct i2c_client *client) {}
static void bmc150_acpi_dual_accel_remove(struct i2c_client *client) {}
#endif
static int bmc150_accel_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct regmap *regmap;
const char *name = NULL;
enum bmc150_type type = BOSCH_UNKNOWN;
bool block_supported =
i2c_check_functionality(client->adapter, I2C_FUNC_I2C) ||
i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_READ_I2C_BLOCK);
int ret;
regmap = devm_regmap_init_i2c(client, &bmc150_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to initialize i2c regmap\n");
return PTR_ERR(regmap);
}
if (id) {
name = id->name;
type = id->driver_data;
}
ret = bmc150_accel_core_probe(&client->dev, regmap, client->irq,
type, name, block_supported);
if (ret)
return ret;
/*
* The !id check avoids recursion when probe() gets called
* for the second client.
*/
if (!id && has_acpi_companion(&client->dev))
bmc150_acpi_dual_accel_probe(client);
return 0;
}
static void bmc150_accel_remove(struct i2c_client *client)
{
bmc150_acpi_dual_accel_remove(client);
bmc150_accel_core_remove(&client->dev);
}
static const struct acpi_device_id bmc150_accel_acpi_match[] = {
{"BMA0255"},
{"BMA0280"},
{"BMA222"},
{"BMA222E"},
{"BMA250E"},
{"BMC150A"},
{"BMI055A"},
/*
* The "BOSC0200" identifier used here is not unique to devices using
* bmc150. The same "BOSC0200" identifier is found in the ACPI tables
* of the ASUS ROG ALLY and Ayaneo AIR Plus which both use a Bosch
* BMI323 chip. This creates a conflict with duplicate ACPI identifiers
* which multiple drivers want to use. Fortunately, when the bmc150
* driver starts to load on the ASUS ROG ALLY, the chip ID check
* portion fails (correctly) because the chip IDs received (via i2c)
* are unique between bmc150 and bmi323 and a dmesg output similar to
* this: "bmc150_accel_i2c i2c-BOSC0200:00: Invalid chip 0" can be
* seen. This allows the bmi323 driver to take over for ASUS ROG ALLY,
* and other devices using the bmi323 chip.
*/
{"BOSC0200"},
{"BSBA0150"},
{"DUAL250E"},
{ }
};
MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
static const struct i2c_device_id bmc150_accel_id[] = {
{ .name = "bma222", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma222e", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma250e", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma253", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma254", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma255", .driver_data = BOSCH_UNKNOWN },
{ .name = "bma280", .driver_data = BOSCH_UNKNOWN },
{ .name = "bmc150_accel", .driver_data = BOSCH_UNKNOWN },
{ .name = "bmc156_accel", .driver_data = BOSCH_BMC156 },
{ .name = "bmi055_accel", .driver_data = BOSCH_UNKNOWN },
{ }
};
MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
static const struct of_device_id bmc150_accel_of_match[] = {
{ .compatible = "bosch,bma222" },
{ .compatible = "bosch,bma222e" },
{ .compatible = "bosch,bma250e" },
{ .compatible = "bosch,bma253" },
{ .compatible = "bosch,bma254" },
{ .compatible = "bosch,bma255" },
{ .compatible = "bosch,bma280" },
{ .compatible = "bosch,bmc150_accel" },
{ .compatible = "bosch,bmc156_accel" },
{ .compatible = "bosch,bmi055_accel" },
{ }
};
MODULE_DEVICE_TABLE(of, bmc150_accel_of_match);
static struct i2c_driver bmc150_accel_driver = {
.driver = {
.name = "bmc150_accel_i2c",
.of_match_table = bmc150_accel_of_match,
.acpi_match_table = bmc150_accel_acpi_match,
.pm = &bmc150_accel_pm_ops,
},
.probe = bmc150_accel_probe,
.remove = bmc150_accel_remove,
.id_table = bmc150_accel_id,
};
module_i2c_driver(bmc150_accel_driver);
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMC150 I2C accelerometer driver");
MODULE_IMPORT_NS("IIO_BMC150");
linux-7.2.3/drivers/iio/accel/bmc150-accel-spi.c
+83
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@@ -0,0 +1,83 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* 3-axis accelerometer driver supporting SPI Bosch-Sensortec accelerometer chip
* Copyright © 2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "bmc150-accel.h"
static int bmc150_accel_probe(struct spi_device *spi)
{
struct regmap *regmap;
const char *name = NULL;
enum bmc150_type type = BOSCH_UNKNOWN;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init_spi(spi, &bmc150_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
if (id) {
name = id->name;
type = id->driver_data;
}
return bmc150_accel_core_probe(&spi->dev, regmap, spi->irq, type, name,
true);
}
static void bmc150_accel_remove(struct spi_device *spi)
{
bmc150_accel_core_remove(&spi->dev);
}
static const struct acpi_device_id bmc150_accel_acpi_match[] = {
{"BMA0255"},
{"BMA0280"},
{"BMA222"},
{"BMA222E"},
{"BMA250E"},
{"BMC150A"},
{"BMI055A"},
{"BSBA0150"},
{ }
};
MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
static const struct spi_device_id bmc150_accel_id[] = {
{"bma222"},
{"bma222e"},
{"bma250e"},
{"bma253"},
{"bma255"},
{"bma280"},
{"bmc150_accel"},
{"bmc156_accel", BOSCH_BMC156},
{"bmi055_accel"},
{ }
};
MODULE_DEVICE_TABLE(spi, bmc150_accel_id);
static struct spi_driver bmc150_accel_driver = {
.driver = {
.name = "bmc150_accel_spi",
.acpi_match_table = bmc150_accel_acpi_match,
.pm = &bmc150_accel_pm_ops,
},
.probe = bmc150_accel_probe,
.remove = bmc150_accel_remove,
.id_table = bmc150_accel_id,
};
module_spi_driver(bmc150_accel_driver);
MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMC150 SPI accelerometer driver");
MODULE_IMPORT_NS("IIO_BMC150");
linux-7.2.3/drivers/iio/accel/bmc150-accel.h
+97
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _BMC150_ACCEL_H_
#define _BMC150_ACCEL_H_
#include <linux/atomic.h>
#include <linux/iio/iio.h>
#include <linux/mutex.h>
#include <linux/regulator/consumer.h>
#include <linux/types.h>
#include <linux/workqueue.h>
struct regmap;
struct i2c_client;
struct bmc150_accel_chip_info;
struct bmc150_accel_interrupt_info;
/*
* We can often guess better than "UNKNOWN" based on the device IDs
* but unfortunately this information is not always accurate. There are some
* devices where ACPI firmware specifies an ID like "BMA250E" when the device
* actually has a BMA222E. The driver attempts to detect those by reading the
* chip ID from the registers but this information is not always enough either.
*
* Therefore, this enum should be only used when the chip ID detection is not
* enough and we can be reasonably sure that the device IDs are reliable
* in practice (e.g. for device tree platforms).
*/
enum bmc150_type {
BOSCH_UNKNOWN,
BOSCH_BMC156,
};
struct bmc150_accel_interrupt {
const struct bmc150_accel_interrupt_info *info;
atomic_t users;
};
struct bmc150_accel_trigger {
struct bmc150_accel_data *data;
struct iio_trigger *indio_trig;
int (*setup)(struct bmc150_accel_trigger *t, bool state);
int intr;
bool enabled;
};
enum bmc150_accel_interrupt_id {
BMC150_ACCEL_INT_DATA_READY,
BMC150_ACCEL_INT_ANY_MOTION,
BMC150_ACCEL_INT_WATERMARK,
BMC150_ACCEL_INTERRUPTS,
};
enum bmc150_accel_trigger_id {
BMC150_ACCEL_TRIGGER_DATA_READY,
BMC150_ACCEL_TRIGGER_ANY_MOTION,
BMC150_ACCEL_TRIGGERS,
};
struct bmc150_accel_data {
struct regmap *regmap;
int irq;
struct regulator_bulk_data regulators[2];
struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS];
struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS];
struct mutex mutex;
u8 fifo_mode, watermark;
s16 buffer[8];
/*
* Ensure there is sufficient space and correct alignment for
* the timestamp if enabled
*/
struct {
__le16 channels[3];
aligned_s64 ts;
} scan;
u8 bw_bits;
u32 slope_dur;
u32 slope_thres;
u32 range;
int ev_enable_state;
int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */
const struct bmc150_accel_chip_info *chip_info;
enum bmc150_type type;
struct i2c_client *second_device;
void (*resume_callback)(struct device *dev);
struct delayed_work resume_work;
struct iio_mount_matrix orientation;
};
int bmc150_accel_core_probe(struct device *dev, struct regmap *regmap, int irq,
enum bmc150_type type, const char *name,
bool block_supported);
void bmc150_accel_core_remove(struct device *dev);
extern const struct dev_pm_ops bmc150_accel_pm_ops;
extern const struct regmap_config bmc150_regmap_conf;
#endif /* _BMC150_ACCEL_H_ */
linux-7.2.3/drivers/iio/accel/bmi088-accel-core.c
+627
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// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
* - BMI085
* - BMI090L
*
* Copyright (c) 2018-2021, Topic Embedded Products
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/unaligned.h>
#include "bmi088-accel.h"
#define BMI088_ACCEL_REG_CHIP_ID 0x00
#define BMI088_ACCEL_REG_ERROR 0x02
#define BMI088_ACCEL_REG_INT_STATUS 0x1D
#define BMI088_ACCEL_INT_STATUS_BIT_DRDY BIT(7)
#define BMI088_ACCEL_REG_RESET 0x7E
#define BMI088_ACCEL_RESET_VAL 0xB6
#define BMI088_ACCEL_REG_PWR_CTRL 0x7D
#define BMI088_ACCEL_REG_PWR_CONF 0x7C
#define BMI088_ACCEL_REG_INT_MAP_DATA 0x58
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT1_DRDY BIT(2)
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT2_FWM BIT(5)
#define BMI088_ACCEL_REG_INT1_IO_CONF 0x53
#define BMI088_ACCEL_INT1_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT1_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_INT2_IO_CONF 0x54
#define BMI088_ACCEL_INT2_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT2_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_ACC_CONF 0x40
#define BMI088_ACCEL_MODE_ODR_MASK 0x0f
#define BMI088_ACCEL_REG_ACC_RANGE 0x41
#define BMI088_ACCEL_RANGE_3G 0x00
#define BMI088_ACCEL_RANGE_6G 0x01
#define BMI088_ACCEL_RANGE_12G 0x02
#define BMI088_ACCEL_RANGE_24G 0x03
#define BMI088_ACCEL_REG_TEMP 0x22
#define BMI088_ACCEL_REG_TEMP_SHIFT 5
#define BMI088_ACCEL_TEMP_UNIT 125
#define BMI088_ACCEL_TEMP_OFFSET 23000
#define BMI088_ACCEL_REG_XOUT_L 0x12
#define BMI088_ACCEL_AXIS_TO_REG(axis) \
(BMI088_ACCEL_REG_XOUT_L + (axis * 2))
#define BMI088_ACCEL_MAX_STARTUP_TIME_US 1000
#define BMI088_AUTO_SUSPEND_DELAY_MS 2000
#define BMI088_ACCEL_REG_FIFO_STATUS 0x0E
#define BMI088_ACCEL_REG_FIFO_CONFIG0 0x48
#define BMI088_ACCEL_REG_FIFO_CONFIG1 0x49
#define BMI088_ACCEL_REG_FIFO_DATA 0x3F
#define BMI088_ACCEL_FIFO_LENGTH 100
#define BMI088_ACCEL_FIFO_MODE_FIFO 0x40
#define BMI088_ACCEL_FIFO_MODE_STREAM 0x80
#define BMIO088_ACCEL_ACC_RANGE_MSK GENMASK(1, 0)
enum bmi088_accel_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
static const int bmi088_sample_freqs[] = {
12, 500000,
25, 0,
50, 0,
100, 0,
200, 0,
400, 0,
800, 0,
1600, 0,
};
/* Available OSR (over sampling rate) sets the 3dB cut-off frequency */
enum bmi088_osr_modes {
BMI088_ACCEL_MODE_OSR_NORMAL = 0xA,
BMI088_ACCEL_MODE_OSR_2 = 0x9,
BMI088_ACCEL_MODE_OSR_4 = 0x8,
};
/* Available ODR (output data rates) in Hz */
enum bmi088_odr_modes {
BMI088_ACCEL_MODE_ODR_12_5 = 0x5,
BMI088_ACCEL_MODE_ODR_25 = 0x6,
BMI088_ACCEL_MODE_ODR_50 = 0x7,
BMI088_ACCEL_MODE_ODR_100 = 0x8,
BMI088_ACCEL_MODE_ODR_200 = 0x9,
BMI088_ACCEL_MODE_ODR_400 = 0xa,
BMI088_ACCEL_MODE_ODR_800 = 0xb,
BMI088_ACCEL_MODE_ODR_1600 = 0xc,
};
struct bmi088_accel_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const int scale_table[4][2];
};
struct bmi088_accel_data {
struct regmap *regmap;
const struct bmi088_accel_chip_info *chip_info;
u8 buffer[2] __aligned(IIO_DMA_MINALIGN); /* shared DMA safe buffer */
};
static const struct regmap_range bmi088_volatile_ranges[] = {
/* All registers below 0x40 are volatile, except the CHIP ID. */
regmap_reg_range(BMI088_ACCEL_REG_ERROR, 0x3f),
/* Mark the RESET as volatile too, it is self-clearing */
regmap_reg_range(BMI088_ACCEL_REG_RESET, BMI088_ACCEL_REG_RESET),
};
static const struct regmap_access_table bmi088_volatile_table = {
.yes_ranges = bmi088_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(bmi088_volatile_ranges),
};
const struct regmap_config bmi088_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x7E,
.volatile_table = &bmi088_volatile_table,
.cache_type = REGCACHE_MAPLE,
};
EXPORT_SYMBOL_NS_GPL(bmi088_regmap_conf, "IIO_BMI088");
static int bmi088_accel_power_up(struct bmi088_accel_data *data)
{
int ret;
/* Enable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x4);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
/* Disable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x0);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
return 0;
}
static int bmi088_accel_power_down(struct bmi088_accel_data *data)
{
int ret;
/* Enable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x3);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
/* Disable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x0);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
return 0;
}
static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data,
int *val, int *val2)
{
unsigned int value;
int ret;
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
&value);
if (ret)
return ret;
value &= BMI088_ACCEL_MODE_ODR_MASK;
value -= BMI088_ACCEL_MODE_ODR_12_5;
value <<= 1;
if (value >= ARRAY_SIZE(bmi088_sample_freqs) - 1)
return -EINVAL;
*val = bmi088_sample_freqs[value];
*val2 = bmi088_sample_freqs[value + 1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val)
{
unsigned int regval;
int index = 0;
while (index < ARRAY_SIZE(bmi088_sample_freqs) &&
bmi088_sample_freqs[index] != val)
index += 2;
if (index >= ARRAY_SIZE(bmi088_sample_freqs))
return -EINVAL;
regval = (index >> 1) + BMI088_ACCEL_MODE_ODR_12_5;
return regmap_update_bits(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
BMI088_ACCEL_MODE_ODR_MASK, regval);
}
static int bmi088_accel_set_scale(struct bmi088_accel_data *data, int val, int val2)
{
unsigned int i;
for (i = 0; i < 4; i++)
if (val == data->chip_info->scale_table[i][0] &&
val2 == data->chip_info->scale_table[i][1])
break;
if (i == 4)
return -EINVAL;
return regmap_write(data->regmap, BMI088_ACCEL_REG_ACC_RANGE, i);
}
static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val)
{
int ret;
s16 temp;
ret = regmap_bulk_read(data->regmap, BMI088_ACCEL_REG_TEMP,
&data->buffer, sizeof(__be16));
if (ret)
return ret;
/* data->buffer is cacheline aligned */
temp = be16_to_cpu(*(__be16 *)data->buffer);
*val = temp >> BMI088_ACCEL_REG_TEMP_SHIFT;
return IIO_VAL_INT;
}
static int bmi088_accel_get_axis(struct bmi088_accel_data *data,
struct iio_chan_spec const *chan,
int *val)
{
int ret;
s16 raw_val;
ret = regmap_bulk_read(data->regmap,
BMI088_ACCEL_AXIS_TO_REG(chan->scan_index),
data->buffer, sizeof(__le16));
if (ret)
return ret;
raw_val = le16_to_cpu(*(__le16 *)data->buffer);
*val = raw_val;
return IIO_VAL_INT;
}
static int bmi088_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
int reg;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_get_temp(data, val);
goto out_read_raw_pm_put;
case IIO_ACCEL:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
if (!iio_device_claim_direct(indio_dev)) {
ret = -EBUSY;
goto out_read_raw_pm_put;
}
ret = bmi088_accel_get_axis(data, chan, val);
iio_device_release_direct(indio_dev);
if (!ret)
ret = IIO_VAL_INT;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
/* Offset applies before scale */
*val = BMI088_ACCEL_TEMP_OFFSET/BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/* 0.125 degrees per LSB */
*val = BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
case IIO_ACCEL:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = regmap_read(data->regmap,
BMI088_ACCEL_REG_ACC_RANGE, &reg);
if (ret)
goto out_read_raw_pm_put;
reg = FIELD_GET(BMIO088_ACCEL_ACC_RANGE_MSK, reg);
*val = data->chip_info->scale_table[reg][0];
*val2 = data->chip_info->scale_table[reg][1];
ret = IIO_VAL_INT_PLUS_MICRO;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_get_sample_freq(data, val, val2);
goto out_read_raw_pm_put;
default:
break;
}
return -EINVAL;
out_read_raw_pm_put:
pm_runtime_put_autosuspend(dev);
return ret;
}
static int bmi088_accel_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
*vals = (const int *)data->chip_info->scale_table;
*length = 8;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
case IIO_CHAN_INFO_SAMP_FREQ:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = bmi088_sample_freqs;
*length = ARRAY_SIZE(bmi088_sample_freqs);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int bmi088_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_set_scale(data, val, val2);
pm_runtime_put_autosuspend(dev);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
ret = bmi088_accel_set_sample_freq(data, val);
pm_runtime_put_autosuspend(dev);
return ret;
default:
return -EINVAL;
}
}
#define BMI088_ACCEL_CHANNEL(_axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = AXIS_##_axis, \
}
static const struct iio_chan_spec bmi088_accel_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = -1,
},
BMI088_ACCEL_CHANNEL(X),
BMI088_ACCEL_CHANNEL(Y),
BMI088_ACCEL_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = {
[BOSCH_BMI085] = {
.name = "bmi085-accel",
.chip_id = 0x1F,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 598}, {0, 1196}, {0, 2393}, {0, 4785}},
},
[BOSCH_BMI088] = {
.name = "bmi088-accel",
.chip_id = 0x1E,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
},
[BOSCH_BMI090L] = {
.name = "bmi090l-accel",
.chip_id = 0x1A,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
.scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
},
};
static const struct iio_info bmi088_accel_info = {
.read_raw = bmi088_accel_read_raw,
.write_raw = bmi088_accel_write_raw,
.read_avail = bmi088_accel_read_avail,
};
static const unsigned long bmi088_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
static int bmi088_accel_chip_init(struct bmi088_accel_data *data, enum bmi_device_type type)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
unsigned int val;
if (type >= BOSCH_UNKNOWN)
return -ENODEV;
/* Do a dummy read to enable SPI interface, won't harm I2C */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/*
* Reset chip to get it in a known good state. A delay of 1ms after
* reset is required according to the data sheet
*/
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_RESET,
BMI088_ACCEL_RESET_VAL);
if (ret)
return ret;
usleep_range(1000, 2000);
/* Do a dummy read again after a reset to enable the SPI interface */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/* Read chip ID */
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_CHIP_ID, &val);
if (ret) {
dev_err(dev, "Error: Reading chip id\n");
return ret;
}
/* Validate chip ID */
for (i = 0; i < ARRAY_SIZE(bmi088_accel_chip_info_tbl); i++)
if (bmi088_accel_chip_info_tbl[i].chip_id == val)
break;
if (i == ARRAY_SIZE(bmi088_accel_chip_info_tbl))
data->chip_info = &bmi088_accel_chip_info_tbl[type];
else
data->chip_info = &bmi088_accel_chip_info_tbl[i];
if (i != type)
dev_warn(dev, "unexpected chip id 0x%X\n", val);
return 0;
}
int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap,
int irq, enum bmi_device_type type)
{
struct bmi088_accel_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
ret = bmi088_accel_chip_init(data, type);
if (ret)
return ret;
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->name = data->chip_info->name;
indio_dev->available_scan_masks = bmi088_accel_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmi088_accel_info;
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_suspended(dev);
pm_runtime_enable(dev);
/* We need ~6ms to startup, so set the delay to 6 seconds */
pm_runtime_set_autosuspend_delay(dev, 6000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
ret = iio_device_register(indio_dev);
if (ret)
dev_err(dev, "Unable to register iio device\n");
return ret;
}
EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_probe, "IIO_BMI088");
void bmi088_accel_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
bmi088_accel_power_down(data);
}
EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_remove, "IIO_BMI088");
static int bmi088_accel_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_down(data);
}
static int bmi088_accel_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_up(data);
}
EXPORT_NS_GPL_RUNTIME_DEV_PM_OPS(bmi088_accel_pm_ops,
bmi088_accel_runtime_suspend,
bmi088_accel_runtime_resume, NULL,
IIO_BMI088);
MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (core)");
linux-7.2.3/drivers/iio/accel/bmi088-accel-i2c.c
+69
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@@ -0,0 +1,69 @@
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
* - BMI085
* - BMI090L
*
* Copyright 2023 Jun Yan <jerrysteve1101@gmail.com>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include "bmi088-accel.h"
static int bmi088_accel_probe(struct i2c_client *i2c)
{
struct regmap *regmap;
const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
regmap = devm_regmap_init_i2c(i2c, &bmi088_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "Failed to initialize i2c regmap\n");
return PTR_ERR(regmap);
}
return bmi088_accel_core_probe(&i2c->dev, regmap, i2c->irq,
id->driver_data);
}
static void bmi088_accel_remove(struct i2c_client *i2c)
{
bmi088_accel_core_remove(&i2c->dev);
}
static const struct of_device_id bmi088_of_match[] = {
{ .compatible = "bosch,bmi085-accel" },
{ .compatible = "bosch,bmi088-accel" },
{ .compatible = "bosch,bmi090l-accel" },
{ }
};
MODULE_DEVICE_TABLE(of, bmi088_of_match);
static const struct i2c_device_id bmi088_accel_id[] = {
{ .name = "bmi085-accel", .driver_data = BOSCH_BMI085 },
{ .name = "bmi088-accel", .driver_data = BOSCH_BMI088 },
{ .name = "bmi090l-accel", .driver_data = BOSCH_BMI090L },
{ }
};
MODULE_DEVICE_TABLE(i2c, bmi088_accel_id);
static struct i2c_driver bmi088_accel_driver = {
.driver = {
.name = "bmi088_accel_i2c",
.pm = pm_ptr(&bmi088_accel_pm_ops),
.of_match_table = bmi088_of_match,
},
.probe = bmi088_accel_probe,
.remove = bmi088_accel_remove,
.id_table = bmi088_accel_id,
};
module_i2c_driver(bmi088_accel_driver);
MODULE_AUTHOR("Jun Yan <jerrysteve1101@gmail.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("BMI088 accelerometer driver (I2C)");
MODULE_IMPORT_NS("IIO_BMI088");
linux-7.2.3/drivers/iio/accel/bmi088-accel-spi.c
+97
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@@ -0,0 +1,97 @@
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
* - BMI085
* - BMI090L
*
* Copyright (c) 2018-2020, Topic Embedded Products
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include "bmi088-accel.h"
static int bmi088_regmap_spi_write(void *context, const void *data, size_t count)
{
struct spi_device *spi = context;
/* Write register is same as generic SPI */
return spi_write(spi, data, count);
}
static int bmi088_regmap_spi_read(void *context, const void *reg,
size_t reg_size, void *val, size_t val_size)
{
struct spi_device *spi = context;
u8 addr[2];
addr[0] = *(u8 *)reg;
addr[0] |= BIT(7); /* Set RW = '1' */
addr[1] = 0; /* Read requires a dummy byte transfer */
return spi_write_then_read(spi, addr, sizeof(addr), val, val_size);
}
static const struct regmap_bus bmi088_regmap_bus = {
.write = bmi088_regmap_spi_write,
.read = bmi088_regmap_spi_read,
};
static int bmi088_accel_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init(&spi->dev, &bmi088_regmap_bus,
spi, &bmi088_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
return bmi088_accel_core_probe(&spi->dev, regmap, spi->irq,
id->driver_data);
}
static void bmi088_accel_remove(struct spi_device *spi)
{
bmi088_accel_core_remove(&spi->dev);
}
static const struct of_device_id bmi088_of_match[] = {
{ .compatible = "bosch,bmi085-accel" },
{ .compatible = "bosch,bmi088-accel" },
{ .compatible = "bosch,bmi090l-accel" },
{ }
};
MODULE_DEVICE_TABLE(of, bmi088_of_match);
static const struct spi_device_id bmi088_accel_id[] = {
{"bmi085-accel", BOSCH_BMI085},
{"bmi088-accel", BOSCH_BMI088},
{"bmi090l-accel", BOSCH_BMI090L},
{ }
};
MODULE_DEVICE_TABLE(spi, bmi088_accel_id);
static struct spi_driver bmi088_accel_driver = {
.driver = {
.name = "bmi088_accel_spi",
.pm = pm_ptr(&bmi088_accel_pm_ops),
.of_match_table = bmi088_of_match,
},
.probe = bmi088_accel_probe,
.remove = bmi088_accel_remove,
.id_table = bmi088_accel_id,
};
module_spi_driver(bmi088_accel_driver);
MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (SPI)");
MODULE_IMPORT_NS("IIO_BMI088");
linux-7.2.3/drivers/iio/accel/bmi088-accel.h
+25
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@@ -0,0 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef BMI088_ACCEL_H
#define BMI088_ACCEL_H
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/types.h>
struct device;
enum bmi_device_type {
BOSCH_BMI085,
BOSCH_BMI088,
BOSCH_BMI090L,
BOSCH_UNKNOWN,
};
extern const struct regmap_config bmi088_regmap_conf;
extern const struct dev_pm_ops bmi088_accel_pm_ops;
int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap, int irq,
enum bmi_device_type type);
void bmi088_accel_core_remove(struct device *dev);
#endif /* BMI088_ACCEL_H */
linux-7.2.3/drivers/iio/accel/cros_ec_accel_legacy.c
+252
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@@ -0,0 +1,252 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for older Chrome OS EC accelerometer
*
* Copyright 2017 Google, Inc
*
* This driver uses the memory mapper cros-ec interface to communicate
* with the Chrome OS EC about accelerometer data or older commands.
* Accelerometer access is presented through iio sysfs.
*/
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/cros_ec_sensors_core.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_data/cros_ec_commands.h>
#include <linux/platform_data/cros_ec_proto.h>
#include <linux/platform_device.h>
#define DRV_NAME "cros-ec-accel-legacy"
#define CROS_EC_SENSOR_LEGACY_NUM 2
/*
* Sensor scale hard coded at 10 bits per g, computed as:
* g / (2^10 - 1) = 0.009586168; with g = 9.80665 m.s^-2
*/
#define ACCEL_LEGACY_NSCALE 9586168
/*
* Sensor frequency is hard-coded to 10Hz.
*/
static const int cros_ec_legacy_sample_freq[] = { 10, 0 };
static int cros_ec_accel_legacy_read_cmd(struct iio_dev *indio_dev,
unsigned long scan_mask, s16 *data)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
int ret;
unsigned int i;
u8 sensor_num;
/*
* Read all sensor data through a command.
* Save sensor_num, it is assumed to stay.
*/
sensor_num = st->param.info.sensor_num;
st->param.cmd = MOTIONSENSE_CMD_DUMP;
st->param.dump.max_sensor_count = CROS_EC_SENSOR_LEGACY_NUM;
ret = cros_ec_motion_send_host_cmd(st,
sizeof(st->resp->dump) + CROS_EC_SENSOR_LEGACY_NUM *
sizeof(struct ec_response_motion_sensor_data));
st->param.info.sensor_num = sensor_num;
if (ret != 0) {
dev_warn(&indio_dev->dev, "Unable to read sensor data\n");
return ret;
}
for_each_set_bit(i, &scan_mask, iio_get_masklength(indio_dev)) {
*data = st->resp->dump.sensor[sensor_num].data[i] *
st->sign[i];
data++;
}
return 0;
}
static int cros_ec_accel_legacy_read(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct cros_ec_sensors_core_state *st = iio_priv(indio_dev);
s16 data = 0;
int ret;
int idx = chan->scan_index;
mutex_lock(&st->cmd_lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = st->read_ec_sensors_data(indio_dev, 1 << idx, &data);
if (ret < 0)
break;
ret = IIO_VAL_INT;
*val = data;
break;
case IIO_CHAN_INFO_SCALE:
WARN_ON(st->type != MOTIONSENSE_TYPE_ACCEL);
*val = 0;
*val2 = ACCEL_LEGACY_NSCALE;
ret = IIO_VAL_INT_PLUS_NANO;
break;
case IIO_CHAN_INFO_CALIBBIAS:
/* Calibration not supported. */
*val = 0;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = cros_ec_legacy_sample_freq[0];
*val2 = cros_ec_legacy_sample_freq[1];
ret = IIO_VAL_INT_PLUS_MICRO;
break;
default:
ret = cros_ec_sensors_core_read(st, chan, val, val2,
mask);
break;
}
mutex_unlock(&st->cmd_lock);
return ret;
}
static int cros_ec_accel_legacy_write(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
/*
* Do nothing but don't return an error code to allow calibration
* script to work.
*/
if (mask == IIO_CHAN_INFO_CALIBBIAS)
return 0;
return -EINVAL;
}
/**
* cros_ec_accel_legacy_read_avail() - get available values
* @indio_dev: pointer to state information for device
* @chan: channel specification structure table
* @vals: list of available values
* @type: type of data returned
* @length: number of data returned in the array
* @mask: specifies which values to be requested
*
* Return: an error code or IIO_AVAIL_LIST
*/
static int cros_ec_accel_legacy_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals,
int *type,
int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*length = ARRAY_SIZE(cros_ec_legacy_sample_freq);
*vals = cros_ec_legacy_sample_freq;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
}
return -EINVAL;
}
static const struct iio_info cros_ec_accel_legacy_info = {
.read_raw = &cros_ec_accel_legacy_read,
.write_raw = &cros_ec_accel_legacy_write,
.read_avail = &cros_ec_accel_legacy_read_avail,
};
/*
* Present the channel using HTML5 standard:
* need to invert X and Y and invert some lid axis.
*/
#define CROS_EC_ACCEL_ROTATE_AXIS(_axis) \
((_axis) == CROS_EC_SENSOR_Z ? CROS_EC_SENSOR_Z : \
((_axis) == CROS_EC_SENSOR_X ? CROS_EC_SENSOR_Y : \
CROS_EC_SENSOR_X))
#define CROS_EC_ACCEL_LEGACY_CHAN(_axis) \
{ \
.type = IIO_ACCEL, \
.channel2 = IIO_MOD_X + (_axis), \
.modified = 1, \
.info_mask_separate = \
BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_CALIBBIAS), \
.info_mask_shared_by_all = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_all_available = \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.ext_info = cros_ec_sensors_ext_info, \
.scan_type = { \
.sign = 's', \
.realbits = CROS_EC_SENSOR_BITS, \
.storagebits = CROS_EC_SENSOR_BITS, \
}, \
.scan_index = CROS_EC_ACCEL_ROTATE_AXIS(_axis), \
} \
static const struct iio_chan_spec cros_ec_accel_legacy_channels[] = {
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_X),
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_Y),
CROS_EC_ACCEL_LEGACY_CHAN(CROS_EC_SENSOR_Z),
IIO_CHAN_SOFT_TIMESTAMP(CROS_EC_SENSOR_MAX_AXIS)
};
static int cros_ec_accel_legacy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct iio_dev *indio_dev;
struct cros_ec_sensors_core_state *state;
int ret;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture);
if (ret)
return ret;
indio_dev->info = &cros_ec_accel_legacy_info;
state = iio_priv(indio_dev);
if (state->ec->cmd_readmem != NULL)
state->read_ec_sensors_data = cros_ec_sensors_read_lpc;
else
state->read_ec_sensors_data = cros_ec_accel_legacy_read_cmd;
indio_dev->channels = cros_ec_accel_legacy_channels;
indio_dev->num_channels = ARRAY_SIZE(cros_ec_accel_legacy_channels);
/* The lid sensor needs to be presented inverted. */
if (!strcmp(indio_dev->label, "accel-display")) {
state->sign[CROS_EC_SENSOR_X] = -1;
state->sign[CROS_EC_SENSOR_Z] = -1;
}
return cros_ec_sensors_core_register(dev, indio_dev, NULL);
}
static struct platform_driver cros_ec_accel_platform_driver = {
.driver = {
.name = DRV_NAME,
},
.probe = cros_ec_accel_legacy_probe,
};
module_platform_driver(cros_ec_accel_platform_driver);
MODULE_DESCRIPTION("ChromeOS EC legacy accelerometer driver");
MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" DRV_NAME);
linux-7.2.3/drivers/iio/accel/da280.c
+186
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@@ -0,0 +1,186 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the MiraMEMS DA217 and DA280 3-axis accelerometer and
* IIO driver for the MiraMEMS DA226 2-axis accelerometer
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DA280_REG_CHIP_ID 0x01
#define DA280_REG_ACC_X_LSB 0x02
#define DA280_REG_ACC_Y_LSB 0x04
#define DA280_REG_ACC_Z_LSB 0x06
#define DA280_REG_MODE_BW 0x11
#define DA280_CHIP_ID 0x13
#define DA280_MODE_ENABLE 0x1e
#define DA280_MODE_DISABLE 0x9e
/*
* a value of + or -4096 corresponds to + or - 1G
* scale = 9.81 / 4096 = 0.002395019
*/
static const int da280_nscale = 2395019;
#define DA280_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec da280_channels[] = {
DA280_CHANNEL(DA280_REG_ACC_X_LSB, X),
DA280_CHANNEL(DA280_REG_ACC_Y_LSB, Y),
DA280_CHANNEL(DA280_REG_ACC_Z_LSB, Z),
};
struct da280_match_data {
const char *name;
int num_channels;
};
struct da280_data {
struct i2c_client *client;
};
static int da280_enable(struct i2c_client *client, bool enable)
{
u8 data = enable ? DA280_MODE_ENABLE : DA280_MODE_DISABLE;
return i2c_smbus_write_byte_data(client, DA280_REG_MODE_BW, data);
}
static int da280_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct da280_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_data(data->client, chan->address);
if (ret < 0)
return ret;
/*
* Values are 14 bits, stored as 16 bits with the 2
* least significant bits always 0.
*/
*val = (short)ret >> 2;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = da280_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info da280_info = {
.read_raw = da280_read_raw,
};
static void da280_disable(void *client)
{
da280_enable(client, false);
}
static int da280_probe(struct i2c_client *client)
{
const struct da280_match_data *match_data;
struct iio_dev *indio_dev;
struct da280_data *data;
int ret;
ret = i2c_smbus_read_byte_data(client, DA280_REG_CHIP_ID);
if (ret != DA280_CHIP_ID)
return (ret < 0) ? ret : -ENODEV;
match_data = i2c_get_match_data(client);
if (!match_data) {
dev_err(&client->dev, "Error match-data not set\n");
return -EINVAL;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &da280_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = da280_channels;
indio_dev->num_channels = match_data->num_channels;
indio_dev->name = match_data->name;
ret = da280_enable(client, true);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, da280_disable, client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int da280_suspend(struct device *dev)
{
return da280_enable(to_i2c_client(dev), false);
}
static int da280_resume(struct device *dev)
{
return da280_enable(to_i2c_client(dev), true);
}
static DEFINE_SIMPLE_DEV_PM_OPS(da280_pm_ops, da280_suspend, da280_resume);
static const struct da280_match_data da217_match_data = { "da217", 3 };
static const struct da280_match_data da226_match_data = { "da226", 2 };
static const struct da280_match_data da280_match_data = { "da280", 3 };
static const struct acpi_device_id da280_acpi_match[] = {
{ "NSA2513", (kernel_ulong_t)&da217_match_data },
{ "MIRAACC", (kernel_ulong_t)&da280_match_data },
{ }
};
MODULE_DEVICE_TABLE(acpi, da280_acpi_match);
static const struct i2c_device_id da280_i2c_id[] = {
{ .name = "da217", .driver_data = (kernel_ulong_t)&da217_match_data },
{ .name = "da226", .driver_data = (kernel_ulong_t)&da226_match_data },
{ .name = "da280", .driver_data = (kernel_ulong_t)&da280_match_data },
{ }
};
MODULE_DEVICE_TABLE(i2c, da280_i2c_id);
static struct i2c_driver da280_driver = {
.driver = {
.name = "da280",
.acpi_match_table = da280_acpi_match,
.pm = pm_sleep_ptr(&da280_pm_ops),
},
.probe = da280_probe,
.id_table = da280_i2c_id,
};
module_i2c_driver(da280_driver);
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_DESCRIPTION("MiraMEMS DA280 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/da311.c
+289
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@@ -0,0 +1,289 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the MiraMEMS DA311 3-axis accelerometer
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
* Copyright (c) 2011-2013 MiraMEMS Sensing Technology Co., Ltd.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DA311_CHIP_ID 0x13
/*
* Note register addressed go from 0 - 0x3f and then wrap.
* For some reason there are 2 banks with 0 - 0x3f addresses,
* rather then a single 0-0x7f bank.
*/
/* Bank 0 regs */
#define DA311_REG_BANK 0x0000
#define DA311_REG_LDO_REG 0x0006
#define DA311_REG_CHIP_ID 0x000f
#define DA311_REG_TEMP_CFG_REG 0x001f
#define DA311_REG_CTRL_REG1 0x0020
#define DA311_REG_CTRL_REG3 0x0022
#define DA311_REG_CTRL_REG4 0x0023
#define DA311_REG_CTRL_REG5 0x0024
#define DA311_REG_CTRL_REG6 0x0025
#define DA311_REG_STATUS_REG 0x0027
#define DA311_REG_OUT_X_L 0x0028
#define DA311_REG_OUT_X_H 0x0029
#define DA311_REG_OUT_Y_L 0x002a
#define DA311_REG_OUT_Y_H 0x002b
#define DA311_REG_OUT_Z_L 0x002c
#define DA311_REG_OUT_Z_H 0x002d
#define DA311_REG_INT1_CFG 0x0030
#define DA311_REG_INT1_SRC 0x0031
#define DA311_REG_INT1_THS 0x0032
#define DA311_REG_INT1_DURATION 0x0033
#define DA311_REG_INT2_CFG 0x0034
#define DA311_REG_INT2_SRC 0x0035
#define DA311_REG_INT2_THS 0x0036
#define DA311_REG_INT2_DURATION 0x0037
#define DA311_REG_CLICK_CFG 0x0038
#define DA311_REG_CLICK_SRC 0x0039
#define DA311_REG_CLICK_THS 0x003a
#define DA311_REG_TIME_LIMIT 0x003b
#define DA311_REG_TIME_LATENCY 0x003c
#define DA311_REG_TIME_WINDOW 0x003d
/* Bank 1 regs */
#define DA311_REG_SOFT_RESET 0x0105
#define DA311_REG_OTP_XOFF_L 0x0110
#define DA311_REG_OTP_XOFF_H 0x0111
#define DA311_REG_OTP_YOFF_L 0x0112
#define DA311_REG_OTP_YOFF_H 0x0113
#define DA311_REG_OTP_ZOFF_L 0x0114
#define DA311_REG_OTP_ZOFF_H 0x0115
#define DA311_REG_OTP_XSO 0x0116
#define DA311_REG_OTP_YSO 0x0117
#define DA311_REG_OTP_ZSO 0x0118
#define DA311_REG_OTP_TRIM_OSC 0x011b
#define DA311_REG_LPF_ABSOLUTE 0x011c
#define DA311_REG_TEMP_OFF1 0x0127
#define DA311_REG_TEMP_OFF2 0x0128
#define DA311_REG_TEMP_OFF3 0x0129
#define DA311_REG_OTP_TRIM_THERM_H 0x011a
/*
* a value of + or -1024 corresponds to + or - 1G
* scale = 9.81 / 1024 = 0.009580078
*/
static const int da311_nscale = 9580078;
#define DA311_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec da311_channels[] = {
/* | 0x80 comes from the android driver */
DA311_CHANNEL(DA311_REG_OUT_X_L | 0x80, X),
DA311_CHANNEL(DA311_REG_OUT_Y_L | 0x80, Y),
DA311_CHANNEL(DA311_REG_OUT_Z_L | 0x80, Z),
};
struct da311_data {
struct i2c_client *client;
};
static int da311_register_mask_write(struct i2c_client *client, u16 addr,
u8 mask, u8 data)
{
int ret;
u8 tmp_data = 0;
if (addr & 0xff00) {
/* Select bank 1 */
ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x01);
if (ret < 0)
return ret;
}
if (mask != 0xff) {
ret = i2c_smbus_read_byte_data(client, addr);
if (ret < 0)
return ret;
tmp_data = ret;
}
tmp_data &= ~mask;
tmp_data |= data & mask;
ret = i2c_smbus_write_byte_data(client, addr & 0xff, tmp_data);
if (ret < 0)
return ret;
if (addr & 0xff00) {
/* Back to bank 0 */
ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x00);
if (ret < 0)
return ret;
}
return 0;
}
/* Init sequence taken from the android driver */
static int da311_reset(struct i2c_client *client)
{
static const struct {
u16 addr;
u8 mask;
u8 data;
} init_data[] = {
{ DA311_REG_TEMP_CFG_REG, 0xff, 0x08 },
{ DA311_REG_CTRL_REG5, 0xff, 0x80 },
{ DA311_REG_CTRL_REG4, 0x30, 0x00 },
{ DA311_REG_CTRL_REG1, 0xff, 0x6f },
{ DA311_REG_TEMP_CFG_REG, 0xff, 0x88 },
{ DA311_REG_LDO_REG, 0xff, 0x02 },
{ DA311_REG_OTP_TRIM_OSC, 0xff, 0x27 },
{ DA311_REG_LPF_ABSOLUTE, 0xff, 0x30 },
{ DA311_REG_TEMP_OFF1, 0xff, 0x3f },
{ DA311_REG_TEMP_OFF2, 0xff, 0xff },
{ DA311_REG_TEMP_OFF3, 0xff, 0x0f },
};
int i, ret;
/* Reset */
ret = da311_register_mask_write(client, DA311_REG_SOFT_RESET,
0xff, 0xaa);
if (ret < 0)
return ret;
for (i = 0; i < ARRAY_SIZE(init_data); i++) {
ret = da311_register_mask_write(client,
init_data[i].addr,
init_data[i].mask,
init_data[i].data);
if (ret < 0)
return ret;
}
return 0;
}
static int da311_enable(struct i2c_client *client, bool enable)
{
u8 data = enable ? 0x00 : 0x20;
return da311_register_mask_write(client, DA311_REG_TEMP_CFG_REG,
0x20, data);
}
static int da311_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct da311_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_data(data->client, chan->address);
if (ret < 0)
return ret;
/*
* Values are 12 bits, stored as 16 bits with the 4
* least significant bits always 0.
*/
*val = (short)ret >> 4;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = da311_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info da311_info = {
.read_raw = da311_read_raw,
};
static void da311_disable(void *client)
{
da311_enable(client, false);
}
static int da311_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct da311_data *data;
ret = i2c_smbus_read_byte_data(client, DA311_REG_CHIP_ID);
if (ret != DA311_CHIP_ID)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &da311_info;
indio_dev->name = "da311";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = da311_channels;
indio_dev->num_channels = ARRAY_SIZE(da311_channels);
ret = da311_reset(client);
if (ret < 0)
return ret;
ret = da311_enable(client, true);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, da311_disable, client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int da311_suspend(struct device *dev)
{
return da311_enable(to_i2c_client(dev), false);
}
static int da311_resume(struct device *dev)
{
return da311_enable(to_i2c_client(dev), true);
}
static DEFINE_SIMPLE_DEV_PM_OPS(da311_pm_ops, da311_suspend, da311_resume);
static const struct i2c_device_id da311_i2c_id[] = {
{ .name = "da311" },
{ }
};
MODULE_DEVICE_TABLE(i2c, da311_i2c_id);
static struct i2c_driver da311_driver = {
.driver = {
.name = "da311",
.pm = pm_sleep_ptr(&da311_pm_ops),
},
.probe = da311_probe,
.id_table = da311_i2c_id,
};
module_i2c_driver(da311_driver);
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_DESCRIPTION("MiraMEMS DA311 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/dmard06.c
+229
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@@ -0,0 +1,229 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for Domintech DMARD06 accelerometer
*
* Copyright (C) 2016 Aleksei Mamlin <mamlinav@gmail.com>
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#define DMARD06_DRV_NAME "dmard06"
/* Device data registers */
#define DMARD06_CHIP_ID_REG 0x0f
#define DMARD06_TOUT_REG 0x40
#define DMARD06_XOUT_REG 0x41
#define DMARD06_YOUT_REG 0x42
#define DMARD06_ZOUT_REG 0x43
#define DMARD06_CTRL1_REG 0x44
/* Device ID value */
#define DMARD05_CHIP_ID 0x05
#define DMARD06_CHIP_ID 0x06
#define DMARD07_CHIP_ID 0x07
/* Device values */
#define DMARD05_AXIS_SCALE_VAL 15625
#define DMARD06_AXIS_SCALE_VAL 31250
#define DMARD06_TEMP_CENTER_VAL 25
#define DMARD06_SIGN_BIT 7
/* Device power modes */
#define DMARD06_MODE_NORMAL 0x27
#define DMARD06_MODE_POWERDOWN 0x00
/* Device channels */
#define DMARD06_ACCEL_CHANNEL(_axis, _reg) { \
.type = IIO_ACCEL, \
.address = _reg, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.modified = 1, \
}
#define DMARD06_TEMP_CHANNEL(_reg) { \
.type = IIO_TEMP, \
.address = _reg, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_OFFSET), \
}
struct dmard06_data {
struct i2c_client *client;
u8 chip_id;
};
static const struct iio_chan_spec dmard06_channels[] = {
DMARD06_ACCEL_CHANNEL(X, DMARD06_XOUT_REG),
DMARD06_ACCEL_CHANNEL(Y, DMARD06_YOUT_REG),
DMARD06_ACCEL_CHANNEL(Z, DMARD06_ZOUT_REG),
DMARD06_TEMP_CHANNEL(DMARD06_TOUT_REG),
};
static int dmard06_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_byte_data(dmard06->client,
chan->address);
if (ret < 0) {
dev_err(&dmard06->client->dev,
"Error reading data: %d\n", ret);
return ret;
}
*val = sign_extend32(ret, DMARD06_SIGN_BIT);
if (dmard06->chip_id == DMARD06_CHIP_ID)
*val = *val >> 1;
switch (chan->type) {
case IIO_ACCEL:
return IIO_VAL_INT;
case IIO_TEMP:
if (dmard06->chip_id != DMARD06_CHIP_ID)
*val = *val / 2;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
*val = DMARD06_TEMP_CENTER_VAL;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
*val = 0;
if (dmard06->chip_id == DMARD06_CHIP_ID)
*val2 = DMARD06_AXIS_SCALE_VAL;
else
*val2 = DMARD05_AXIS_SCALE_VAL;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static const struct iio_info dmard06_info = {
.read_raw = dmard06_read_raw,
};
static int dmard06_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard06_data *dmard06;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "I2C check functionality failed\n");
return -ENXIO;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*dmard06));
if (!indio_dev)
return -ENOMEM;
dmard06 = iio_priv(indio_dev);
dmard06->client = client;
ret = i2c_smbus_read_byte_data(dmard06->client, DMARD06_CHIP_ID_REG);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id: %d\n", ret);
return ret;
}
if (ret != DMARD05_CHIP_ID && ret != DMARD06_CHIP_ID &&
ret != DMARD07_CHIP_ID) {
dev_err(&client->dev, "Invalid chip id: %02d\n", ret);
return -ENODEV;
}
dmard06->chip_id = ret;
i2c_set_clientdata(client, indio_dev);
indio_dev->name = DMARD06_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard06_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard06_channels);
indio_dev->info = &dmard06_info;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int dmard06_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_write_byte_data(dmard06->client, DMARD06_CTRL1_REG,
DMARD06_MODE_POWERDOWN);
if (ret < 0)
return ret;
return 0;
}
static int dmard06_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct dmard06_data *dmard06 = iio_priv(indio_dev);
int ret;
ret = i2c_smbus_write_byte_data(dmard06->client, DMARD06_CTRL1_REG,
DMARD06_MODE_NORMAL);
if (ret < 0)
return ret;
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(dmard06_pm_ops, dmard06_suspend,
dmard06_resume);
static const struct i2c_device_id dmard06_id[] = {
{ .name = "dmard05" },
{ .name = "dmard06" },
{ .name = "dmard07" },
{ }
};
MODULE_DEVICE_TABLE(i2c, dmard06_id);
static const struct of_device_id dmard06_of_match[] = {
{ .compatible = "domintech,dmard05" },
{ .compatible = "domintech,dmard06" },
{ .compatible = "domintech,dmard07" },
{ }
};
MODULE_DEVICE_TABLE(of, dmard06_of_match);
static struct i2c_driver dmard06_driver = {
.probe = dmard06_probe,
.id_table = dmard06_id,
.driver = {
.name = DMARD06_DRV_NAME,
.of_match_table = dmard06_of_match,
.pm = pm_sleep_ptr(&dmard06_pm_ops),
},
};
module_i2c_driver(dmard06_driver);
MODULE_AUTHOR("Aleksei Mamlin <mamlinav@gmail.com>");
MODULE_DESCRIPTION("Domintech DMARD06 accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/dmard09.c
+144
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@@ -0,0 +1,144 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the 3-axis accelerometer Domintech DMARD09.
*
* Copyright (c) 2016, Jelle van der Waa <jelle@vdwaa.nl>
*/
#include <linux/unaligned.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#define DMARD09_DRV_NAME "dmard09"
#define DMARD09_REG_CHIPID 0x18
#define DMARD09_REG_STAT 0x0A
#define DMARD09_REG_X 0x0C
#define DMARD09_REG_Y 0x0E
#define DMARD09_REG_Z 0x10
#define DMARD09_CHIPID 0x95
#define DMARD09_BUF_LEN 8
#define DMARD09_AXIS_X 0
#define DMARD09_AXIS_Y 1
#define DMARD09_AXIS_Z 2
#define DMARD09_AXIS_X_OFFSET ((DMARD09_AXIS_X + 1) * 2)
#define DMARD09_AXIS_Y_OFFSET ((DMARD09_AXIS_Y + 1) * 2)
#define DMARD09_AXIS_Z_OFFSET ((DMARD09_AXIS_Z + 1) * 2)
struct dmard09_data {
struct i2c_client *client;
};
#define DMARD09_CHANNEL(_axis, offset) { \
.type = IIO_ACCEL, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.modified = 1, \
.address = offset, \
.channel2 = IIO_MOD_##_axis, \
}
static const struct iio_chan_spec dmard09_channels[] = {
DMARD09_CHANNEL(X, DMARD09_AXIS_X_OFFSET),
DMARD09_CHANNEL(Y, DMARD09_AXIS_Y_OFFSET),
DMARD09_CHANNEL(Z, DMARD09_AXIS_Z_OFFSET),
};
static int dmard09_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard09_data *data = iio_priv(indio_dev);
u8 buf[DMARD09_BUF_LEN];
int ret;
s16 accel;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Read from the DMAR09_REG_STAT register, since the chip
* caches reads from the individual X, Y, Z registers.
*/
ret = i2c_smbus_read_i2c_block_data(data->client,
DMARD09_REG_STAT,
DMARD09_BUF_LEN, buf);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg %d\n",
DMARD09_REG_STAT);
return ret;
}
accel = get_unaligned_le16(&buf[chan->address]);
/* Remove lower 3 bits and sign extend */
accel <<= 4;
accel >>= 7;
*val = accel;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static const struct iio_info dmard09_info = {
.read_raw = dmard09_read_raw,
};
static int dmard09_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard09_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
ret = i2c_smbus_read_byte_data(data->client, DMARD09_REG_CHIPID);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id %d\n", ret);
return ret;
}
if (ret != DMARD09_CHIPID) {
dev_err(&client->dev, "Invalid chip id %d\n", ret);
return -ENODEV;
}
i2c_set_clientdata(client, indio_dev);
indio_dev->name = DMARD09_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard09_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard09_channels);
indio_dev->info = &dmard09_info;
return devm_iio_device_register(&client->dev, indio_dev);
}
static const struct i2c_device_id dmard09_id[] = {
{ .name = "dmard09" },
{ }
};
MODULE_DEVICE_TABLE(i2c, dmard09_id);
static struct i2c_driver dmard09_driver = {
.driver = {
.name = DMARD09_DRV_NAME
},
.probe = dmard09_probe,
.id_table = dmard09_id,
};
module_i2c_driver(dmard09_driver);
MODULE_AUTHOR("Jelle van der Waa <jelle@vdwaa.nl>");
MODULE_DESCRIPTION("DMARD09 3-axis accelerometer driver");
MODULE_LICENSE("GPL");
linux-7.2.3/drivers/iio/accel/dmard10.c
+250
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// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO driver for the 3-axis accelerometer Domintech ARD10.
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
* Copyright (c) 2012 Domintech Technology Co., Ltd
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/byteorder/generic.h>
#define DMARD10_REG_ACTR 0x00
#define DMARD10_REG_AFEM 0x0c
#define DMARD10_REG_STADR 0x12
#define DMARD10_REG_STAINT 0x1c
#define DMARD10_REG_MISC2 0x1f
#define DMARD10_REG_PD 0x21
#define DMARD10_MODE_OFF 0x00
#define DMARD10_MODE_STANDBY 0x02
#define DMARD10_MODE_ACTIVE 0x06
#define DMARD10_MODE_READ_OTP 0x12
#define DMARD10_MODE_RESET_DATA_PATH 0x82
/* AFEN set 1, ATM[2:0]=b'000 (normal), EN_Z/Y/X/T=1 */
#define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f
/* ODR[3:0]=b'0111 (100Hz), CCK[3:0]=b'0100 (204.8kHZ) */
#define DMARD10_VALUE_CKSEL_ODR_100_204 0x74
/* INTC[6:5]=b'00 */
#define DMARD10_VALUE_INTC 0x00
/* TAP1/TAP2 Average 2 */
#define DMARD10_VALUE_TAPNS_AVE_2 0x11
#define DMARD10_VALUE_STADR 0x55
#define DMARD10_VALUE_STAINT 0xaa
#define DMARD10_VALUE_MISC2_OSCA_EN 0x08
#define DMARD10_VALUE_PD_RST 0x52
/* Offsets into the buffer read in dmard10_read_raw() */
#define DMARD10_X_OFFSET 1
#define DMARD10_Y_OFFSET 2
#define DMARD10_Z_OFFSET 3
/*
* a value of + or -128 corresponds to + or - 1G
* scale = 9.81 / 128 = 0.076640625
*/
static const int dmard10_nscale = 76640625;
#define DMARD10_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec dmard10_channels[] = {
DMARD10_CHANNEL(DMARD10_X_OFFSET, X),
DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y),
DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z),
};
struct dmard10_data {
struct i2c_client *client;
};
/* Init sequence taken from the android driver */
static int dmard10_reset(struct i2c_client *client)
{
unsigned char buffer[7];
int ret;
/* 1. Powerdown reset */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD,
DMARD10_VALUE_PD_RST);
if (ret < 0)
return ret;
/*
* 2. ACTR => Standby mode => Download OTP to parameter reg =>
* Standby mode => Reset data path => Standby mode
*/
buffer[0] = DMARD10_REG_ACTR;
buffer[1] = DMARD10_MODE_STANDBY;
buffer[2] = DMARD10_MODE_READ_OTP;
buffer[3] = DMARD10_MODE_STANDBY;
buffer[4] = DMARD10_MODE_RESET_DATA_PATH;
buffer[5] = DMARD10_MODE_STANDBY;
ret = i2c_master_send(client, buffer, 6);
if (ret < 0)
return ret;
/* 3. OSCA_EN = 1, TSTO = b'000 (INT1 = normal, TEST0 = normal) */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2,
DMARD10_VALUE_MISC2_OSCA_EN);
if (ret < 0)
return ret;
/* 4. AFEN = 1 (AFE will powerdown after ADC) */
buffer[0] = DMARD10_REG_AFEM;
buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL;
buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204;
buffer[3] = DMARD10_VALUE_INTC;
buffer[4] = DMARD10_VALUE_TAPNS_AVE_2;
buffer[5] = 0x00; /* DLYC, no delay timing */
buffer[6] = 0x07; /* INTD=1 push-pull, INTA=1 active high, AUTOT=1 */
ret = i2c_master_send(client, buffer, 7);
if (ret < 0)
return ret;
/* 5. Activation mode */
ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR,
DMARD10_MODE_ACTIVE);
if (ret < 0)
return ret;
return 0;
}
/* Shutdown sequence taken from the android driver */
static int dmard10_shutdown(struct i2c_client *client)
{
unsigned char buffer[3];
buffer[0] = DMARD10_REG_ACTR;
buffer[1] = DMARD10_MODE_STANDBY;
buffer[2] = DMARD10_MODE_OFF;
return i2c_master_send(client, buffer, 3);
}
static int dmard10_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct dmard10_data *data = iio_priv(indio_dev);
__le16 buf[4];
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* Read 8 bytes starting at the REG_STADR register, trying to
* read the individual X, Y, Z registers will always read 0.
*/
ret = i2c_smbus_read_i2c_block_data(data->client,
DMARD10_REG_STADR,
sizeof(buf), (u8 *)buf);
if (ret < 0)
return ret;
ret = le16_to_cpu(buf[chan->address]);
*val = sign_extend32(ret, 12);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = dmard10_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info dmard10_info = {
.read_raw = dmard10_read_raw,
};
static void dmard10_shutdown_cleanup(void *client)
{
dmard10_shutdown(client);
}
static int dmard10_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct dmard10_data *data;
/* These 2 registers have special POR reset values used for id */
ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR);
if (ret != DMARD10_VALUE_STADR)
return (ret < 0) ? ret : -ENODEV;
ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT);
if (ret != DMARD10_VALUE_STAINT)
return (ret < 0) ? ret : -ENODEV;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
indio_dev->info = &dmard10_info;
indio_dev->name = "dmard10";
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = dmard10_channels;
indio_dev->num_channels = ARRAY_SIZE(dmard10_channels);
ret = dmard10_reset(client);
if (ret < 0)
return ret;
ret = devm_add_action_or_reset(&client->dev, dmard10_shutdown_cleanup,
client);
if (ret)
return ret;
return devm_iio_device_register(&client->dev, indio_dev);
}
static int dmard10_suspend(struct device *dev)
{
return dmard10_shutdown(to_i2c_client(dev));
}
static int dmard10_resume(struct device *dev)
{
return dmard10_reset(to_i2c_client(dev));
}
static DEFINE_SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend,
dmard10_resume);
static const struct i2c_device_id dmard10_i2c_id[] = {
{ .name = "dmard10" },
{ }
};
MODULE_DEVICE_TABLE(i2c, dmard10_i2c_id);
static struct i2c_driver dmard10_driver = {
.driver = {
.name = "dmard10",
.pm = pm_sleep_ptr(&dmard10_pm_ops),
},
.probe = dmard10_probe,
.id_table = dmard10_i2c_id,
};
module_i2c_driver(dmard10_driver);
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/fxls8962af-core.c
+1316
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/fxls8962af-i2c.c
+59
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@@ -0,0 +1,59 @@
// SPDX-License-Identifier: GPL-2.0
/*
* NXP FXLS8962AF/FXLS8964AF Accelerometer I2C Driver
*
* Copyright 2021 Connected Cars A/S
*/
#include <linux/dev_printk.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "fxls8962af.h"
static int fxls8962af_probe(struct i2c_client *client)
{
struct regmap *regmap;
regmap = devm_regmap_init_i2c(client, &fxls8962af_i2c_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to initialize i2c regmap\n");
return PTR_ERR(regmap);
}
return fxls8962af_core_probe(&client->dev, regmap, client->irq);
}
static const struct i2c_device_id fxls8962af_id[] = {
{ .name = "fxls8962af", .driver_data = fxls8962af },
{ .name = "fxls8964af", .driver_data = fxls8964af },
{ .name = "fxls8967af", .driver_data = fxls8967af },
{ .name = "fxls8974cf", .driver_data = fxls8974cf },
{ }
};
MODULE_DEVICE_TABLE(i2c, fxls8962af_id);
static const struct of_device_id fxls8962af_of_match[] = {
{ .compatible = "nxp,fxls8962af" },
{ .compatible = "nxp,fxls8964af" },
{ }
};
MODULE_DEVICE_TABLE(of, fxls8962af_of_match);
static struct i2c_driver fxls8962af_driver = {
.driver = {
.name = "fxls8962af_i2c",
.of_match_table = fxls8962af_of_match,
.pm = pm_ptr(&fxls8962af_pm_ops),
},
.probe = fxls8962af_probe,
.id_table = fxls8962af_id,
};
module_i2c_driver(fxls8962af_driver);
MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_FXLS8962AF");
linux-7.2.3/drivers/iio/accel/fxls8962af-spi.c
+57
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@@ -0,0 +1,57 @@
// SPDX-License-Identifier: GPL-2.0
/*
* NXP FXLS8962AF/FXLS8964AF Accelerometer SPI Driver
*
* Copyright 2021 Connected Cars A/S
*/
#include <linux/dev_printk.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include "fxls8962af.h"
static int fxls8962af_probe(struct spi_device *spi)
{
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &fxls8962af_spi_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
return fxls8962af_core_probe(&spi->dev, regmap, spi->irq);
}
static const struct of_device_id fxls8962af_spi_of_match[] = {
{ .compatible = "nxp,fxls8962af" },
{ .compatible = "nxp,fxls8964af" },
{ }
};
MODULE_DEVICE_TABLE(of, fxls8962af_spi_of_match);
static const struct spi_device_id fxls8962af_spi_id_table[] = {
{ "fxls8962af", fxls8962af },
{ "fxls8964af", fxls8964af },
{ }
};
MODULE_DEVICE_TABLE(spi, fxls8962af_spi_id_table);
static struct spi_driver fxls8962af_driver = {
.driver = {
.name = "fxls8962af_spi",
.pm = pm_ptr(&fxls8962af_pm_ops),
.of_match_table = fxls8962af_spi_of_match,
},
.probe = fxls8962af_probe,
.id_table = fxls8962af_spi_id_table,
};
module_spi_driver(fxls8962af_driver);
MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_FXLS8962AF");
linux-7.2.3/drivers/iio/accel/fxls8962af.h
+24
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@@ -0,0 +1,24 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2021 Connected Cars A/S
*/
#ifndef _FXLS8962AF_H_
#define _FXLS8962AF_H_
struct regmap;
struct device;
enum {
fxls8962af,
fxls8964af,
fxls8967af,
fxls8974cf,
};
int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq);
extern const struct dev_pm_ops fxls8962af_pm_ops;
extern const struct regmap_config fxls8962af_i2c_regmap_conf;
extern const struct regmap_config fxls8962af_spi_regmap_conf;
#endif /* _FXLS8962AF_H_ */
linux-7.2.3/drivers/iio/accel/hid-sensor-accel-3d.c
+451
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@@ -0,0 +1,451 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* HID Sensors Driver
* Copyright (c) 2012, Intel Corporation.
*/
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/hid-sensor-hub.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include "../common/hid-sensors/hid-sensor-trigger.h"
enum accel_3d_channel {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
ACCEL_3D_CHANNEL_MAX,
};
#define CHANNEL_SCAN_INDEX_TIMESTAMP ACCEL_3D_CHANNEL_MAX
struct accel_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info accel[ACCEL_3D_CHANNEL_MAX];
/* Ensure timestamp is naturally aligned */
struct {
u32 accel_val[3];
aligned_s64 timestamp;
} scan;
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
int64_t timestamp;
};
static const u32 accel_3d_addresses[ACCEL_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ACCEL_X_AXIS,
HID_USAGE_SENSOR_ACCEL_Y_AXIS,
HID_USAGE_SENSOR_ACCEL_Z_AXIS
};
static const u32 accel_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ACCELERATION,
};
/* Channel definitions */
static const struct iio_chan_spec accel_3d_channels[] = {
{
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_ACCEL,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP)
};
/* Channel definitions */
static const struct iio_chan_spec gravity_channels[] = {
{
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(CHANNEL_SCAN_INDEX_TIMESTAMP),
};
/* Channel read_raw handler */
static int accel_3d_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2,
long mask)
{
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int report_id = -1;
u32 address;
int ret_type;
s32 min;
struct hid_sensor_hub_device *hsdev =
accel_state->common_attributes.hsdev;
*val = 0;
*val2 = 0;
switch (mask) {
case IIO_CHAN_INFO_RAW:
hid_sensor_power_state(&accel_state->common_attributes, true);
report_id = accel_state->accel[chan->scan_index].report_id;
min = accel_state->accel[chan->scan_index].logical_minimum;
address = accel_3d_addresses[chan->scan_index];
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
accel_state->common_attributes.hsdev,
hsdev->usage, address, report_id,
SENSOR_HUB_SYNC,
min < 0);
else {
*val = 0;
hid_sensor_power_state(&accel_state->common_attributes,
false);
return -EINVAL;
}
hid_sensor_power_state(&accel_state->common_attributes, false);
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
*val = accel_state->scale_pre_decml;
*val2 = accel_state->scale_post_decml;
ret_type = accel_state->scale_precision;
break;
case IIO_CHAN_INFO_OFFSET:
*val = accel_state->value_offset;
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SAMP_FREQ:
ret_type = hid_sensor_read_samp_freq_value(
&accel_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret_type = hid_sensor_read_raw_hyst_value(
&accel_state->common_attributes, val, val2);
break;
default:
ret_type = -EINVAL;
break;
}
return ret_type;
}
/* Channel write_raw handler */
static int accel_3d_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int ret = 0;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = hid_sensor_write_samp_freq_value(
&accel_state->common_attributes, val, val2);
break;
case IIO_CHAN_INFO_HYSTERESIS:
ret = hid_sensor_write_raw_hyst_value(
&accel_state->common_attributes, val, val2);
break;
default:
ret = -EINVAL;
}
return ret;
}
static const struct iio_info accel_3d_info = {
.read_raw = &accel_3d_read_raw,
.write_raw = &accel_3d_write_raw,
};
/* Function to push data to buffer */
static void hid_sensor_push_data(struct iio_dev *indio_dev, void *data,
int len, int64_t timestamp)
{
dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
iio_push_to_buffers_with_ts(indio_dev, data, len, timestamp);
}
/* Callback handler to send event after all samples are received and captured */
static int accel_3d_proc_event(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "accel_3d_proc_event\n");
if (atomic_read(&accel_state->common_attributes.data_ready)) {
if (!accel_state->timestamp)
accel_state->timestamp = iio_get_time_ns(indio_dev);
hid_sensor_push_data(indio_dev,
&accel_state->scan,
sizeof(accel_state->scan),
accel_state->timestamp);
accel_state->timestamp = 0;
}
return 0;
}
/* Capture samples in local storage */
static int accel_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
size_t raw_len, char *raw_data,
void *priv)
{
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
int offset;
int ret = -EINVAL;
switch (usage_id) {
case HID_USAGE_SENSOR_ACCEL_X_AXIS:
case HID_USAGE_SENSOR_ACCEL_Y_AXIS:
case HID_USAGE_SENSOR_ACCEL_Z_AXIS:
offset = usage_id - HID_USAGE_SENSOR_ACCEL_X_AXIS;
accel_state->scan.accel_val[CHANNEL_SCAN_INDEX_X + offset] =
*(u32 *)raw_data;
ret = 0;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
accel_state->timestamp =
hid_sensor_convert_timestamp(
&accel_state->common_attributes,
*(int64_t *)raw_data);
ret = 0;
break;
default:
break;
}
return ret;
}
/* Parse report which is specific to an usage id*/
static int accel_3d_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
struct iio_chan_spec *channels,
unsigned usage_id,
struct accel_3d_state *st)
{
int ret;
for (unsigned int ch = CHANNEL_SCAN_INDEX_X; ch <= CHANNEL_SCAN_INDEX_Z; ch++) {
ret = sensor_hub_input_get_attribute_info(hsdev,
HID_INPUT_REPORT,
usage_id,
HID_USAGE_SENSOR_ACCEL_X_AXIS + ch,
&st->accel[ch]);
if (ret < 0)
break;
channels[ch].scan_type = (struct iio_scan_type) {
.format = 's',
.realbits = BYTES_TO_BITS(st->accel[ch].size),
.storagebits = BITS_PER_TYPE(u32),
};
}
dev_dbg(&pdev->dev, "accel_3d %x:%x, %x:%x, %x:%x\n",
st->accel[0].index,
st->accel[0].report_id,
st->accel[1].index, st->accel[1].report_id,
st->accel[2].index, st->accel[2].report_id);
st->scale_precision = hid_sensor_format_scale(
hsdev->usage,
&st->accel[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml, &st->scale_post_decml);
return ret;
}
/* Function to initialize the processing for usage id */
static int hid_accel_3d_probe(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = dev_get_platdata(&pdev->dev);
int ret = 0;
const char *name;
struct iio_dev *indio_dev;
struct accel_3d_state *accel_state;
const struct iio_chan_spec *channel_spec;
int channel_size;
indio_dev = devm_iio_device_alloc(&pdev->dev,
sizeof(struct accel_3d_state));
if (indio_dev == NULL)
return -ENOMEM;
platform_set_drvdata(pdev, indio_dev);
accel_state = iio_priv(indio_dev);
accel_state->common_attributes.hsdev = hsdev;
accel_state->common_attributes.pdev = pdev;
if (hsdev->usage == HID_USAGE_SENSOR_ACCEL_3D) {
name = "accel_3d";
channel_spec = accel_3d_channels;
channel_size = sizeof(accel_3d_channels);
indio_dev->num_channels = ARRAY_SIZE(accel_3d_channels);
} else {
name = "gravity";
channel_spec = gravity_channels;
channel_size = sizeof(gravity_channels);
indio_dev->num_channels = ARRAY_SIZE(gravity_channels);
}
ret = hid_sensor_parse_common_attributes(hsdev,
hsdev->usage,
&accel_state->common_attributes,
accel_3d_sensitivity_addresses,
ARRAY_SIZE(accel_3d_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->channels = devm_kmemdup(&pdev->dev, channel_spec,
channel_size, GFP_KERNEL);
if (!indio_dev->channels) {
dev_err(&pdev->dev, "failed to duplicate channels\n");
return -ENOMEM;
}
ret = accel_3d_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
hsdev->usage, accel_state);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
return ret;
}
indio_dev->info = &accel_3d_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
atomic_set(&accel_state->common_attributes.data_ready, 0);
ret = hid_sensor_setup_trigger(indio_dev, name,
&accel_state->common_attributes);
if (ret < 0) {
dev_err(&pdev->dev, "trigger setup failed\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&pdev->dev, "device register failed\n");
goto error_remove_trigger;
}
accel_state->callbacks.send_event = accel_3d_proc_event;
accel_state->callbacks.capture_sample = accel_3d_capture_sample;
accel_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, hsdev->usage,
&accel_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
goto error_iio_unreg;
}
return ret;
error_iio_unreg:
iio_device_unregister(indio_dev);
error_remove_trigger:
hid_sensor_remove_trigger(indio_dev, &accel_state->common_attributes);
return ret;
}
/* Function to deinitialize the processing for usage id */
static void hid_accel_3d_remove(struct platform_device *pdev)
{
struct hid_sensor_hub_device *hsdev = dev_get_platdata(&pdev->dev);
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, hsdev->usage);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(indio_dev, &accel_state->common_attributes);
}
static const struct platform_device_id hid_accel_3d_ids[] = {
{
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200073",
},
{ /* gravity sensor */
.name = "HID-SENSOR-20007b",
},
{ }
};
MODULE_DEVICE_TABLE(platform, hid_accel_3d_ids);
static struct platform_driver hid_accel_3d_platform_driver = {
.id_table = hid_accel_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.pm = &hid_sensor_pm_ops,
},
.probe = hid_accel_3d_probe,
.remove = hid_accel_3d_remove,
};
module_platform_driver(hid_accel_3d_platform_driver);
MODULE_DESCRIPTION("HID Sensor Accel 3D");
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@intel.com>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_HID");
linux-7.2.3/drivers/iio/accel/kionix-kx022a-i2c.c
+72
View File
@@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX accelerometer driver
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "kionix-kx022a.h"
static int kx022a_i2c_probe(struct i2c_client *i2c)
{
struct device *dev = &i2c->dev;
const struct kx022a_chip_info *chip_info;
struct regmap *regmap;
if (!i2c->irq) {
dev_err(dev, "No IRQ configured\n");
return -EINVAL;
}
chip_info = i2c_get_match_data(i2c);
if (!chip_info)
return -EINVAL;
regmap = devm_regmap_init_i2c(i2c, chip_info->regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"Failed to initialize Regmap\n");
return kx022a_probe_internal(dev, chip_info);
}
static const struct i2c_device_id kx022a_i2c_id[] = {
{ .name = "kx022a", .driver_data = (kernel_ulong_t)&kx022a_chip_info },
{ .name = "kx132-1211", .driver_data = (kernel_ulong_t)&kx132_chip_info },
{ .name = "kx134-1211", .driver_data = (kernel_ulong_t)&kx134_chip_info },
{ .name = "kx132acr-lbz", .driver_data = (kernel_ulong_t)&kx132acr_chip_info },
{ .name = "kx134acr-lbz", .driver_data = (kernel_ulong_t)&kx134acr_chip_info },
{ }
};
MODULE_DEVICE_TABLE(i2c, kx022a_i2c_id);
static const struct of_device_id kx022a_of_match[] = {
{ .compatible = "kionix,kx022a", .data = &kx022a_chip_info },
{ .compatible = "kionix,kx132-1211", .data = &kx132_chip_info },
{ .compatible = "kionix,kx134-1211", .data = &kx134_chip_info },
{ .compatible = "rohm,kx132acr-lbz", .data = &kx132acr_chip_info },
{ .compatible = "rohm,kx134acr-lbz", .data = &kx134acr_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, kx022a_of_match);
static struct i2c_driver kx022a_i2c_driver = {
.driver = {
.name = "kx022a-i2c",
.of_match_table = kx022a_of_match,
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
.probe = kx022a_i2c_probe,
.id_table = kx022a_i2c_id,
};
module_i2c_driver(kx022a_i2c_driver);
MODULE_DESCRIPTION("ROHM/Kionix KX022A accelerometer driver");
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_KX022A");
linux-7.2.3/drivers/iio/accel/kionix-kx022a-spi.c
+72
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@@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX accelerometer driver
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "kionix-kx022a.h"
static int kx022a_spi_probe(struct spi_device *spi)
{
struct device *dev = &spi->dev;
const struct kx022a_chip_info *chip_info;
struct regmap *regmap;
if (!spi->irq) {
dev_err(dev, "No IRQ configured\n");
return -EINVAL;
}
chip_info = spi_get_device_match_data(spi);
if (!chip_info)
return -EINVAL;
regmap = devm_regmap_init_spi(spi, chip_info->regmap_config);
if (IS_ERR(regmap))
return dev_err_probe(dev, PTR_ERR(regmap),
"Failed to initialize Regmap\n");
return kx022a_probe_internal(dev, chip_info);
}
static const struct spi_device_id kx022a_id[] = {
{ .name = "kx022a", .driver_data = (kernel_ulong_t)&kx022a_chip_info },
{ .name = "kx132-1211", .driver_data = (kernel_ulong_t)&kx132_chip_info },
{ .name = "kx134-1211", .driver_data = (kernel_ulong_t)&kx134_chip_info },
{ .name = "kx132acr-lbz", .driver_data = (kernel_ulong_t)&kx132acr_chip_info },
{ .name = "kx134acr-lbz", .driver_data = (kernel_ulong_t)&kx134acr_chip_info },
{ }
};
MODULE_DEVICE_TABLE(spi, kx022a_id);
static const struct of_device_id kx022a_of_match[] = {
{ .compatible = "kionix,kx022a", .data = &kx022a_chip_info },
{ .compatible = "kionix,kx132-1211", .data = &kx132_chip_info },
{ .compatible = "kionix,kx134-1211", .data = &kx134_chip_info },
{ .compatible = "rohm,kx132acr-lbz", .data = &kx132acr_chip_info },
{ .compatible = "rohm,kx134acr-lbz", .data = &kx134acr_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, kx022a_of_match);
static struct spi_driver kx022a_spi_driver = {
.driver = {
.name = "kx022a-spi",
.of_match_table = kx022a_of_match,
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
.probe = kx022a_spi_probe,
.id_table = kx022a_id,
};
module_spi_driver(kx022a_spi_driver);
MODULE_DESCRIPTION("ROHM/Kionix kx022A accelerometer driver");
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_KX022A");
linux-7.2.3/drivers/iio/accel/kionix-kx022a.c
+1456
View File
File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/kionix-kx022a.h
+206
View File
@@ -0,0 +1,206 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2022 ROHM Semiconductors
*
* ROHM/KIONIX KX022A accelerometer driver
*/
#ifndef _KX022A_H_
#define _KX022A_H_
#include <linux/bits.h>
#include <linux/regmap.h>
#define KX022A_REG_WHO 0x0f
#define KX022A_ID 0xc8
#define KX132ACR_LBZ_ID 0xd8
#define KX134ACR_LBZ_ID 0xcc
#define KX022A_REG_CNTL2 0x19
#define KX022A_MASK_SRST BIT(7)
#define KX022A_REG_CNTL 0x18
#define KX022A_MASK_PC1 BIT(7)
#define KX022A_MASK_RES BIT(6)
#define KX022A_MASK_DRDY BIT(5)
#define KX022A_MASK_GSEL GENMASK(4, 3)
#define KX022A_GSEL_SHIFT 3
#define KX022A_GSEL_2 0x0
#define KX022A_GSEL_4 BIT(3)
#define KX022A_GSEL_8 BIT(4)
#define KX022A_GSEL_16 GENMASK(4, 3)
#define KX022A_REG_INS2 0x13
#define KX022A_MASK_INS2_DRDY BIT(4)
#define KX122_MASK_INS2_WMI BIT(5)
#define KX022A_REG_XHP_L 0x0
#define KX022A_REG_XOUT_L 0x06
#define KX022A_REG_YOUT_L 0x08
#define KX022A_REG_ZOUT_L 0x0a
#define KX022A_REG_COTR 0x0c
#define KX022A_REG_TSCP 0x10
#define KX022A_REG_INT_REL 0x17
#define KX022A_REG_ODCNTL 0x1b
#define KX022A_REG_BTS_WUF_TH 0x31
#define KX022A_REG_MAN_WAKE 0x2c
#define KX022A_REG_BUF_CNTL1 0x3a
#define KX022A_MASK_WM_TH GENMASK(6, 0)
#define KX022A_REG_BUF_CNTL2 0x3b
#define KX022A_MASK_BUF_EN BIT(7)
#define KX022A_MASK_BRES16 BIT(6)
#define KX022A_REG_BUF_STATUS_1 0x3c
#define KX022A_REG_BUF_STATUS_2 0x3d
#define KX022A_REG_BUF_CLEAR 0x3e
#define KX022A_REG_BUF_READ 0x3f
#define KX022A_MASK_ODR GENMASK(3, 0)
#define KX022A_ODR_SHIFT 3
#define KX022A_FIFO_MAX_WMI_TH 41
#define KX022A_REG_INC1 0x1c
#define KX022A_REG_INC5 0x20
#define KX022A_REG_INC6 0x21
#define KX022A_MASK_IEN BIT(5)
#define KX022A_MASK_IPOL BIT(4)
#define KX022A_IPOL_LOW 0
#define KX022A_IPOL_HIGH KX022A_MASK_IPOL1
#define KX022A_MASK_ITYP BIT(3)
#define KX022A_ITYP_PULSE KX022A_MASK_ITYP
#define KX022A_ITYP_LEVEL 0
#define KX022A_REG_INC4 0x1f
#define KX022A_MASK_WMI BIT(5)
#define KX022A_REG_SELF_TEST 0x60
#define KX022A_MAX_REGISTER 0x60
#define KX132_REG_WHO 0x13
#define KX132_ID 0x3d
#define KX134_1211_ID 0x46
#define KX132_FIFO_LENGTH 86
#define KX132_REG_CNTL 0x1b
#define KX132_REG_CNTL2 0x1c
#define KX132_REG_CNTL5 0x1f
#define KX132_MASK_RES BIT(6)
#define KX132_GSEL_2 0x0
#define KX132_GSEL_4 BIT(3)
#define KX132_GSEL_8 BIT(4)
#define KX132_GSEL_16 GENMASK(4, 3)
#define KX132_REG_INS2 0x17
#define KX132_MASK_INS2_WMI BIT(5)
#define KX132_REG_XADP_L 0x02
#define KX132_REG_XOUT_L 0x08
#define KX132_REG_YOUT_L 0x0a
#define KX132_REG_ZOUT_L 0x0c
#define KX132_REG_COTR 0x12
#define KX132_REG_TSCP 0x14
#define KX132_REG_INT_REL 0x1a
#define KX132_REG_ODCNTL 0x21
#define KX132_REG_BTS_WUF_TH 0x4a
#define KX132_REG_BUF_CNTL1 0x5e
#define KX132_REG_BUF_CNTL2 0x5f
#define KX132_REG_BUF_STATUS_1 0x60
#define KX132_REG_BUF_STATUS_2 0x61
#define KX132_MASK_BUF_SMP_LVL GENMASK(9, 0)
#define KX132_REG_BUF_CLEAR 0x62
#define KX132_REG_BUF_READ 0x63
#define KX132_ODR_SHIFT 3
#define KX132_FIFO_MAX_WMI_TH 86
#define KX132_REG_INC1 0x22
#define KX132_REG_INC5 0x26
#define KX132_REG_INC6 0x27
#define KX132_IPOL_LOW 0
#define KX132_IPOL_HIGH KX022A_MASK_IPOL
#define KX132_ITYP_PULSE KX022A_MASK_ITYP
#define KX132_REG_INC4 0x25
#define KX132_REG_SELF_TEST 0x5d
#define KX132_MAX_REGISTER 0x76
struct device;
struct kx022a_data;
/**
* struct kx022a_chip_info - Kionix accelerometer chip specific information
*
* @name: name of the device
* @regmap_config: pointer to register map configuration
* @scale_table: An array of tables of scaling factors for
* a supported acceleration measurement range.
* Each table containing a single scaling
* factor consisting of two integers. The first
* value in a table is the integer part, and
* the second value is the fractional part as
* parts per billion.
* @scale_table_size: Amount of values in tables.
* @channels: pointer to iio_chan_spec array
* @num_channels: number of iio_chan_spec channels
* @fifo_length: number of 16-bit samples in a full buffer
* @buf_smp_lvl_mask: buffer sample level mask
* @who: WHO_AM_I register
* @id: WHO_AM_I register value
* @cntl: control register 1
* @cntl2: control register 2
* @odcntl: output data control register
* @buf_cntl1: buffer control register 1
* @buf_cntl2: buffer control register 2
* @buf_clear: buffer clear register
* @buf_status1: buffer status register 1
* @buf_read: buffer read register
* @inc1: interrupt control register 1
* @inc4: interrupt control register 4
* @inc5: interrupt control register 5
* @inc6: interrupt control register 6
* @xout_l: x-axis output least significant byte
* @get_fifo_bytes_available: function pointer to get amount of acceleration
* data bytes currently stored in the sensor's FIFO
* buffer
*/
struct kx022a_chip_info {
const char *name;
const struct regmap_config *regmap_config;
const int (*scale_table)[2];
const int scale_table_size;
const struct iio_chan_spec *channels;
unsigned int num_channels;
unsigned int fifo_length;
u16 buf_smp_lvl_mask;
u8 who;
u8 id;
u8 cntl;
u8 cntl2;
u8 odcntl;
u8 buf_cntl1;
u8 buf_cntl2;
u8 buf_clear;
u8 buf_status1;
u8 buf_read;
u8 inc1;
u8 inc4;
u8 inc5;
u8 inc6;
u8 xout_l;
int (*get_fifo_bytes_available)(struct kx022a_data *);
};
int kx022a_probe_internal(struct device *dev, const struct kx022a_chip_info *chip_info);
extern const struct kx022a_chip_info kx022a_chip_info;
extern const struct kx022a_chip_info kx132_chip_info;
extern const struct kx022a_chip_info kx134_chip_info;
extern const struct kx022a_chip_info kx132acr_chip_info;
extern const struct kx022a_chip_info kx134acr_chip_info;
#endif
linux-7.2.3/drivers/iio/accel/kxcjk-1013.c
+1684
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/kxsd9-i2c.c
+64
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@@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/regmap.h>
#include "kxsd9.h"
static int kxsd9_i2c_probe(struct i2c_client *i2c)
{
static const struct regmap_config config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x0e,
};
struct regmap *regmap;
regmap = devm_regmap_init_i2c(i2c, &config);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return kxsd9_common_probe(&i2c->dev,
regmap,
i2c->name);
}
static void kxsd9_i2c_remove(struct i2c_client *client)
{
kxsd9_common_remove(&client->dev);
}
static const struct of_device_id kxsd9_of_match[] = {
{ .compatible = "kionix,kxsd9", },
{ }
};
MODULE_DEVICE_TABLE(of, kxsd9_of_match);
static const struct i2c_device_id kxsd9_i2c_id[] = {
{ .name = "kxsd9" },
{ }
};
MODULE_DEVICE_TABLE(i2c, kxsd9_i2c_id);
static struct i2c_driver kxsd9_i2c_driver = {
.driver = {
.name = "kxsd9",
.of_match_table = kxsd9_of_match,
.pm = pm_ptr(&kxsd9_dev_pm_ops),
},
.probe = kxsd9_i2c_probe,
.remove = kxsd9_i2c_remove,
.id_table = kxsd9_i2c_id,
};
module_i2c_driver(kxsd9_i2c_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("KXSD9 accelerometer I2C interface");
MODULE_IMPORT_NS("IIO_KXSD9");
linux-7.2.3/drivers/iio/accel/kxsd9-spi.c
+65
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@@ -0,0 +1,65 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include "kxsd9.h"
static int kxsd9_spi_probe(struct spi_device *spi)
{
static const struct regmap_config config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x0e,
};
struct regmap *regmap;
spi->mode = SPI_MODE_0;
regmap = devm_regmap_init_spi(spi, &config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
__func__, PTR_ERR(regmap));
return PTR_ERR(regmap);
}
return kxsd9_common_probe(&spi->dev,
regmap,
spi_get_device_id(spi)->name);
}
static void kxsd9_spi_remove(struct spi_device *spi)
{
kxsd9_common_remove(&spi->dev);
}
static const struct spi_device_id kxsd9_spi_id[] = {
{"kxsd9", 0},
{ }
};
MODULE_DEVICE_TABLE(spi, kxsd9_spi_id);
static const struct of_device_id kxsd9_of_match[] = {
{ .compatible = "kionix,kxsd9" },
{ }
};
MODULE_DEVICE_TABLE(of, kxsd9_of_match);
static struct spi_driver kxsd9_spi_driver = {
.driver = {
.name = "kxsd9",
.pm = pm_ptr(&kxsd9_dev_pm_ops),
.of_match_table = kxsd9_of_match,
},
.probe = kxsd9_spi_probe,
.remove = kxsd9_spi_remove,
.id_table = kxsd9_spi_id,
};
module_spi_driver(kxsd9_spi_driver);
MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
MODULE_DESCRIPTION("Kionix KXSD9 SPI driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_KXSD9");
linux-7.2.3/drivers/iio/accel/kxsd9.c
+511
View File
@@ -0,0 +1,511 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* kxsd9.c simple support for the Kionix KXSD9 3D
* accelerometer.
*
* Copyright (c) 2008-2009 Jonathan Cameron <jic23@kernel.org>
*
* The i2c interface is very similar, so shouldn't be a problem once
* I have a suitable wire made up.
*
* TODO: Support the motion detector
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include "kxsd9.h"
#define KXSD9_REG_X 0x00
#define KXSD9_REG_Y 0x02
#define KXSD9_REG_Z 0x04
#define KXSD9_REG_AUX 0x06
#define KXSD9_REG_RESET 0x0a
#define KXSD9_REG_CTRL_C 0x0c
#define KXSD9_CTRL_C_FS_MASK 0x03
#define KXSD9_CTRL_C_FS_8G 0x00
#define KXSD9_CTRL_C_FS_6G 0x01
#define KXSD9_CTRL_C_FS_4G 0x02
#define KXSD9_CTRL_C_FS_2G 0x03
#define KXSD9_CTRL_C_MOT_LAT BIT(3)
#define KXSD9_CTRL_C_MOT_LEV BIT(4)
#define KXSD9_CTRL_C_LP_MASK 0xe0
#define KXSD9_CTRL_C_LP_NONE 0x00
#define KXSD9_CTRL_C_LP_2000HZC BIT(5)
#define KXSD9_CTRL_C_LP_2000HZB BIT(6)
#define KXSD9_CTRL_C_LP_2000HZA (BIT(5)|BIT(6))
#define KXSD9_CTRL_C_LP_1000HZ BIT(7)
#define KXSD9_CTRL_C_LP_500HZ (BIT(7)|BIT(5))
#define KXSD9_CTRL_C_LP_100HZ (BIT(7)|BIT(6))
#define KXSD9_CTRL_C_LP_50HZ (BIT(7)|BIT(6)|BIT(5))
#define KXSD9_REG_CTRL_B 0x0d
#define KXSD9_CTRL_B_CLK_HLD BIT(7)
#define KXSD9_CTRL_B_ENABLE BIT(6)
#define KXSD9_CTRL_B_ST BIT(5) /* Self-test */
#define KXSD9_REG_CTRL_A 0x0e
/**
* struct kxsd9_state - device related storage
* @dev: pointer to the parent device
* @map: regmap to the device
* @orientation: mounting matrix, flipped axis etc
* @regs: regulators for this device, VDD and IOVDD
* @scale: the current scaling setting
*/
struct kxsd9_state {
struct device *dev;
struct regmap *map;
struct iio_mount_matrix orientation;
struct regulator_bulk_data regs[2];
u8 scale;
};
#define KXSD9_SCALE_2G "0.011978"
#define KXSD9_SCALE_4G "0.023927"
#define KXSD9_SCALE_6G "0.035934"
#define KXSD9_SCALE_8G "0.047853"
/* reverse order */
static const int kxsd9_micro_scales[4] = { 47853, 35934, 23927, 11978 };
#define KXSD9_ZERO_G_OFFSET -2048
/*
* Regulator names
*/
static const char kxsd9_reg_vdd[] = "vdd";
static const char kxsd9_reg_iovdd[] = "iovdd";
static int kxsd9_write_scale(struct iio_dev *indio_dev, int micro)
{
int ret, i;
struct kxsd9_state *st = iio_priv(indio_dev);
bool foundit = false;
for (i = 0; i < 4; i++)
if (micro == kxsd9_micro_scales[i]) {
foundit = true;
break;
}
if (!foundit)
return -EINVAL;
ret = regmap_update_bits(st->map,
KXSD9_REG_CTRL_C,
KXSD9_CTRL_C_FS_MASK,
i);
if (ret < 0)
goto error_ret;
/* Cached scale when the sensor is powered down */
st->scale = i;
error_ret:
return ret;
}
static IIO_CONST_ATTR(accel_scale_available,
KXSD9_SCALE_2G " "
KXSD9_SCALE_4G " "
KXSD9_SCALE_6G " "
KXSD9_SCALE_8G);
static struct attribute *kxsd9_attributes[] = {
&iio_const_attr_accel_scale_available.dev_attr.attr,
NULL,
};
static int kxsd9_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
int ret = -EINVAL;
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_get_sync(st->dev);
if (mask == IIO_CHAN_INFO_SCALE) {
/* Check no integer component */
if (val)
ret = -EINVAL;
else
ret = kxsd9_write_scale(indio_dev, val2);
}
pm_runtime_put_autosuspend(st->dev);
return ret;
}
static int kxsd9_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
int ret = -EINVAL;
struct kxsd9_state *st = iio_priv(indio_dev);
unsigned int regval;
__be16 raw_val;
u16 nval;
pm_runtime_get_sync(st->dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_bulk_read(st->map, chan->address, &raw_val,
sizeof(raw_val));
if (ret)
goto error_ret;
nval = be16_to_cpu(raw_val);
/* Only 12 bits are valid */
nval >>= 4;
*val = nval;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_OFFSET:
/* This has a bias of -2048 */
*val = KXSD9_ZERO_G_OFFSET;
ret = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
ret = regmap_read(st->map,
KXSD9_REG_CTRL_C,
&regval);
if (ret < 0)
goto error_ret;
*val = 0;
*val2 = kxsd9_micro_scales[regval & KXSD9_CTRL_C_FS_MASK];
ret = IIO_VAL_INT_PLUS_MICRO;
break;
}
error_ret:
pm_runtime_put_autosuspend(st->dev);
return ret;
};
static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
{
const struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct kxsd9_state *st = iio_priv(indio_dev);
/*
* Ensure correct positioning and alignment of timestamp.
* No need to zero initialize as all elements written.
*/
struct {
__be16 chan[4];
aligned_s64 ts;
} hw_values;
int ret;
ret = regmap_bulk_read(st->map,
KXSD9_REG_X,
hw_values.chan,
sizeof(hw_values.chan));
if (ret) {
dev_err(st->dev, "error reading data: %d\n", ret);
goto out;
}
iio_push_to_buffers_with_ts(indio_dev, &hw_values, sizeof(hw_values),
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int kxsd9_buffer_preenable(struct iio_dev *indio_dev)
{
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_get_sync(st->dev);
return 0;
}
static int kxsd9_buffer_postdisable(struct iio_dev *indio_dev)
{
struct kxsd9_state *st = iio_priv(indio_dev);
pm_runtime_put_autosuspend(st->dev);
return 0;
}
static const struct iio_buffer_setup_ops kxsd9_buffer_setup_ops = {
.preenable = kxsd9_buffer_preenable,
.postdisable = kxsd9_buffer_postdisable,
};
static const struct iio_mount_matrix *
kxsd9_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct kxsd9_state *st = iio_priv(indio_dev);
return &st->orientation;
}
static const struct iio_chan_spec_ext_info kxsd9_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxsd9_get_mount_matrix),
{ }
};
#define KXSD9_ACCEL_CHAN(axis, index) \
{ \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_OFFSET), \
.ext_info = kxsd9_ext_info, \
.address = KXSD9_REG_##axis, \
.scan_index = index, \
.scan_type = { \
.sign = 'u', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_BE, \
}, \
}
static const struct iio_chan_spec kxsd9_channels[] = {
KXSD9_ACCEL_CHAN(X, 0),
KXSD9_ACCEL_CHAN(Y, 1),
KXSD9_ACCEL_CHAN(Z, 2),
{
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.indexed = 1,
.address = KXSD9_REG_AUX,
.scan_index = 3,
.scan_type = {
.sign = 'u',
.realbits = 12,
.storagebits = 16,
.shift = 4,
.endianness = IIO_BE,
},
},
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct attribute_group kxsd9_attribute_group = {
.attrs = kxsd9_attributes,
};
static int kxsd9_power_up(struct kxsd9_state *st)
{
int ret;
/* Enable the regulators */
ret = regulator_bulk_enable(ARRAY_SIZE(st->regs), st->regs);
if (ret) {
dev_err(st->dev, "Cannot enable regulators\n");
return ret;
}
/* Power up */
ret = regmap_write(st->map,
KXSD9_REG_CTRL_B,
KXSD9_CTRL_B_ENABLE);
if (ret)
return ret;
/*
* Set 1000Hz LPF, 2g fullscale, motion wakeup threshold 1g,
* latched wakeup
*/
ret = regmap_write(st->map,
KXSD9_REG_CTRL_C,
KXSD9_CTRL_C_LP_1000HZ |
KXSD9_CTRL_C_MOT_LEV |
KXSD9_CTRL_C_MOT_LAT |
st->scale);
if (ret)
return ret;
/*
* Power-up time depends on the LPF setting, but typ 15.9 ms, let's
* set 20 ms to allow for some slack.
*/
msleep(20);
return 0;
};
static int kxsd9_power_down(struct kxsd9_state *st)
{
int ret;
/*
* Set into low power mode - since there may be more users of the
* regulators this is the first step of the power saving: it will
* make sure we conserve power even if there are others users on the
* regulators.
*/
ret = regmap_clear_bits(st->map, KXSD9_REG_CTRL_B, KXSD9_CTRL_B_ENABLE);
if (ret)
return ret;
/* Disable the regulators */
ret = regulator_bulk_disable(ARRAY_SIZE(st->regs), st->regs);
if (ret) {
dev_err(st->dev, "Cannot disable regulators\n");
return ret;
}
return 0;
}
static const struct iio_info kxsd9_info = {
.read_raw = &kxsd9_read_raw,
.write_raw = &kxsd9_write_raw,
.attrs = &kxsd9_attribute_group,
};
/* Four channels apart from timestamp, scan mask = 0x0f */
static const unsigned long kxsd9_scan_masks[] = { 0xf, 0 };
int kxsd9_common_probe(struct device *dev,
struct regmap *map,
const char *name)
{
struct iio_dev *indio_dev;
struct kxsd9_state *st;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->dev = dev;
st->map = map;
indio_dev->channels = kxsd9_channels;
indio_dev->num_channels = ARRAY_SIZE(kxsd9_channels);
indio_dev->name = name;
indio_dev->info = &kxsd9_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->available_scan_masks = kxsd9_scan_masks;
/* Read the mounting matrix, if present */
ret = iio_read_mount_matrix(dev, &st->orientation);
if (ret)
return ret;
/* Fetch and turn on regulators */
st->regs[0].supply = kxsd9_reg_vdd;
st->regs[1].supply = kxsd9_reg_iovdd;
ret = devm_regulator_bulk_get(dev,
ARRAY_SIZE(st->regs),
st->regs);
if (ret) {
dev_err(dev, "Cannot get regulators\n");
return ret;
}
/* Default scaling */
st->scale = KXSD9_CTRL_C_FS_2G;
kxsd9_power_up(st);
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
kxsd9_trigger_handler,
&kxsd9_buffer_setup_ops);
if (ret) {
dev_err(dev, "triggered buffer setup failed\n");
goto err_power_down;
}
ret = iio_device_register(indio_dev);
if (ret)
goto err_cleanup_buffer;
dev_set_drvdata(dev, indio_dev);
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
* Set autosuspend to two orders of magnitude larger than the
* start-up time. 20ms start-up time means 2000ms autosuspend,
* i.e. 2 seconds.
*/
pm_runtime_set_autosuspend_delay(dev, 2000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
return 0;
err_cleanup_buffer:
iio_triggered_buffer_cleanup(indio_dev);
err_power_down:
kxsd9_power_down(st);
return ret;
}
EXPORT_SYMBOL_NS(kxsd9_common_probe, "IIO_KXSD9");
void kxsd9_common_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_get_sync(dev);
pm_runtime_put_noidle(dev);
pm_runtime_disable(dev);
kxsd9_power_down(st);
}
EXPORT_SYMBOL_NS(kxsd9_common_remove, "IIO_KXSD9");
static int kxsd9_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
return kxsd9_power_down(st);
}
static int kxsd9_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct kxsd9_state *st = iio_priv(indio_dev);
return kxsd9_power_up(st);
}
EXPORT_NS_RUNTIME_DEV_PM_OPS(kxsd9_dev_pm_ops, kxsd9_runtime_suspend,
kxsd9_runtime_resume, NULL, IIO_KXSD9);
MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
MODULE_DESCRIPTION("Kionix KXSD9 driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/kxsd9.h
+13
View File
@@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/device.h>
#include <linux/kernel.h>
#define KXSD9_STATE_RX_SIZE 2
#define KXSD9_STATE_TX_SIZE 2
int kxsd9_common_probe(struct device *dev,
struct regmap *map,
const char *name);
void kxsd9_common_remove(struct device *dev);
extern const struct dev_pm_ops kxsd9_dev_pm_ops;
linux-7.2.3/drivers/iio/accel/mc3230.c
+261
View File
@@ -0,0 +1,261 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mCube MC3230 3-Axis Accelerometer
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
*
* IIO driver for mCube MC3230; 7-bit I2C address: 0x4c.
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define MC3230_REG_XOUT 0x00
#define MC3230_REG_YOUT 0x01
#define MC3230_REG_ZOUT 0x02
#define MC3230_REG_MODE 0x07
#define MC3230_MODE_OPCON_MASK 0x03
#define MC3230_MODE_OPCON_WAKE 0x01
#define MC3230_MODE_OPCON_STANDBY 0x03
#define MC3230_REG_CHIP_ID 0x18
#define MC3230_REG_PRODUCT_CODE 0x3b
/*
* The accelerometer has one measurement range:
*
* -1.5g - +1.5g (8-bit, signed)
*
*/
struct mc3230_chip_info {
const char *name;
const u8 chip_id;
const u8 product_code;
const int scale;
};
static const struct mc3230_chip_info mc3230_chip_info = {
.name = "mc3230",
.chip_id = 0x01,
.product_code = 0x19,
/* (1.5 + 1.5) * 9.81 / (2^8 - 1) = 0.115411765 */
.scale = 115411765,
};
static const struct mc3230_chip_info mc3510c_chip_info = {
.name = "mc3510c",
.chip_id = 0x23,
.product_code = 0x10,
/* Was obtained empirically */
.scale = 625000000,
};
#define MC3230_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.ext_info = mc3230_ext_info, \
}
struct mc3230_data {
const struct mc3230_chip_info *chip_info;
struct i2c_client *client;
struct iio_mount_matrix orientation;
};
static const struct iio_mount_matrix *
mc3230_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mc3230_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info mc3230_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, mc3230_get_mount_matrix),
{ }
};
static const struct iio_chan_spec mc3230_channels[] = {
MC3230_CHANNEL(MC3230_REG_XOUT, X),
MC3230_CHANNEL(MC3230_REG_YOUT, Y),
MC3230_CHANNEL(MC3230_REG_ZOUT, Z),
};
static int mc3230_set_opcon(struct mc3230_data *data, int opcon)
{
int ret;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_byte_data(client, MC3230_REG_MODE);
if (ret < 0) {
dev_err(&client->dev, "failed to read mode reg: %d\n", ret);
return ret;
}
ret &= ~MC3230_MODE_OPCON_MASK;
ret |= opcon;
ret = i2c_smbus_write_byte_data(client, MC3230_REG_MODE, ret);
if (ret < 0) {
dev_err(&client->dev, "failed to write mode reg: %d\n", ret);
return ret;
}
return 0;
}
static int mc3230_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mc3230_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_byte_data(data->client, chan->address);
if (ret < 0)
return ret;
*val = sign_extend32(ret, 7);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = data->chip_info->scale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static const struct iio_info mc3230_info = {
.read_raw = mc3230_read_raw,
};
static int mc3230_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct mc3230_data *data;
const struct mc3230_chip_info *chip_info;
chip_info = i2c_get_match_data(client);
if (chip_info == NULL) {
dev_err(&client->dev, "failed to get match data");
return -ENODATA;
}
/* First check chip-id and product-id */
ret = i2c_smbus_read_byte_data(client, MC3230_REG_CHIP_ID);
if (ret != chip_info->chip_id) {
dev_info(&client->dev,
"chip id check fail: 0x%x != 0x%x !\n",
ret, chip_info->chip_id);
}
ret = i2c_smbus_read_byte_data(client, MC3230_REG_PRODUCT_CODE);
if (ret != chip_info->product_code) {
dev_info(&client->dev,
"product code check fail: 0x%x != 0x%x !\n",
ret, chip_info->product_code);
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->chip_info = chip_info;
data->client = client;
i2c_set_clientdata(client, indio_dev);
indio_dev->info = &mc3230_info;
indio_dev->name = chip_info->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mc3230_channels;
indio_dev->num_channels = ARRAY_SIZE(mc3230_channels);
ret = mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
if (ret < 0)
return ret;
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
if (ret)
return ret;
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
}
return ret;
}
static void mc3230_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
iio_device_unregister(indio_dev);
mc3230_set_opcon(iio_priv(indio_dev), MC3230_MODE_OPCON_STANDBY);
}
static int mc3230_suspend(struct device *dev)
{
struct mc3230_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
}
static int mc3230_resume(struct device *dev)
{
struct mc3230_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mc3230_pm_ops, mc3230_suspend, mc3230_resume);
static const struct i2c_device_id mc3230_i2c_id[] = {
{ .name = "mc3230", .driver_data = (kernel_ulong_t)&mc3230_chip_info },
{ .name = "mc3510c", .driver_data = (kernel_ulong_t)&mc3510c_chip_info },
{ }
};
MODULE_DEVICE_TABLE(i2c, mc3230_i2c_id);
static const struct of_device_id mc3230_of_match[] = {
{ .compatible = "mcube,mc3230", &mc3230_chip_info },
{ .compatible = "mcube,mc3510c", &mc3510c_chip_info },
{ }
};
MODULE_DEVICE_TABLE(of, mc3230_of_match);
static struct i2c_driver mc3230_driver = {
.driver = {
.name = "mc3230",
.of_match_table = mc3230_of_match,
.pm = pm_sleep_ptr(&mc3230_pm_ops),
},
.probe = mc3230_probe,
.remove = mc3230_remove,
.id_table = mc3230_i2c_id,
};
module_i2c_driver(mc3230_driver);
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_DESCRIPTION("mCube MC3230 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/mma7455.h
+16
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@@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* IIO accel driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
*/
#ifndef __MMA7455_H
#define __MMA7455_H
extern const struct regmap_config mma7455_core_regmap;
int mma7455_core_probe(struct device *dev, struct regmap *regmap,
const char *name);
void mma7455_core_remove(struct device *dev);
#endif
linux-7.2.3/drivers/iio/accel/mma7455_core.c
+315
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@@ -0,0 +1,315 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel core driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
*
* UNSUPPORTED hardware features:
* - 8-bit mode with different scales
* - INT1/INT2 interrupts
* - Offset calibration
* - Events
*/
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include "mma7455.h"
#define MMA7455_REG_XOUTL 0x00
#define MMA7455_REG_XOUTH 0x01
#define MMA7455_REG_YOUTL 0x02
#define MMA7455_REG_YOUTH 0x03
#define MMA7455_REG_ZOUTL 0x04
#define MMA7455_REG_ZOUTH 0x05
#define MMA7455_REG_STATUS 0x09
#define MMA7455_STATUS_DRDY BIT(0)
#define MMA7455_REG_WHOAMI 0x0f
#define MMA7455_WHOAMI_ID 0x55
#define MMA7455_REG_MCTL 0x16
#define MMA7455_MCTL_MODE_STANDBY 0x00
#define MMA7455_MCTL_MODE_MEASURE 0x01
#define MMA7455_REG_CTL1 0x18
#define MMA7455_CTL1_DFBW_MASK BIT(7)
#define MMA7455_CTL1_DFBW_125HZ BIT(7)
#define MMA7455_CTL1_DFBW_62_5HZ 0
#define MMA7455_REG_TW 0x1e
/*
* When MMA7455 is used in 10-bit it has a fullscale of -8g
* corresponding to raw value -512. The userspace interface
* uses m/s^2 and we declare micro units.
* So scale factor is given by:
* g * 8 * 1e6 / 512 = 153228.90625, with g = 9.80665
*/
#define MMA7455_10BIT_SCALE 153229
struct mma7455_data {
struct regmap *regmap;
/*
* Used to reorganize data. Will ensure correct alignment of
* the timestamp if present
*/
struct {
__le16 channels[3];
aligned_s64 ts;
} scan;
};
static int mma7455_drdy(struct mma7455_data *mma7455)
{
struct device *dev = regmap_get_device(mma7455->regmap);
unsigned int reg;
int tries = 3;
int ret;
while (tries-- > 0) {
ret = regmap_read(mma7455->regmap, MMA7455_REG_STATUS, &reg);
if (ret)
return ret;
if (reg & MMA7455_STATUS_DRDY)
return 0;
msleep(20);
}
dev_warn(dev, "data not ready\n");
return -EIO;
}
static irqreturn_t mma7455_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct mma7455_data *mma7455 = iio_priv(indio_dev);
int ret;
ret = mma7455_drdy(mma7455);
if (ret)
goto done;
ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL,
mma7455->scan.channels,
sizeof(mma7455->scan.channels));
if (ret)
goto done;
iio_push_to_buffers_with_ts(indio_dev, &mma7455->scan,
sizeof(mma7455->scan),
iio_get_time_ns(indio_dev));
done:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int mma7455_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma7455_data *mma7455 = iio_priv(indio_dev);
unsigned int reg;
__le16 data;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
ret = mma7455_drdy(mma7455);
if (ret)
return ret;
ret = regmap_bulk_read(mma7455->regmap, chan->address, &data,
sizeof(data));
if (ret)
return ret;
*val = sign_extend32(le16_to_cpu(data),
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = MMA7455_10BIT_SCALE;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = regmap_read(mma7455->regmap, MMA7455_REG_CTL1, &reg);
if (ret)
return ret;
if (reg & MMA7455_CTL1_DFBW_MASK)
*val = 250;
else
*val = 125;
return IIO_VAL_INT;
}
return -EINVAL;
}
static int mma7455_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mma7455_data *mma7455 = iio_priv(indio_dev);
int i;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val == 250 && val2 == 0)
i = MMA7455_CTL1_DFBW_125HZ;
else if (val == 125 && val2 == 0)
i = MMA7455_CTL1_DFBW_62_5HZ;
else
return -EINVAL;
return regmap_update_bits(mma7455->regmap, MMA7455_REG_CTL1,
MMA7455_CTL1_DFBW_MASK, i);
case IIO_CHAN_INFO_SCALE:
/* In 10-bit mode there is only one scale available */
if (val == 0 && val2 == MMA7455_10BIT_SCALE)
return 0;
break;
}
return -EINVAL;
}
static IIO_CONST_ATTR(sampling_frequency_available, "125 250");
static struct attribute *mma7455_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group mma7455_group = {
.attrs = mma7455_attributes,
};
static const struct iio_info mma7455_info = {
.attrs = &mma7455_group,
.read_raw = mma7455_read_raw,
.write_raw = mma7455_write_raw,
};
#define MMA7455_CHANNEL(axis, idx) { \
.type = IIO_ACCEL, \
.modified = 1, \
.address = MMA7455_REG_##axis##OUTL,\
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = idx, \
.scan_type = { \
.sign = 's', \
.realbits = 10, \
.storagebits = 16, \
.endianness = IIO_LE, \
}, \
}
static const struct iio_chan_spec mma7455_channels[] = {
MMA7455_CHANNEL(X, 0),
MMA7455_CHANNEL(Y, 1),
MMA7455_CHANNEL(Z, 2),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const unsigned long mma7455_scan_masks[] = {0x7, 0};
const struct regmap_config mma7455_core_regmap = {
.reg_bits = 8,
.val_bits = 8,
.max_register = MMA7455_REG_TW,
};
EXPORT_SYMBOL_NS_GPL(mma7455_core_regmap, "IIO_MMA7455");
int mma7455_core_probe(struct device *dev, struct regmap *regmap,
const char *name)
{
struct mma7455_data *mma7455;
struct iio_dev *indio_dev;
unsigned int reg;
int ret;
ret = regmap_read(regmap, MMA7455_REG_WHOAMI, &reg);
if (ret) {
dev_err(dev, "unable to read reg\n");
return ret;
}
if (reg != MMA7455_WHOAMI_ID) {
dev_err(dev, "device id mismatch\n");
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(dev, sizeof(*mma7455));
if (!indio_dev)
return -ENOMEM;
dev_set_drvdata(dev, indio_dev);
mma7455 = iio_priv(indio_dev);
mma7455->regmap = regmap;
indio_dev->info = &mma7455_info;
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mma7455_channels;
indio_dev->num_channels = ARRAY_SIZE(mma7455_channels);
indio_dev->available_scan_masks = mma7455_scan_masks;
regmap_write(mma7455->regmap, MMA7455_REG_MCTL,
MMA7455_MCTL_MODE_MEASURE);
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mma7455_trigger_handler, NULL);
if (ret) {
dev_err(dev, "unable to setup triggered buffer\n");
return ret;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(dev, "unable to register device\n");
iio_triggered_buffer_cleanup(indio_dev);
return ret;
}
return 0;
}
EXPORT_SYMBOL_NS_GPL(mma7455_core_probe, "IIO_MMA7455");
void mma7455_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct mma7455_data *mma7455 = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
regmap_write(mma7455->regmap, MMA7455_REG_MCTL,
MMA7455_MCTL_MODE_STANDBY);
}
EXPORT_SYMBOL_NS_GPL(mma7455_core_remove, "IIO_MMA7455");
MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
MODULE_DESCRIPTION("Freescale MMA7455L core accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/mma7455_i2c.c
+62
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@@ -0,0 +1,62 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel I2C driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include "mma7455.h"
static int mma7455_i2c_probe(struct i2c_client *i2c)
{
const struct i2c_device_id *id = i2c_client_get_device_id(i2c);
struct regmap *regmap;
const char *name = NULL;
regmap = devm_regmap_init_i2c(i2c, &mma7455_core_regmap);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
if (id)
name = id->name;
return mma7455_core_probe(&i2c->dev, regmap, name);
}
static void mma7455_i2c_remove(struct i2c_client *i2c)
{
mma7455_core_remove(&i2c->dev);
}
static const struct i2c_device_id mma7455_i2c_ids[] = {
{ .name = "mma7455" },
{ .name = "mma7456" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mma7455_i2c_ids);
static const struct of_device_id mma7455_of_match[] = {
{ .compatible = "fsl,mma7455" },
{ .compatible = "fsl,mma7456" },
{ }
};
MODULE_DEVICE_TABLE(of, mma7455_of_match);
static struct i2c_driver mma7455_i2c_driver = {
.probe = mma7455_i2c_probe,
.remove = mma7455_i2c_remove,
.id_table = mma7455_i2c_ids,
.driver = {
.name = "mma7455-i2c",
.of_match_table = mma7455_of_match,
},
};
module_i2c_driver(mma7455_i2c_driver);
MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
MODULE_DESCRIPTION("Freescale MMA7455L I2C accelerometer driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_MMA7455");
linux-7.2.3/drivers/iio/accel/mma7455_spi.c
+50
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@@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* IIO accel SPI driver for Freescale MMA7455L 3-axis 10-bit accelerometer
* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include "mma7455.h"
static int mma7455_spi_probe(struct spi_device *spi)
{
const struct spi_device_id *id = spi_get_device_id(spi);
struct regmap *regmap;
regmap = devm_regmap_init_spi(spi, &mma7455_core_regmap);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
return mma7455_core_probe(&spi->dev, regmap, id->name);
}
static void mma7455_spi_remove(struct spi_device *spi)
{
mma7455_core_remove(&spi->dev);
}
static const struct spi_device_id mma7455_spi_ids[] = {
{ "mma7455", 0 },
{ "mma7456", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, mma7455_spi_ids);
static struct spi_driver mma7455_spi_driver = {
.probe = mma7455_spi_probe,
.remove = mma7455_spi_remove,
.id_table = mma7455_spi_ids,
.driver = {
.name = "mma7455-spi",
},
};
module_spi_driver(mma7455_spi_driver);
MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
MODULE_DESCRIPTION("Freescale MMA7455L SPI accelerometer driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_MMA7455");
linux-7.2.3/drivers/iio/accel/mma7660.c
+295
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@@ -0,0 +1,295 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MMA7660FC 3-Axis Accelerometer
*
* Copyright (c) 2016, Intel Corporation.
*
* IIO driver for Freescale MMA7660FC; 7-bit I2C address: 0x4c.
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define MMA7660_DRIVER_NAME "mma7660"
#define MMA7660_REG_XOUT 0x00
#define MMA7660_REG_YOUT 0x01
#define MMA7660_REG_ZOUT 0x02
#define MMA7660_REG_OUT_BIT_ALERT BIT(6)
#define MMA7660_REG_MODE 0x07
#define MMA7660_REG_MODE_BIT_MODE BIT(0)
#define MMA7660_REG_MODE_BIT_TON BIT(2)
#define MMA7660_I2C_READ_RETRIES 5
/*
* The accelerometer has one measurement range:
*
* -1.5g - +1.5g (6-bit, signed)
*
* scale = (1.5 + 1.5) * 9.81 / (2^6 - 1) = 0.467142857
*/
#define MMA7660_SCALE_AVAIL "0.467142857"
static const int mma7660_nscale = 467142857;
enum mma7660_mode {
MMA7660_MODE_STANDBY,
MMA7660_MODE_ACTIVE
};
struct mma7660_data {
struct i2c_client *client;
struct mutex lock;
enum mma7660_mode mode;
struct iio_mount_matrix orientation;
};
static const struct iio_mount_matrix *
mma7660_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mma7660_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info mma7660_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, mma7660_get_mount_matrix),
{ }
};
static IIO_CONST_ATTR(in_accel_scale_available, MMA7660_SCALE_AVAIL);
static struct attribute *mma7660_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group mma7660_attribute_group = {
.attrs = mma7660_attributes
};
#define MMA7660_CHANNEL(reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.ext_info = mma7660_ext_info, \
}
static const struct iio_chan_spec mma7660_channels[] = {
MMA7660_CHANNEL(MMA7660_REG_XOUT, X),
MMA7660_CHANNEL(MMA7660_REG_YOUT, Y),
MMA7660_CHANNEL(MMA7660_REG_ZOUT, Z),
};
static int mma7660_set_mode(struct mma7660_data *data,
enum mma7660_mode mode)
{
int ret;
struct i2c_client *client = data->client;
if (mode == data->mode)
return 0;
ret = i2c_smbus_read_byte_data(client, MMA7660_REG_MODE);
if (ret < 0) {
dev_err(&client->dev, "failed to read sensor mode\n");
return ret;
}
if (mode == MMA7660_MODE_ACTIVE) {
ret &= ~MMA7660_REG_MODE_BIT_TON;
ret |= MMA7660_REG_MODE_BIT_MODE;
} else {
ret &= ~MMA7660_REG_MODE_BIT_TON;
ret &= ~MMA7660_REG_MODE_BIT_MODE;
}
ret = i2c_smbus_write_byte_data(client, MMA7660_REG_MODE, ret);
if (ret < 0) {
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
data->mode = mode;
return ret;
}
static int mma7660_read_accel(struct mma7660_data *data, u8 address)
{
int ret, retries = MMA7660_I2C_READ_RETRIES;
struct i2c_client *client = data->client;
/*
* Read data. If the Alert bit is set, the register was read at
* the same time as the device was attempting to update the content.
* The solution is to read the register again. Do this only
* MMA7660_I2C_READ_RETRIES times to avoid spending too much time
* in the kernel.
*/
do {
ret = i2c_smbus_read_byte_data(client, address);
if (ret < 0) {
dev_err(&client->dev, "register read failed\n");
return ret;
}
} while (retries-- > 0 && ret & MMA7660_REG_OUT_BIT_ALERT);
if (ret & MMA7660_REG_OUT_BIT_ALERT) {
dev_err(&client->dev, "all register read retries failed\n");
return -ETIMEDOUT;
}
return ret;
}
static int mma7660_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma7660_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->lock);
ret = mma7660_read_accel(data, chan->address);
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
*val = sign_extend32(ret, 5);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = mma7660_nscale;
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
return -EINVAL;
}
static const struct iio_info mma7660_info = {
.read_raw = mma7660_read_raw,
.attrs = &mma7660_attribute_group,
};
static int mma7660_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct mma7660_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
data->mode = MMA7660_MODE_STANDBY;
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
if (ret)
return ret;
indio_dev->info = &mma7660_info;
indio_dev->name = MMA7660_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = mma7660_channels;
indio_dev->num_channels = ARRAY_SIZE(mma7660_channels);
ret = mma7660_set_mode(data, MMA7660_MODE_ACTIVE);
if (ret < 0)
return ret;
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
mma7660_set_mode(data, MMA7660_MODE_STANDBY);
}
return ret;
}
static void mma7660_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
int ret;
iio_device_unregister(indio_dev);
ret = mma7660_set_mode(iio_priv(indio_dev), MMA7660_MODE_STANDBY);
if (ret)
dev_warn(&client->dev, "Failed to put device in stand-by mode (%pe), ignoring\n",
ERR_PTR(ret));
}
static int mma7660_suspend(struct device *dev)
{
struct mma7660_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mma7660_set_mode(data, MMA7660_MODE_STANDBY);
}
static int mma7660_resume(struct device *dev)
{
struct mma7660_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return mma7660_set_mode(data, MMA7660_MODE_ACTIVE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(mma7660_pm_ops, mma7660_suspend,
mma7660_resume);
static const struct i2c_device_id mma7660_i2c_id[] = {
{ .name = "mma7660" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mma7660_i2c_id);
static const struct of_device_id mma7660_of_match[] = {
{ .compatible = "fsl,mma7660" },
{ }
};
MODULE_DEVICE_TABLE(of, mma7660_of_match);
static const struct acpi_device_id mma7660_acpi_id[] = {
{"MMA7660", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, mma7660_acpi_id);
static struct i2c_driver mma7660_driver = {
.driver = {
.name = "mma7660",
.pm = pm_sleep_ptr(&mma7660_pm_ops),
.of_match_table = mma7660_of_match,
.acpi_match_table = mma7660_acpi_id,
},
.probe = mma7660_probe,
.remove = mma7660_remove,
.id_table = mma7660_i2c_id,
};
module_i2c_driver(mma7660_driver);
MODULE_AUTHOR("Constantin Musca <constantin.musca@intel.com>");
MODULE_DESCRIPTION("Freescale MMA7660FC 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/mma8452.c
+1855
View File
File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/mma9551.c
+607
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@@ -0,0 +1,607 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Freescale MMA9551L Intelligent Motion-Sensing Platform driver
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/pm_runtime.h>
#include "mma9551_core.h"
#define MMA9551_GPIO_COUNT 4
/* Tilt application (inclination in IIO terms). */
#define MMA9551_TILT_XZ_ANG_REG 0x00
#define MMA9551_TILT_YZ_ANG_REG 0x01
#define MMA9551_TILT_XY_ANG_REG 0x02
#define MMA9551_TILT_ANGFLG BIT(7)
#define MMA9551_TILT_QUAD_REG 0x03
#define MMA9551_TILT_XY_QUAD_SHIFT 0
#define MMA9551_TILT_YZ_QUAD_SHIFT 2
#define MMA9551_TILT_XZ_QUAD_SHIFT 4
#define MMA9551_TILT_CFG_REG 0x01
#define MMA9551_TILT_ANG_THRESH_MASK GENMASK(3, 0)
#define MMA9551_DEFAULT_SAMPLE_RATE 122 /* Hz */
/* Tilt events are mapped to the first three GPIO pins. */
enum mma9551_tilt_axis {
mma9551_x = 0,
mma9551_y,
mma9551_z,
};
struct mma9551_data {
struct i2c_client *client;
struct mutex mutex;
bool event_enabled[3];
int irqs[MMA9551_GPIO_COUNT];
};
static int mma9551_read_incli_chan(struct i2c_client *client,
const struct iio_chan_spec *chan,
int *val)
{
u8 quad_shift, angle, quadrant;
u16 reg_addr;
int ret;
switch (chan->channel2) {
case IIO_MOD_X:
reg_addr = MMA9551_TILT_YZ_ANG_REG;
quad_shift = MMA9551_TILT_YZ_QUAD_SHIFT;
break;
case IIO_MOD_Y:
reg_addr = MMA9551_TILT_XZ_ANG_REG;
quad_shift = MMA9551_TILT_XZ_QUAD_SHIFT;
break;
case IIO_MOD_Z:
reg_addr = MMA9551_TILT_XY_ANG_REG;
quad_shift = MMA9551_TILT_XY_QUAD_SHIFT;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(client, true);
if (ret < 0)
return ret;
ret = mma9551_read_status_byte(client, MMA9551_APPID_TILT,
reg_addr, &angle);
if (ret < 0)
goto out_poweroff;
ret = mma9551_read_status_byte(client, MMA9551_APPID_TILT,
MMA9551_TILT_QUAD_REG, &quadrant);
if (ret < 0)
goto out_poweroff;
angle &= ~MMA9551_TILT_ANGFLG;
quadrant = (quadrant >> quad_shift) & 0x03;
if (quadrant == 1 || quadrant == 3)
*val = 90 * (quadrant + 1) - angle;
else
*val = angle + 90 * quadrant;
ret = IIO_VAL_INT;
out_poweroff:
mma9551_set_power_state(client, false);
return ret;
}
static int mma9551_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_PROCESSED:
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_read_incli_chan(data->client, chan, val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ACCEL:
mutex_lock(&data->mutex);
ret = mma9551_read_accel_chan(data->client,
chan, val, val2);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_ACCEL:
return mma9551_read_accel_scale(val, val2);
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma9551_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
struct mma9551_data *data = iio_priv(indio_dev);
switch (chan->type) {
case IIO_INCLI:
/* IIO counts axes from 1, because IIO_NO_MOD is 0. */
return data->event_enabled[chan->channel2 - 1];
default:
return -EINVAL;
}
}
static int mma9551_config_incli_event(struct iio_dev *indio_dev,
enum iio_modifier axis,
bool state)
{
struct mma9551_data *data = iio_priv(indio_dev);
enum mma9551_tilt_axis mma_axis;
int ret;
/* IIO counts axes from 1, because IIO_NO_MOD is 0. */
mma_axis = axis - 1;
if (data->event_enabled[mma_axis] == state)
return 0;
if (!state) {
ret = mma9551_gpio_config(data->client,
(enum mma9551_gpio_pin)mma_axis,
MMA9551_APPID_NONE, 0, 0);
if (ret < 0)
return ret;
ret = mma9551_set_power_state(data->client, false);
if (ret < 0)
return ret;
} else {
int bitnum;
/* Bit 7 of each angle register holds the angle flag. */
switch (axis) {
case IIO_MOD_X:
bitnum = 7 + 8 * MMA9551_TILT_YZ_ANG_REG;
break;
case IIO_MOD_Y:
bitnum = 7 + 8 * MMA9551_TILT_XZ_ANG_REG;
break;
case IIO_MOD_Z:
bitnum = 7 + 8 * MMA9551_TILT_XY_ANG_REG;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(data->client, true);
if (ret < 0)
return ret;
ret = mma9551_gpio_config(data->client,
(enum mma9551_gpio_pin)mma_axis,
MMA9551_APPID_TILT, bitnum, 0);
if (ret < 0) {
mma9551_set_power_state(data->client, false);
return ret;
}
}
data->event_enabled[mma_axis] = state;
return ret;
}
static int mma9551_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
bool state)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_config_incli_event(indio_dev,
chan->channel2, state);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int mma9551_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int val, int val2)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
switch (chan->type) {
case IIO_INCLI:
if (val2 != 0 || val < 1 || val > 10)
return -EINVAL;
mutex_lock(&data->mutex);
ret = mma9551_update_config_bits(data->client,
MMA9551_APPID_TILT,
MMA9551_TILT_CFG_REG,
MMA9551_TILT_ANG_THRESH_MASK,
val);
mutex_unlock(&data->mutex);
return ret;
default:
return -EINVAL;
}
}
static int mma9551_read_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir,
enum iio_event_info info,
int *val, int *val2)
{
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
u8 tmp;
switch (chan->type) {
case IIO_INCLI:
mutex_lock(&data->mutex);
ret = mma9551_read_config_byte(data->client,
MMA9551_APPID_TILT,
MMA9551_TILT_CFG_REG, &tmp);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
*val = tmp & MMA9551_TILT_ANG_THRESH_MASK;
*val2 = 0;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static const struct iio_event_spec mma9551_incli_event = {
.type = IIO_EV_TYPE_ROC,
.dir = IIO_EV_DIR_RISING,
.mask_separate = BIT(IIO_EV_INFO_ENABLE),
.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
};
#define MMA9551_INCLI_CHANNEL(axis) { \
.type = IIO_INCLI, \
.modified = 1, \
.channel2 = axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
.event_spec = &mma9551_incli_event, \
.num_event_specs = 1, \
}
static const struct iio_chan_spec mma9551_channels[] = {
MMA9551_ACCEL_CHANNEL(IIO_MOD_X),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Y),
MMA9551_ACCEL_CHANNEL(IIO_MOD_Z),
MMA9551_INCLI_CHANNEL(IIO_MOD_X),
MMA9551_INCLI_CHANNEL(IIO_MOD_Y),
MMA9551_INCLI_CHANNEL(IIO_MOD_Z),
};
static const struct iio_info mma9551_info = {
.read_raw = mma9551_read_raw,
.read_event_config = mma9551_read_event_config,
.write_event_config = mma9551_write_event_config,
.read_event_value = mma9551_read_event_value,
.write_event_value = mma9551_write_event_value,
};
static irqreturn_t mma9551_event_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct mma9551_data *data = iio_priv(indio_dev);
int i, ret, mma_axis = -1;
u16 reg;
u8 val;
mutex_lock(&data->mutex);
for (i = 0; i < 3; i++)
if (irq == data->irqs[i]) {
mma_axis = i;
break;
}
if (mma_axis == -1) {
/* IRQ was triggered on 4th line, which we don't use. */
dev_warn(&data->client->dev,
"irq triggered on unused line %d\n", data->irqs[3]);
goto out;
}
switch (mma_axis) {
case mma9551_x:
reg = MMA9551_TILT_YZ_ANG_REG;
break;
case mma9551_y:
reg = MMA9551_TILT_XZ_ANG_REG;
break;
case mma9551_z:
reg = MMA9551_TILT_XY_ANG_REG;
break;
}
/*
* Read the angle even though we don't use it, otherwise we
* won't get any further interrupts.
*/
ret = mma9551_read_status_byte(data->client, MMA9551_APPID_TILT,
reg, &val);
if (ret < 0) {
dev_err(&data->client->dev,
"error %d reading tilt register in IRQ\n", ret);
goto out;
}
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_INCLI, 0, (mma_axis + 1),
IIO_EV_TYPE_ROC, IIO_EV_DIR_RISING),
iio_get_time_ns(indio_dev));
out:
mutex_unlock(&data->mutex);
return IRQ_HANDLED;
}
static int mma9551_init(struct mma9551_data *data)
{
int ret;
ret = mma9551_read_version(data->client);
if (ret)
return ret;
return mma9551_set_device_state(data->client, true);
}
static int mma9551_gpio_probe(struct iio_dev *indio_dev)
{
struct gpio_desc *gpio;
int i, ret;
struct mma9551_data *data = iio_priv(indio_dev);
struct device *dev = &data->client->dev;
for (i = 0; i < MMA9551_GPIO_COUNT; i++) {
gpio = devm_gpiod_get_index(dev, NULL, i, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
ret = gpiod_to_irq(gpio);
if (ret < 0)
return ret;
data->irqs[i] = ret;
ret = devm_request_threaded_irq(dev, data->irqs[i],
NULL, mma9551_event_handler,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
"mma9551_event", indio_dev);
if (ret < 0) {
dev_err(dev, "request irq %d failed\n", data->irqs[i]);
return ret;
}
dev_dbg(dev, "gpio resource, no:%d irq:%d\n",
desc_to_gpio(gpio), data->irqs[i]);
}
return 0;
}
static int mma9551_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
struct mma9551_data *data;
struct iio_dev *indio_dev;
const char *name = NULL;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
if (id)
name = id->name;
else
name = iio_get_acpi_device_name(&client->dev);
ret = mma9551_init(data);
if (ret < 0)
return ret;
mutex_init(&data->mutex);
indio_dev->channels = mma9551_channels;
indio_dev->num_channels = ARRAY_SIZE(mma9551_channels);
indio_dev->name = name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mma9551_info;
ret = mma9551_gpio_probe(indio_dev);
if (ret < 0)
goto out_poweroff;
ret = pm_runtime_set_active(&client->dev);
if (ret < 0)
goto out_poweroff;
pm_runtime_enable(&client->dev);
pm_runtime_set_autosuspend_delay(&client->dev,
MMA9551_AUTO_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&client->dev);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "unable to register iio device\n");
goto err_pm_cleanup;
}
return 0;
err_pm_cleanup:
pm_runtime_dont_use_autosuspend(&client->dev);
pm_runtime_disable(&client->dev);
out_poweroff:
mma9551_set_device_state(client, false);
return ret;
}
static void mma9551_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct mma9551_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(&client->dev);
pm_runtime_set_suspended(&client->dev);
mutex_lock(&data->mutex);
mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
}
static int mma9551_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
if (ret < 0) {
dev_err(&data->client->dev, "powering off device failed\n");
return -EAGAIN;
}
return 0;
}
static int mma9551_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
ret = mma9551_set_device_state(data->client, true);
if (ret < 0)
return ret;
mma9551_sleep(MMA9551_DEFAULT_SAMPLE_RATE);
return 0;
}
static int mma9551_suspend(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, false);
mutex_unlock(&data->mutex);
return ret;
}
static int mma9551_resume(struct device *dev)
{
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct mma9551_data *data = iio_priv(indio_dev);
int ret;
mutex_lock(&data->mutex);
ret = mma9551_set_device_state(data->client, true);
mutex_unlock(&data->mutex);
return ret;
}
static const struct dev_pm_ops mma9551_pm_ops = {
SYSTEM_SLEEP_PM_OPS(mma9551_suspend, mma9551_resume)
RUNTIME_PM_OPS(mma9551_runtime_suspend, mma9551_runtime_resume, NULL)
};
static const struct acpi_device_id mma9551_acpi_match[] = {
{"MMA9551", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, mma9551_acpi_match);
static const struct i2c_device_id mma9551_id[] = {
{ .name = "mma9551" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mma9551_id);
static struct i2c_driver mma9551_driver = {
.driver = {
.name = "mma9551",
.acpi_match_table = mma9551_acpi_match,
.pm = pm_ptr(&mma9551_pm_ops),
},
.probe = mma9551_probe,
.remove = mma9551_remove,
.id_table = mma9551_id,
};
module_i2c_driver(mma9551_driver);
MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MMA9551L motion-sensing platform driver");
MODULE_IMPORT_NS("IIO_MMA9551");
linux-7.2.3/drivers/iio/accel/mma9551_core.c
+803
View File
@@ -0,0 +1,803 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Common code for Freescale MMA955x Intelligent Sensor Platform drivers
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/pm_runtime.h>
#include "mma9551_core.h"
/* Command masks for mailbox write command */
#define MMA9551_CMD_READ_VERSION_INFO 0x00
#define MMA9551_CMD_READ_CONFIG 0x10
#define MMA9551_CMD_WRITE_CONFIG 0x20
#define MMA9551_CMD_READ_STATUS 0x30
/* Mailbox read command */
#define MMA9551_RESPONSE_COCO BIT(7)
/* Error-Status codes returned in mailbox read command */
#define MMA9551_MCI_ERROR_NONE 0x00
#define MMA9551_MCI_ERROR_PARAM 0x04
#define MMA9551_MCI_INVALID_COUNT 0x19
#define MMA9551_MCI_ERROR_COMMAND 0x1C
#define MMA9551_MCI_ERROR_INVALID_LENGTH 0x21
#define MMA9551_MCI_ERROR_FIFO_BUSY 0x22
#define MMA9551_MCI_ERROR_FIFO_ALLOCATED 0x23
#define MMA9551_MCI_ERROR_FIFO_OVERSIZE 0x24
/* GPIO Application */
#define MMA9551_GPIO_POL_MSB 0x08
#define MMA9551_GPIO_POL_LSB 0x09
/* Sleep/Wake application */
#define MMA9551_SLEEP_CFG 0x06
#define MMA9551_SLEEP_CFG_SNCEN BIT(0)
#define MMA9551_SLEEP_CFG_FLEEN BIT(1)
#define MMA9551_SLEEP_CFG_SCHEN BIT(2)
/* AFE application */
#define MMA9551_AFE_X_ACCEL_REG 0x00
#define MMA9551_AFE_Y_ACCEL_REG 0x02
#define MMA9551_AFE_Z_ACCEL_REG 0x04
/* Reset/Suspend/Clear application */
#define MMA9551_RSC_RESET 0x00
#define MMA9551_RSC_OFFSET(mask) (3 - (ffs(mask) - 1) / 8)
#define MMA9551_RSC_VAL(mask) (mask >> (((ffs(mask) - 1) / 8) * 8))
/*
* A response is composed of:
* - control registers: MB0-3
* - data registers: MB4-31
*
* A request is composed of:
* - mbox to write to (always 0)
* - control registers: MB1-4
* - data registers: MB5-31
*/
#define MMA9551_MAILBOX_CTRL_REGS 4
#define MMA9551_MAX_MAILBOX_DATA_REGS 28
#define MMA9551_MAILBOX_REGS 32
#define MMA9551_I2C_READ_RETRIES 5
#define MMA9551_I2C_READ_DELAY 50 /* us */
struct mma9551_mbox_request {
u8 start_mbox; /* Always 0. */
u8 app_id;
/*
* See Section 5.3.1 of the MMA955xL Software Reference Manual.
*
* Bit 7: reserved, always 0
* Bits 6-4: command
* Bits 3-0: upper bits of register offset
*/
u8 cmd_off;
u8 lower_off;
u8 nbytes;
u8 buf[MMA9551_MAX_MAILBOX_DATA_REGS - 1];
} __packed;
struct mma9551_mbox_response {
u8 app_id;
/*
* See Section 5.3.3 of the MMA955xL Software Reference Manual.
*
* Bit 7: COCO
* Bits 6-0: Error code.
*/
u8 coco_err;
u8 nbytes;
u8 req_bytes;
u8 buf[MMA9551_MAX_MAILBOX_DATA_REGS];
} __packed;
struct mma9551_version_info {
__be32 device_id;
u8 rom_version[2];
u8 fw_version[2];
u8 hw_version[2];
u8 fw_build[2];
};
static int mma9551_transfer(struct i2c_client *client,
u8 app_id, u8 command, u16 offset,
u8 *inbytes, int num_inbytes,
u8 *outbytes, int num_outbytes)
{
struct mma9551_mbox_request req;
struct mma9551_mbox_response rsp;
struct i2c_msg in, out;
u8 req_len, err_code;
int ret, retries;
if (offset >= 1 << 12) {
dev_err(&client->dev, "register offset too large\n");
return -EINVAL;
}
req_len = 1 + MMA9551_MAILBOX_CTRL_REGS + num_inbytes;
req.start_mbox = 0;
req.app_id = app_id;
req.cmd_off = command | (offset >> 8);
req.lower_off = offset;
if (command == MMA9551_CMD_WRITE_CONFIG)
req.nbytes = num_inbytes;
else
req.nbytes = num_outbytes;
if (num_inbytes)
memcpy(req.buf, inbytes, num_inbytes);
out.addr = client->addr;
out.flags = 0;
out.len = req_len;
out.buf = (u8 *)&req;
ret = i2c_transfer(client->adapter, &out, 1);
if (ret < 0) {
dev_err(&client->dev, "i2c write failed\n");
return ret;
}
retries = MMA9551_I2C_READ_RETRIES;
do {
udelay(MMA9551_I2C_READ_DELAY);
in.addr = client->addr;
in.flags = I2C_M_RD;
in.len = sizeof(rsp);
in.buf = (u8 *)&rsp;
ret = i2c_transfer(client->adapter, &in, 1);
if (ret < 0) {
dev_err(&client->dev, "i2c read failed\n");
return ret;
}
if (rsp.coco_err & MMA9551_RESPONSE_COCO)
break;
} while (--retries > 0);
if (retries == 0) {
dev_err(&client->dev,
"timed out while waiting for command response\n");
return -ETIMEDOUT;
}
if (rsp.app_id != app_id) {
dev_err(&client->dev,
"app_id mismatch in response got %02x expected %02x\n",
rsp.app_id, app_id);
return -EINVAL;
}
err_code = rsp.coco_err & ~MMA9551_RESPONSE_COCO;
if (err_code != MMA9551_MCI_ERROR_NONE) {
dev_err(&client->dev, "read returned error %x\n", err_code);
return -EINVAL;
}
if (rsp.nbytes != rsp.req_bytes) {
dev_err(&client->dev,
"output length mismatch got %d expected %d\n",
rsp.nbytes, rsp.req_bytes);
return -EINVAL;
}
if (num_outbytes)
memcpy(outbytes, rsp.buf, num_outbytes);
return 0;
}
/**
* mma9551_read_config_byte() - read 1 configuration byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one configuration byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed
* by one or more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, val, 1);
}
EXPORT_SYMBOL_NS(mma9551_read_config_byte, "IIO_MMA9551");
/**
* mma9551_write_config_byte() - write 1 configuration byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Value to write
*
* Write one configuration byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG, reg,
&val, 1, NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_byte, "IIO_MMA9551");
/**
* mma9551_read_status_byte() - read 1 status byte
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one status byte from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val)
{
return mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, val, 1);
}
EXPORT_SYMBOL_NS(mma9551_read_status_byte, "IIO_MMA9551");
/**
* mma9551_read_config_word() - read 1 config word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one configuration word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val)
{
int ret;
__be16 v;
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, (u8 *)&v, 2);
if (ret < 0)
return ret;
*val = be16_to_cpu(v);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_config_word, "IIO_MMA9551");
/**
* mma9551_write_config_word() - write 1 config word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Value to write
*
* Write one configuration word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 val)
{
__be16 v = cpu_to_be16(val);
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG, reg,
(u8 *)&v, 2, NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_word, "IIO_MMA9551");
/**
* mma9551_read_status_word() - read 1 status word
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @val: Pointer to store value read
*
* Read one status word from the device using MMA955xL command format.
* Commands to the MMA955xL platform consist of a write followed by one or
* more reads.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val)
{
int ret;
__be16 v;
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, (u8 *)&v, 2);
if (ret < 0)
return ret;
*val = be16_to_cpu(v);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_status_word, "IIO_MMA9551");
/**
* mma9551_read_config_words() - read multiple config words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to read (in words)
* @buf: Array of words to read
*
* Read multiple configuration registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int ret, i;
__be16 be_buf[MMA9551_MAX_MAILBOX_DATA_REGS / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_CONFIG,
reg, NULL, 0, (u8 *)be_buf, len * sizeof(u16));
if (ret < 0)
return ret;
for (i = 0; i < len; i++)
buf[i] = be16_to_cpu(be_buf[i]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_config_words, "IIO_MMA9551");
/**
* mma9551_read_status_words() - read multiple status words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to read (in words)
* @buf: Array of words to read
*
* Read multiple status registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_status_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int ret, i;
__be16 be_buf[MMA9551_MAX_MAILBOX_DATA_REGS / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
ret = mma9551_transfer(client, app_id, MMA9551_CMD_READ_STATUS,
reg, NULL, 0, (u8 *)be_buf, len * sizeof(u16));
if (ret < 0)
return ret;
for (i = 0; i < len; i++)
buf[i] = be16_to_cpu(be_buf[i]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_status_words, "IIO_MMA9551");
/**
* mma9551_write_config_words() - write multiple config words
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @len: Length of array to write (in words)
* @buf: Array of words to write
*
* Write multiple configuration registers (word-sized registers).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_write_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf)
{
int i;
__be16 be_buf[(MMA9551_MAX_MAILBOX_DATA_REGS - 1) / 2];
if (len > ARRAY_SIZE(be_buf)) {
dev_err(&client->dev, "Invalid buffer size %d\n", len);
return -EINVAL;
}
for (i = 0; i < len; i++)
be_buf[i] = cpu_to_be16(buf[i]);
return mma9551_transfer(client, app_id, MMA9551_CMD_WRITE_CONFIG,
reg, (u8 *)be_buf, len * sizeof(u16), NULL, 0);
}
EXPORT_SYMBOL_NS(mma9551_write_config_words, "IIO_MMA9551");
/**
* mma9551_update_config_bits() - update bits in register
* @client: I2C client
* @app_id: Application ID
* @reg: Application register
* @mask: Mask for the bits to update
* @val: Value of the bits to update
*
* Update bits in the given register using a bit mask.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_update_config_bits(struct i2c_client *client, u8 app_id,
u16 reg, u8 mask, u8 val)
{
int ret;
u8 tmp, orig;
ret = mma9551_read_config_byte(client, app_id, reg, &orig);
if (ret < 0)
return ret;
tmp = orig & ~mask;
tmp |= val & mask;
if (tmp == orig)
return 0;
return mma9551_write_config_byte(client, app_id, reg, tmp);
}
EXPORT_SYMBOL_NS(mma9551_update_config_bits, "IIO_MMA9551");
/**
* mma9551_gpio_config() - configure gpio
* @client: I2C client
* @pin: GPIO pin to configure
* @app_id: Application ID
* @bitnum: Bit number of status register being assigned to the GPIO pin.
* @polarity: The polarity parameter is described in section 6.2.2, page 66,
* of the Software Reference Manual. Basically, polarity=0 means
* the interrupt line has the same value as the selected bit,
* while polarity=1 means the line is inverted.
*
* Assign a bit from an application’s status register to a specific GPIO pin.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_gpio_config(struct i2c_client *client, enum mma9551_gpio_pin pin,
u8 app_id, u8 bitnum, int polarity)
{
u8 reg, pol_mask, pol_val;
int ret;
if (pin > mma9551_gpio_max) {
dev_err(&client->dev, "bad GPIO pin\n");
return -EINVAL;
}
/*
* Pin 6 is configured by regs 0x00 and 0x01, pin 7 by 0x02 and
* 0x03, and so on.
*/
reg = pin * 2;
ret = mma9551_write_config_byte(client, MMA9551_APPID_GPIO,
reg, app_id);
if (ret < 0) {
dev_err(&client->dev, "error setting GPIO app_id\n");
return ret;
}
ret = mma9551_write_config_byte(client, MMA9551_APPID_GPIO,
reg + 1, bitnum);
if (ret < 0) {
dev_err(&client->dev, "error setting GPIO bit number\n");
return ret;
}
switch (pin) {
case mma9551_gpio6:
reg = MMA9551_GPIO_POL_LSB;
pol_mask = 1 << 6;
break;
case mma9551_gpio7:
reg = MMA9551_GPIO_POL_LSB;
pol_mask = 1 << 7;
break;
case mma9551_gpio8:
reg = MMA9551_GPIO_POL_MSB;
pol_mask = 1 << 0;
break;
case mma9551_gpio9:
reg = MMA9551_GPIO_POL_MSB;
pol_mask = 1 << 1;
break;
}
pol_val = polarity ? pol_mask : 0;
ret = mma9551_update_config_bits(client, MMA9551_APPID_GPIO, reg,
pol_mask, pol_val);
if (ret < 0)
dev_err(&client->dev, "error setting GPIO polarity\n");
return ret;
}
EXPORT_SYMBOL_NS(mma9551_gpio_config, "IIO_MMA9551");
/**
* mma9551_read_version() - read device version information
* @client: I2C client
*
* Read version information and print device id and firmware version.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_read_version(struct i2c_client *client)
{
struct mma9551_version_info info;
int ret;
ret = mma9551_transfer(client, MMA9551_APPID_VERSION, 0x00, 0x00,
NULL, 0, (u8 *)&info, sizeof(info));
if (ret < 0)
return ret;
dev_info(&client->dev, "device ID 0x%x, firmware version %02x.%02x\n",
be32_to_cpu(info.device_id), info.fw_version[0],
info.fw_version[1]);
return 0;
}
EXPORT_SYMBOL_NS(mma9551_read_version, "IIO_MMA9551");
/**
* mma9551_set_device_state() - sets HW power mode
* @client: I2C client
* @enable: Use true to power on device, false to cause the device
* to enter sleep.
*
* Set power on/off for device using the Sleep/Wake Application.
* When enable is true, power on chip and enable doze mode.
* When enable is false, enter sleep mode (device remains in the
* lowest-power mode).
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_set_device_state(struct i2c_client *client, bool enable)
{
return mma9551_update_config_bits(client, MMA9551_APPID_SLEEP_WAKE,
MMA9551_SLEEP_CFG,
MMA9551_SLEEP_CFG_SNCEN |
MMA9551_SLEEP_CFG_FLEEN |
MMA9551_SLEEP_CFG_SCHEN,
enable ? MMA9551_SLEEP_CFG_SCHEN |
MMA9551_SLEEP_CFG_FLEEN :
MMA9551_SLEEP_CFG_SNCEN);
}
EXPORT_SYMBOL_NS(mma9551_set_device_state, "IIO_MMA9551");
/**
* mma9551_set_power_state() - sets runtime PM state
* @client: I2C client
* @on: Use true to power on device, false to power off
*
* Resume or suspend the device using Runtime PM.
* The device will suspend after the autosuspend delay.
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_set_power_state(struct i2c_client *client, bool on)
{
#ifdef CONFIG_PM
int ret;
if (on)
ret = pm_runtime_resume_and_get(&client->dev);
else
ret = pm_runtime_put_autosuspend(&client->dev);
if (ret < 0) {
dev_err(&client->dev,
"failed to change power state to %d\n", on);
return ret;
}
#endif
return 0;
}
EXPORT_SYMBOL_NS(mma9551_set_power_state, "IIO_MMA9551");
/**
* mma9551_sleep() - sleep
* @freq: Application frequency
*
* Firmware applications run at a certain frequency on the
* device. Sleep for one application cycle to make sure the
* application had time to run once and initialize set values.
*/
void mma9551_sleep(int freq)
{
int sleep_val = 1000 / freq;
if (sleep_val < 20)
usleep_range(sleep_val * 1000, 20000);
else
msleep_interruptible(sleep_val);
}
EXPORT_SYMBOL_NS(mma9551_sleep, "IIO_MMA9551");
/**
* mma9551_read_accel_chan() - read accelerometer channel
* @client: I2C client
* @chan: IIO channel
* @val: Pointer to the accelerometer value read
* @val2: Unused
*
* Read accelerometer value for the specified channel.
*
* Locking note: This function must be called with the device lock held.
* Locking is not handled inside the function. Callers should ensure they
* serialize access to the HW.
*
* Returns: IIO_VAL_INT on success, negative value on failure.
*/
int mma9551_read_accel_chan(struct i2c_client *client,
const struct iio_chan_spec *chan,
int *val, int *val2)
{
u16 reg_addr;
s16 raw_accel;
int ret;
switch (chan->channel2) {
case IIO_MOD_X:
reg_addr = MMA9551_AFE_X_ACCEL_REG;
break;
case IIO_MOD_Y:
reg_addr = MMA9551_AFE_Y_ACCEL_REG;
break;
case IIO_MOD_Z:
reg_addr = MMA9551_AFE_Z_ACCEL_REG;
break;
default:
return -EINVAL;
}
ret = mma9551_set_power_state(client, true);
if (ret < 0)
return ret;
ret = mma9551_read_status_word(client, MMA9551_APPID_AFE,
reg_addr, &raw_accel);
if (ret < 0)
goto out_poweroff;
*val = raw_accel;
ret = IIO_VAL_INT;
out_poweroff:
mma9551_set_power_state(client, false);
return ret;
}
EXPORT_SYMBOL_NS(mma9551_read_accel_chan, "IIO_MMA9551");
/**
* mma9551_read_accel_scale() - read accelerometer scale
* @val: Pointer to the accelerometer scale (int value)
* @val2: Pointer to the accelerometer scale (micro value)
*
* Read accelerometer scale.
*
* Returns: IIO_VAL_INT_PLUS_MICRO.
*/
int mma9551_read_accel_scale(int *val, int *val2)
{
*val = 0;
*val2 = 2440;
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL_NS(mma9551_read_accel_scale, "IIO_MMA9551");
/**
* mma9551_app_reset() - reset application
* @client: I2C client
* @app_mask: Application to reset
*
* Reset the given application (using the Reset/Suspend/Clear
* Control Application)
*
* Returns: 0 on success, negative value on failure.
*/
int mma9551_app_reset(struct i2c_client *client, u32 app_mask)
{
return mma9551_write_config_byte(client, MMA9551_APPID_RSC,
MMA9551_RSC_RESET +
MMA9551_RSC_OFFSET(app_mask),
MMA9551_RSC_VAL(app_mask));
}
EXPORT_SYMBOL_NS(mma9551_app_reset, "IIO_MMA9551");
MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MMA955xL sensors core");
linux-7.2.3/drivers/iio/accel/mma9551_core.h
+73
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@@ -0,0 +1,73 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Common code for Freescale MMA955x Intelligent Sensor Platform drivers
* Copyright (c) 2014, Intel Corporation.
*/
#ifndef _MMA9551_CORE_H_
#define _MMA9551_CORE_H_
/* Applications IDs */
#define MMA9551_APPID_VERSION 0x00
#define MMA9551_APPID_GPIO 0x03
#define MMA9551_APPID_AFE 0x06
#define MMA9551_APPID_TILT 0x0B
#define MMA9551_APPID_SLEEP_WAKE 0x12
#define MMA9551_APPID_PEDOMETER 0x15
#define MMA9551_APPID_RSC 0x17
#define MMA9551_APPID_NONE 0xff
/* Reset/Suspend/Clear application app masks */
#define MMA9551_RSC_PED BIT(21)
#define MMA9551_AUTO_SUSPEND_DELAY_MS 2000
enum mma9551_gpio_pin {
mma9551_gpio6 = 0,
mma9551_gpio7,
mma9551_gpio8,
mma9551_gpio9,
mma9551_gpio_max = mma9551_gpio9,
};
#define MMA9551_ACCEL_CHANNEL(axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
int mma9551_read_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val);
int mma9551_write_config_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 val);
int mma9551_read_status_byte(struct i2c_client *client, u8 app_id,
u16 reg, u8 *val);
int mma9551_read_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val);
int mma9551_write_config_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 val);
int mma9551_read_status_word(struct i2c_client *client, u8 app_id,
u16 reg, u16 *val);
int mma9551_read_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf);
int mma9551_read_status_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf);
int mma9551_write_config_words(struct i2c_client *client, u8 app_id,
u16 reg, u8 len, u16 *buf);
int mma9551_update_config_bits(struct i2c_client *client, u8 app_id,
u16 reg, u8 mask, u8 val);
int mma9551_gpio_config(struct i2c_client *client, enum mma9551_gpio_pin pin,
u8 app_id, u8 bitnum, int polarity);
int mma9551_read_version(struct i2c_client *client);
int mma9551_set_device_state(struct i2c_client *client, bool enable);
int mma9551_set_power_state(struct i2c_client *client, bool on);
void mma9551_sleep(int freq);
int mma9551_read_accel_chan(struct i2c_client *client,
const struct iio_chan_spec *chan,
int *val, int *val2);
int mma9551_read_accel_scale(int *val, int *val2);
int mma9551_app_reset(struct i2c_client *client, u32 app_mask);
#endif /* _MMA9551_CORE_H_ */
linux-7.2.3/drivers/iio/accel/mma9553.c
+1243
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/msa311.c
+1295
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/mxc4005.c
+603
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@@ -0,0 +1,603 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* 3-axis accelerometer driver for MXC4005XC Memsic sensor
*
* Copyright (c) 2014, Intel Corporation.
*/
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define MXC4005_DRV_NAME "mxc4005"
#define MXC4005_REG_XOUT_UPPER 0x03
#define MXC4005_REG_XOUT_LOWER 0x04
#define MXC4005_REG_YOUT_UPPER 0x05
#define MXC4005_REG_YOUT_LOWER 0x06
#define MXC4005_REG_ZOUT_UPPER 0x07
#define MXC4005_REG_ZOUT_LOWER 0x08
#define MXC4005_REG_INT_MASK0 0x0A
#define MXC4005_REG_INT_MASK1 0x0B
#define MXC4005_REG_INT_MASK1_BIT_DRDYE 0x01
#define MXC4005_REG_INT_CLR0 0x00
#define MXC4005_REG_INT_CLR1 0x01
#define MXC4005_REG_INT_CLR1_BIT_DRDYC 0x01
#define MXC4005_REG_INT_CLR1_SW_RST 0x10
#define MXC4005_REG_CONTROL 0x0D
#define MXC4005_REG_CONTROL_MASK_FSR GENMASK(6, 5)
#define MXC4005_CONTROL_FSR_SHIFT 5
#define MXC4005_REG_DEVICE_ID 0x0E
/* Datasheet does not specify a reset time, this is a conservative guess */
#define MXC4005_RESET_TIME_US 2000
enum mxc4005_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
enum mxc4005_range {
MXC4005_RANGE_2G,
MXC4005_RANGE_4G,
MXC4005_RANGE_8G,
};
struct mxc4005_data {
struct device *dev;
struct mutex mutex;
struct regmap *regmap;
struct iio_trigger *dready_trig;
struct iio_mount_matrix orientation;
/* Ensure timestamp is naturally aligned */
struct {
__be16 chans[3];
aligned_s64 timestamp;
} scan;
bool trigger_enabled;
unsigned int control;
unsigned int int_mask1;
};
/*
* MXC4005 can operate in the following ranges:
* +/- 2G, 4G, 8G (the default +/-2G)
*
* (2 + 2) * 9.81 / (2^12 - 1) = 0.009582
* (4 + 4) * 9.81 / (2^12 - 1) = 0.019164
* (8 + 8) * 9.81 / (2^12 - 1) = 0.038329
*/
static const struct {
u8 range;
int scale;
} mxc4005_scale_table[] = {
{MXC4005_RANGE_2G, 9582},
{MXC4005_RANGE_4G, 19164},
{MXC4005_RANGE_8G, 38329},
};
static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019164 0.038329");
static struct attribute *mxc4005_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group mxc4005_attrs_group = {
.attrs = mxc4005_attributes,
};
static bool mxc4005_is_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC4005_REG_XOUT_UPPER:
case MXC4005_REG_XOUT_LOWER:
case MXC4005_REG_YOUT_UPPER:
case MXC4005_REG_YOUT_LOWER:
case MXC4005_REG_ZOUT_UPPER:
case MXC4005_REG_ZOUT_LOWER:
case MXC4005_REG_DEVICE_ID:
case MXC4005_REG_CONTROL:
return true;
default:
return false;
}
}
static bool mxc4005_is_writeable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC4005_REG_INT_CLR0:
case MXC4005_REG_INT_CLR1:
case MXC4005_REG_INT_MASK0:
case MXC4005_REG_INT_MASK1:
case MXC4005_REG_CONTROL:
return true;
default:
return false;
}
}
static const struct regmap_config mxc4005_regmap_config = {
.name = "mxc4005_regmap",
.reg_bits = 8,
.val_bits = 8,
.max_register = MXC4005_REG_DEVICE_ID,
.readable_reg = mxc4005_is_readable_reg,
.writeable_reg = mxc4005_is_writeable_reg,
};
static int mxc4005_read_xyz(struct mxc4005_data *data)
{
int ret;
ret = regmap_bulk_read(data->regmap, MXC4005_REG_XOUT_UPPER,
data->scan.chans, sizeof(data->scan.chans));
if (ret < 0) {
dev_err(data->dev, "failed to read axes\n");
return ret;
}
return 0;
}
static int mxc4005_read_axis(struct mxc4005_data *data,
unsigned int addr)
{
__be16 reg;
int ret;
ret = regmap_bulk_read(data->regmap, addr, &reg, sizeof(reg));
if (ret < 0) {
dev_err(data->dev, "failed to read reg %02x\n", addr);
return ret;
}
return be16_to_cpu(reg);
}
static int mxc4005_read_scale(struct mxc4005_data *data)
{
unsigned int reg;
int ret;
int i;
ret = regmap_read(data->regmap, MXC4005_REG_CONTROL, &reg);
if (ret < 0) {
dev_err(data->dev, "failed to read reg_control\n");
return ret;
}
i = reg >> MXC4005_CONTROL_FSR_SHIFT;
if (i < 0 || i >= ARRAY_SIZE(mxc4005_scale_table))
return -EINVAL;
return mxc4005_scale_table[i].scale;
}
static int mxc4005_set_scale(struct mxc4005_data *data, int val)
{
unsigned int reg;
int i;
int ret;
for (i = 0; i < ARRAY_SIZE(mxc4005_scale_table); i++) {
if (mxc4005_scale_table[i].scale == val) {
reg = i << MXC4005_CONTROL_FSR_SHIFT;
ret = regmap_update_bits(data->regmap,
MXC4005_REG_CONTROL,
MXC4005_REG_CONTROL_MASK_FSR,
reg);
if (ret < 0)
dev_err(data->dev,
"failed to write reg_control\n");
return ret;
}
}
return -EINVAL;
}
static int mxc4005_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_ACCEL:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
ret = mxc4005_read_axis(data, chan->address);
if (ret < 0)
return ret;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
ret = mxc4005_read_scale(data);
if (ret < 0)
return ret;
*val = 0;
*val2 = ret;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static int mxc4005_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct mxc4005_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
return mxc4005_set_scale(data, val2);
default:
return -EINVAL;
}
}
static const struct iio_mount_matrix *
mxc4005_get_mount_matrix(const struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct mxc4005_data *data = iio_priv(indio_dev);
return &data->orientation;
}
static const struct iio_chan_spec_ext_info mxc4005_ext_info[] = {
IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, mxc4005_get_mount_matrix),
{ }
};
static const struct iio_info mxc4005_info = {
.read_raw = mxc4005_read_raw,
.write_raw = mxc4005_write_raw,
.attrs = &mxc4005_attrs_group,
};
static const unsigned long mxc4005_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
#define MXC4005_CHANNEL(_axis, _addr) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.address = _addr, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 12, \
.storagebits = 16, \
.shift = 4, \
.endianness = IIO_BE, \
}, \
.ext_info = mxc4005_ext_info, \
}
static const struct iio_chan_spec mxc4005_channels[] = {
MXC4005_CHANNEL(X, MXC4005_REG_XOUT_UPPER),
MXC4005_CHANNEL(Y, MXC4005_REG_YOUT_UPPER),
MXC4005_CHANNEL(Z, MXC4005_REG_ZOUT_UPPER),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static irqreturn_t mxc4005_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
ret = mxc4005_read_xyz(data);
if (ret < 0)
goto err;
iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static void mxc4005_clr_intr(struct mxc4005_data *data)
{
int ret;
/* clear interrupt */
ret = regmap_write(data->regmap, MXC4005_REG_INT_CLR1,
MXC4005_REG_INT_CLR1_BIT_DRDYC);
if (ret < 0)
dev_err(data->dev, "failed to write to reg_int_clr1\n");
}
static int mxc4005_set_trigger_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mxc4005_data *data = iio_priv(indio_dev);
unsigned int val;
int ret;
mutex_lock(&data->mutex);
val = state ? MXC4005_REG_INT_MASK1_BIT_DRDYE : 0;
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK1, val);
if (ret < 0) {
mutex_unlock(&data->mutex);
dev_err(data->dev, "failed to update reg_int_mask1");
return ret;
}
data->int_mask1 = val;
data->trigger_enabled = state;
mutex_unlock(&data->mutex);
return 0;
}
static void mxc4005_trigger_reen(struct iio_trigger *trig)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mxc4005_data *data = iio_priv(indio_dev);
if (!data->dready_trig)
return;
mxc4005_clr_intr(data);
}
static const struct iio_trigger_ops mxc4005_trigger_ops = {
.set_trigger_state = mxc4005_set_trigger_state,
.reenable = mxc4005_trigger_reen,
};
static int mxc4005_chip_init(struct mxc4005_data *data)
{
int ret;
unsigned int reg;
ret = regmap_read(data->regmap, MXC4005_REG_DEVICE_ID, &reg);
if (ret < 0) {
dev_err(data->dev, "failed to read chip id\n");
return ret;
}
dev_dbg(data->dev, "MXC4005 chip id %02x\n", reg);
ret = regmap_write(data->regmap, MXC4005_REG_INT_CLR1,
MXC4005_REG_INT_CLR1_SW_RST);
if (ret < 0)
return dev_err_probe(data->dev, ret, "resetting chip\n");
fsleep(MXC4005_RESET_TIME_US);
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK0, 0);
if (ret < 0)
return dev_err_probe(data->dev, ret, "writing INT_MASK0\n");
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK1, 0);
if (ret < 0)
return dev_err_probe(data->dev, ret, "writing INT_MASK1\n");
return 0;
}
static int mxc4005_probe(struct i2c_client *client)
{
struct mxc4005_data *data;
struct iio_dev *indio_dev;
struct regmap *regmap;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &mxc4005_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "failed to initialize regmap\n");
return PTR_ERR(regmap);
}
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->dev = &client->dev;
data->regmap = regmap;
ret = mxc4005_chip_init(data);
if (ret < 0) {
dev_err(&client->dev, "failed to initialize chip\n");
return ret;
}
mutex_init(&data->mutex);
if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) {
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
if (ret)
return ret;
}
indio_dev->channels = mxc4005_channels;
indio_dev->num_channels = ARRAY_SIZE(mxc4005_channels);
indio_dev->available_scan_masks = mxc4005_scan_masks;
indio_dev->name = MXC4005_DRV_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mxc4005_info;
ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev,
iio_pollfunc_store_time,
mxc4005_trigger_handler,
NULL);
if (ret < 0) {
dev_err(&client->dev,
"failed to setup iio triggered buffer\n");
return ret;
}
if (client->irq > 0) {
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig)
return -ENOMEM;
ret = devm_request_irq(&client->dev, client->irq,
iio_trigger_generic_data_rdy_poll,
IRQF_TRIGGER_FALLING | IRQF_NO_THREAD,
"mxc4005_event", data->dready_trig);
if (ret) {
dev_err(&client->dev,
"failed to init threaded irq\n");
return ret;
}
data->dready_trig->ops = &mxc4005_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = devm_iio_trigger_register(&client->dev,
data->dready_trig);
if (ret) {
dev_err(&client->dev,
"failed to register trigger\n");
return ret;
}
indio_dev->trig = iio_trigger_get(data->dready_trig);
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static int mxc4005_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
/* Save control to restore it on resume */
ret = regmap_read(data->regmap, MXC4005_REG_CONTROL, &data->control);
if (ret < 0)
dev_err(data->dev, "failed to read reg_control\n");
return ret;
}
static int mxc4005_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct mxc4005_data *data = iio_priv(indio_dev);
int ret;
ret = regmap_write(data->regmap, MXC4005_REG_INT_CLR1,
MXC4005_REG_INT_CLR1_SW_RST);
if (ret) {
dev_err(data->dev, "failed to reset chip: %d\n", ret);
return ret;
}
fsleep(MXC4005_RESET_TIME_US);
ret = regmap_write(data->regmap, MXC4005_REG_CONTROL, data->control);
if (ret) {
dev_err(data->dev, "failed to restore control register\n");
return ret;
}
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK0, 0);
if (ret) {
dev_err(data->dev, "failed to restore interrupt 0 mask\n");
return ret;
}
ret = regmap_write(data->regmap, MXC4005_REG_INT_MASK1, data->int_mask1);
if (ret) {
dev_err(data->dev, "failed to restore interrupt 1 mask\n");
return ret;
}
return 0;
}
static DEFINE_SIMPLE_DEV_PM_OPS(mxc4005_pm_ops, mxc4005_suspend, mxc4005_resume);
static const struct acpi_device_id mxc4005_acpi_match[] = {
{"MXC4005", 0},
{"MXC6655", 0},
{"MDA6655", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, mxc4005_acpi_match);
static const struct of_device_id mxc4005_of_match[] = {
{ .compatible = "memsic,mxc4005", },
{ .compatible = "memsic,mxc6655", },
{ }
};
MODULE_DEVICE_TABLE(of, mxc4005_of_match);
static const struct i2c_device_id mxc4005_id[] = {
{ .name = "mxc4005" },
{ .name = "mxc6655" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mxc4005_id);
static struct i2c_driver mxc4005_driver = {
.driver = {
.name = MXC4005_DRV_NAME,
.acpi_match_table = mxc4005_acpi_match,
.of_match_table = mxc4005_of_match,
.pm = pm_sleep_ptr(&mxc4005_pm_ops),
},
.probe = mxc4005_probe,
.id_table = mxc4005_id,
};
module_i2c_driver(mxc4005_driver);
MODULE_AUTHOR("Teodora Baluta <teodora.baluta@intel.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("MXC4005 3-axis accelerometer driver");
linux-7.2.3/drivers/iio/accel/mxc6255.c
+192
View File
@@ -0,0 +1,192 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* MXC6255 - MEMSIC orientation sensing accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* IIO driver for MXC6255 (7-bit I2C slave address 0x15).
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/iio/iio.h>
#include <linux/delay.h>
#include <linux/regmap.h>
#include <linux/iio/sysfs.h>
#define MXC6255_DRV_NAME "mxc6255"
#define MXC6255_REG_XOUT 0x00
#define MXC6255_REG_YOUT 0x01
#define MXC6255_REG_CHIP_ID 0x08
#define MXC6255_CHIP_ID 0x05
/*
* MXC6255 has only one measurement range: +/- 2G.
* The acceleration output is an 8-bit value.
*
* Scale is calculated as follows:
* (2 + 2) * 9.80665 / (2^8 - 1) = 0.153829
*
* Scale value for +/- 2G measurement range
*/
#define MXC6255_SCALE 153829
enum mxc6255_axis {
AXIS_X,
AXIS_Y,
};
struct mxc6255_data {
struct i2c_client *client;
struct regmap *regmap;
};
static int mxc6255_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct mxc6255_data *data = iio_priv(indio_dev);
unsigned int reg;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_read(data->regmap, chan->address, &reg);
if (ret < 0) {
dev_err(&data->client->dev,
"Error reading reg %lu\n", chan->address);
return ret;
}
*val = sign_extend32(reg, 7);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = MXC6255_SCALE;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static const struct iio_info mxc6255_info = {
.read_raw = mxc6255_read_raw,
};
#define MXC6255_CHANNEL(_axis, reg) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.address = reg, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
}
static const struct iio_chan_spec mxc6255_channels[] = {
MXC6255_CHANNEL(X, MXC6255_REG_XOUT),
MXC6255_CHANNEL(Y, MXC6255_REG_YOUT),
};
static bool mxc6255_is_readable_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case MXC6255_REG_XOUT:
case MXC6255_REG_YOUT:
case MXC6255_REG_CHIP_ID:
return true;
default:
return false;
}
}
static const struct regmap_config mxc6255_regmap_config = {
.name = "mxc6255_regmap",
.reg_bits = 8,
.val_bits = 8,
.readable_reg = mxc6255_is_readable_reg,
};
static int mxc6255_probe(struct i2c_client *client)
{
struct mxc6255_data *data;
struct iio_dev *indio_dev;
struct regmap *regmap;
unsigned int chip_id;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_i2c(client, &mxc6255_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Error initializing regmap\n");
return PTR_ERR(regmap);
}
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
data->regmap = regmap;
indio_dev->name = MXC6255_DRV_NAME;
indio_dev->channels = mxc6255_channels;
indio_dev->num_channels = ARRAY_SIZE(mxc6255_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mxc6255_info;
ret = regmap_read(data->regmap, MXC6255_REG_CHIP_ID, &chip_id);
if (ret < 0) {
dev_err(&client->dev, "Error reading chip id %d\n", ret);
return ret;
}
if ((chip_id & 0x1f) != MXC6255_CHIP_ID) {
dev_err(&client->dev, "Invalid chip id %x\n", chip_id);
return -ENODEV;
}
dev_dbg(&client->dev, "Chip id %x\n", chip_id);
ret = devm_iio_device_register(&client->dev, indio_dev);
if (ret < 0) {
dev_err(&client->dev, "Could not register IIO device\n");
return ret;
}
return 0;
}
static const struct acpi_device_id mxc6255_acpi_match[] = {
{"MXC6225", 0},
{"MXC6255", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, mxc6255_acpi_match);
static const struct i2c_device_id mxc6255_id[] = {
{ .name = "mxc6225" },
{ .name = "mxc6255" },
{ }
};
MODULE_DEVICE_TABLE(i2c, mxc6255_id);
static struct i2c_driver mxc6255_driver = {
.driver = {
.name = MXC6255_DRV_NAME,
.acpi_match_table = mxc6255_acpi_match,
},
.probe = mxc6255_probe,
.id_table = mxc6255_id,
};
module_i2c_driver(mxc6255_driver);
MODULE_AUTHOR("Teodora Baluta <teodora.baluta@intel.com>");
MODULE_DESCRIPTION("MEMSIC MXC6255 orientation sensing accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/sca3000.c
+1526
View File
File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/sca3300.c
+685
View File
@@ -0,0 +1,685 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Murata SCA3300 3-axis industrial accelerometer
*
* Copyright (c) 2021 Vaisala Oyj. All rights reserved.
*/
#include <linux/bitops.h>
#include <linux/crc8.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/unaligned.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define SCA3300_CRC8_POLYNOMIAL 0x1d
/* Device mode register */
#define SCA3300_REG_MODE 0xd
#define SCA3300_MODE_SW_RESET 0x20
/* Last register in map */
#define SCA3300_REG_SELBANK 0x1f
/* Device status and mask */
#define SCA3300_REG_STATUS 0x6
#define SCA3300_STATUS_MASK GENMASK(8, 0)
/* Device ID */
#define SCA3300_REG_WHOAMI 0x10
#define SCA3300_WHOAMI_ID 0x51
#define SCL3300_WHOAMI_ID 0xC1
/* Device return status and mask */
#define SCA3300_VALUE_RS_ERROR 0x3
#define SCA3300_MASK_RS_STATUS GENMASK(1, 0)
#define SCL3300_REG_ANG_CTRL 0x0C
#define SCL3300_ANG_ENABLE 0x1F
enum sca3300_scan_indexes {
SCA3300_ACC_X = 0,
SCA3300_ACC_Y,
SCA3300_ACC_Z,
SCA3300_TEMP,
SCA3300_INCLI_X,
SCA3300_INCLI_Y,
SCA3300_INCLI_Z,
SCA3300_SCAN_MAX
};
#define SCA3300_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.info_mask_shared_by_type_available = \
BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
#define SCA3300_INCLI_CHANNEL(index, reg, axis) { \
.type = IIO_INCLI, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
#define SCA3300_TEMP_CHANNEL(index, reg) { \
.type = IIO_TEMP, \
.address = reg, \
.scan_index = index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.scan_type = { \
.sign = 's', \
.realbits = 16, \
.storagebits = 16, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec sca3300_channels[] = {
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const int sca3300_lp_freq[] = {70, 10};
static const int sca3300_lp_freq_map[] = {0, 0, 0, 1};
static const int scl3300_lp_freq[] = {40, 70, 10};
static const int scl3300_lp_freq_map[] = {0, 1, 2};
static const int sca3300_accel_scale[][2] = {{0, 370}, {0, 741}, {0, 185}};
static const int sca3300_accel_scale_map[] = {0, 1, 2, 2};
static const int scl3300_accel_scale[][2] = {{0, 167}, {0, 333}, {0, 83}};
static const int scl3300_accel_scale_map[] = {0, 1, 2};
static const int scl3300_incli_scale[][2] = {{0, 5495}};
static const int scl3300_incli_scale_map[] = {0, 0, 0};
static const int sca3300_avail_modes_map[] = {0, 1, 2, 3};
static const int scl3300_avail_modes_map[] = {0, 1, 3};
static const struct iio_chan_spec scl3300_channels[] = {
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_X, 0x09, X),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Y, 0x0A, Y),
SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Z, 0x0B, Z),
IIO_CHAN_SOFT_TIMESTAMP(7),
};
static const unsigned long sca3300_scan_masks[] = {
BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
BIT(SCA3300_TEMP),
0
};
static const unsigned long scl3300_scan_masks[] = {
BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
BIT(SCA3300_TEMP) |
BIT(SCA3300_INCLI_X) | BIT(SCA3300_INCLI_Y) | BIT(SCA3300_INCLI_Z),
0
};
struct sca3300_chip_info {
const char *name;
const unsigned long *scan_masks;
const struct iio_chan_spec *channels;
u8 num_channels;
u8 num_accel_scales;
const int (*accel_scale)[2];
const int *accel_scale_map;
const int (*incli_scale)[2];
const int *incli_scale_map;
u8 num_incli_scales;
u8 num_freqs;
const int *freq_table;
const int *freq_map;
const int *avail_modes_table;
u8 num_avail_modes;
u8 chip_id;
bool angle_supported;
};
/**
* struct sca3300_data - device data
* @spi: SPI device structure
* @lock: Data buffer lock
* @chip: Sensor chip specific information
* @txbuf: Transmit buffer
* @rxbuf: Receive buffer
*/
struct sca3300_data {
struct spi_device *spi;
struct mutex lock;
const struct sca3300_chip_info *chip;
u8 txbuf[4] __aligned(IIO_DMA_MINALIGN);
u8 rxbuf[4];
};
static const struct sca3300_chip_info sca3300_chip_tbl[] = {
{
.name = "sca3300",
.scan_masks = sca3300_scan_masks,
.channels = sca3300_channels,
.num_channels = ARRAY_SIZE(sca3300_channels),
.num_accel_scales = ARRAY_SIZE(sca3300_accel_scale)*2,
.accel_scale = sca3300_accel_scale,
.accel_scale_map = sca3300_accel_scale_map,
.num_freqs = ARRAY_SIZE(sca3300_lp_freq),
.freq_table = sca3300_lp_freq,
.freq_map = sca3300_lp_freq_map,
.avail_modes_table = sca3300_avail_modes_map,
.num_avail_modes = 4,
.chip_id = SCA3300_WHOAMI_ID,
.angle_supported = false,
},
{
.name = "scl3300",
.scan_masks = scl3300_scan_masks,
.channels = scl3300_channels,
.num_channels = ARRAY_SIZE(scl3300_channels),
.num_accel_scales = ARRAY_SIZE(scl3300_accel_scale)*2,
.accel_scale = scl3300_accel_scale,
.accel_scale_map = scl3300_accel_scale_map,
.incli_scale = scl3300_incli_scale,
.incli_scale_map = scl3300_incli_scale_map,
.num_incli_scales = ARRAY_SIZE(scl3300_incli_scale)*2,
.num_freqs = ARRAY_SIZE(scl3300_lp_freq),
.freq_table = scl3300_lp_freq,
.freq_map = scl3300_lp_freq_map,
.avail_modes_table = scl3300_avail_modes_map,
.num_avail_modes = 3,
.chip_id = SCL3300_WHOAMI_ID,
.angle_supported = true,
},
};
DECLARE_CRC8_TABLE(sca3300_crc_table);
static int sca3300_transfer(struct sca3300_data *sca_data, int *val)
{
/* Consecutive requests min. 10 us delay (Datasheet section 5.1.2) */
struct spi_delay delay = { .value = 10, .unit = SPI_DELAY_UNIT_USECS };
int32_t ret;
int rs;
u8 crc;
struct spi_transfer xfers[2] = {
{
.tx_buf = sca_data->txbuf,
.len = ARRAY_SIZE(sca_data->txbuf),
.delay = delay,
.cs_change = 1,
},
{
.rx_buf = sca_data->rxbuf,
.len = ARRAY_SIZE(sca_data->rxbuf),
.delay = delay,
}
};
/* inverted crc value as described in device data sheet */
crc = ~crc8(sca3300_crc_table, &sca_data->txbuf[0], 3, CRC8_INIT_VALUE);
sca_data->txbuf[3] = crc;
ret = spi_sync_transfer(sca_data->spi, xfers, ARRAY_SIZE(xfers));
if (ret) {
dev_err(&sca_data->spi->dev,
"transfer error, error: %d\n", ret);
return -EIO;
}
crc = ~crc8(sca3300_crc_table, &sca_data->rxbuf[0], 3, CRC8_INIT_VALUE);
if (sca_data->rxbuf[3] != crc) {
dev_err(&sca_data->spi->dev, "CRC checksum mismatch");
return -EIO;
}
/* get return status */
rs = sca_data->rxbuf[0] & SCA3300_MASK_RS_STATUS;
if (rs == SCA3300_VALUE_RS_ERROR)
ret = -EINVAL;
*val = sign_extend32(get_unaligned_be16(&sca_data->rxbuf[1]), 15);
return ret;
}
static int sca3300_error_handler(struct sca3300_data *sca_data)
{
int ret;
int val;
mutex_lock(&sca_data->lock);
sca_data->txbuf[0] = SCA3300_REG_STATUS << 2;
ret = sca3300_transfer(sca_data, &val);
mutex_unlock(&sca_data->lock);
/*
* Return status error is cleared after reading status register once,
* expect EINVAL here.
*/
if (ret != -EINVAL) {
dev_err(&sca_data->spi->dev,
"error reading device status: %d\n", ret);
return ret;
}
dev_err(&sca_data->spi->dev, "device status: 0x%lx\n",
val & SCA3300_STATUS_MASK);
return 0;
}
static int sca3300_read_reg(struct sca3300_data *sca_data, u8 reg, int *val)
{
int ret;
mutex_lock(&sca_data->lock);
sca_data->txbuf[0] = reg << 2;
ret = sca3300_transfer(sca_data, val);
mutex_unlock(&sca_data->lock);
if (ret != -EINVAL)
return ret;
return sca3300_error_handler(sca_data);
}
static int sca3300_write_reg(struct sca3300_data *sca_data, u8 reg, int val)
{
int reg_val = 0;
int ret;
mutex_lock(&sca_data->lock);
/* BIT(7) for write operation */
sca_data->txbuf[0] = BIT(7) | (reg << 2);
put_unaligned_be16(val, &sca_data->txbuf[1]);
ret = sca3300_transfer(sca_data, &reg_val);
mutex_unlock(&sca_data->lock);
if (ret != -EINVAL)
return ret;
return sca3300_error_handler(sca_data);
}
static int sca3300_set_op_mode(struct sca3300_data *sca_data, int index)
{
if ((index < 0) || (index >= sca_data->chip->num_avail_modes))
return -EINVAL;
return sca3300_write_reg(sca_data, SCA3300_REG_MODE,
sca_data->chip->avail_modes_table[index]);
}
static int sca3300_get_op_mode(struct sca3300_data *sca_data, int *index)
{
int reg_val;
int ret;
int i;
ret = sca3300_read_reg(sca_data, SCA3300_REG_MODE, &reg_val);
if (ret)
return ret;
for (i = 0; i < sca_data->chip->num_avail_modes; i++) {
if (sca_data->chip->avail_modes_table[i] == reg_val)
break;
}
if (i == sca_data->chip->num_avail_modes)
return -EINVAL;
*index = i;
return 0;
}
static int sca3300_set_frequency(struct sca3300_data *data, int val)
{
const struct sca3300_chip_info *chip = data->chip;
unsigned int index;
int *opmode_scale;
int *new_scale;
unsigned int i;
if (sca3300_get_op_mode(data, &index))
return -EINVAL;
/*
* Find a mode in which the requested sampling frequency is available
* and the scaling currently set is retained.
*/
opmode_scale = (int *)chip->accel_scale[chip->accel_scale_map[index]];
for (i = 0; i < chip->num_avail_modes; i++) {
new_scale = (int *)chip->accel_scale[chip->accel_scale_map[i]];
if ((val == chip->freq_table[chip->freq_map[i]]) &&
(opmode_scale[1] == new_scale[1]) &&
(opmode_scale[0] == new_scale[0]))
break;
}
if (i == chip->num_avail_modes)
return -EINVAL;
return sca3300_set_op_mode(data, i);
}
static int sca3300_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
int index;
int i;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (chan->type != IIO_ACCEL)
return -EINVAL;
/*
* Letting scale take priority over sampling frequency.
* That makes sense given we can only ever end up increasing
* the sampling frequency which is unlikely to be a problem.
*/
for (i = 0; i < data->chip->num_avail_modes; i++) {
index = data->chip->accel_scale_map[i];
if ((val == data->chip->accel_scale[index][0]) &&
(val2 == data->chip->accel_scale[index][1]))
return sca3300_set_op_mode(data, i);
}
return -EINVAL;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
return sca3300_set_frequency(data, val);
default:
return -EINVAL;
}
}
static int sca3300_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
int index;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = sca3300_read_reg(data, chan->address, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = sca3300_get_op_mode(data, &index);
if (ret)
return ret;
switch (chan->type) {
case IIO_INCLI:
index = data->chip->incli_scale_map[index];
*val = data->chip->incli_scale[index][0];
*val2 = data->chip->incli_scale[index][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_ACCEL:
index = data->chip->accel_scale_map[index];
*val = data->chip->accel_scale[index][0];
*val2 = data->chip->accel_scale[index][1];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
ret = sca3300_get_op_mode(data, &index);
if (ret)
return ret;
index = data->chip->freq_map[index];
*val = data->chip->freq_table[index];
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static irqreturn_t sca3300_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct sca3300_data *data = iio_priv(indio_dev);
int bit, ret, val, i = 0;
IIO_DECLARE_BUFFER_WITH_TS(s16, channels, SCA3300_SCAN_MAX) = { };
iio_for_each_active_channel(indio_dev, bit) {
ret = sca3300_read_reg(data, indio_dev->channels[bit].address, &val);
if (ret) {
dev_err_ratelimited(&data->spi->dev,
"failed to read register, error: %d\n", ret);
/* handled, but bailing out due to errors */
goto out;
}
channels[i++] = val;
}
iio_push_to_buffers_with_ts(indio_dev, channels, sizeof(channels),
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
/*
* sca3300_init - Device init sequence. See datasheet rev 2 section
* 4.2 Start-Up Sequence for details.
*/
static int sca3300_init(struct sca3300_data *sca_data,
struct iio_dev *indio_dev)
{
int value = 0;
int ret;
int i;
ret = sca3300_write_reg(sca_data, SCA3300_REG_MODE,
SCA3300_MODE_SW_RESET);
if (ret)
return ret;
/*
* Wait 1ms after SW-reset command.
* Wait for the settling of signal paths,
* 15ms for SCA3300 and 25ms for SCL3300,
*/
usleep_range(26e3, 50e3);
ret = sca3300_read_reg(sca_data, SCA3300_REG_WHOAMI, &value);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(sca3300_chip_tbl); i++) {
if (sca3300_chip_tbl[i].chip_id == value)
break;
}
if (i == ARRAY_SIZE(sca3300_chip_tbl)) {
dev_err(&sca_data->spi->dev, "unknown chip id %x\n", value);
return -ENODEV;
}
sca_data->chip = &sca3300_chip_tbl[i];
if (sca_data->chip->angle_supported) {
ret = sca3300_write_reg(sca_data, SCL3300_REG_ANG_CTRL,
SCL3300_ANG_ENABLE);
if (ret)
return ret;
}
return 0;
}
static int sca3300_debugfs_reg_access(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
struct sca3300_data *data = iio_priv(indio_dev);
int value;
int ret;
if (reg > SCA3300_REG_SELBANK)
return -EINVAL;
if (!readval)
return sca3300_write_reg(data, reg, writeval);
ret = sca3300_read_reg(data, reg, &value);
if (ret)
return ret;
*readval = value;
return 0;
}
static int sca3300_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct sca3300_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_INCLI:
*vals = (const int *)data->chip->incli_scale;
*length = data->chip->num_incli_scales;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
case IIO_ACCEL:
*vals = (const int *)data->chip->accel_scale;
*length = data->chip->num_accel_scales;
*type = IIO_VAL_INT_PLUS_MICRO;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*vals = (const int *)data->chip->freq_table;
*length = data->chip->num_freqs;
*type = IIO_VAL_INT;
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static const struct iio_info sca3300_info = {
.read_raw = sca3300_read_raw,
.write_raw = sca3300_write_raw,
.debugfs_reg_access = &sca3300_debugfs_reg_access,
.read_avail = sca3300_read_avail,
};
static int sca3300_probe(struct spi_device *spi)
{
struct sca3300_data *sca_data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*sca_data));
if (!indio_dev)
return -ENOMEM;
sca_data = iio_priv(indio_dev);
mutex_init(&sca_data->lock);
sca_data->spi = spi;
crc8_populate_msb(sca3300_crc_table, SCA3300_CRC8_POLYNOMIAL);
indio_dev->info = &sca3300_info;
ret = sca3300_init(sca_data, indio_dev);
if (ret) {
dev_err(&spi->dev, "failed to init device, error: %d\n", ret);
return ret;
}
indio_dev->name = sca_data->chip->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = sca_data->chip->channels;
indio_dev->num_channels = sca_data->chip->num_channels;
indio_dev->available_scan_masks = sca_data->chip->scan_masks;
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
iio_pollfunc_store_time,
sca3300_trigger_handler, NULL);
if (ret) {
dev_err(&spi->dev,
"iio triggered buffer setup failed, error: %d\n", ret);
return ret;
}
ret = devm_iio_device_register(&spi->dev, indio_dev);
if (ret) {
dev_err(&spi->dev, "iio device register failed, error: %d\n",
ret);
}
return ret;
}
static const struct of_device_id sca3300_dt_ids[] = {
{ .compatible = "murata,sca3300"},
{ .compatible = "murata,scl3300"},
{ }
};
MODULE_DEVICE_TABLE(of, sca3300_dt_ids);
static const struct spi_device_id sca3300_ids[] = {
{ "sca3300" },
{ "scl3300" },
{ }
};
MODULE_DEVICE_TABLE(spi, sca3300_ids);
static struct spi_driver sca3300_driver = {
.driver = {
.name = "sca3300",
.of_match_table = sca3300_dt_ids,
},
.probe = sca3300_probe,
.id_table = sca3300_ids,
};
module_spi_driver(sca3300_driver);
MODULE_AUTHOR("Tomas Melin <tomas.melin@vaisala.com>");
MODULE_DESCRIPTION("Murata SCA3300 SPI Accelerometer");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/ssp_accel_sensor.c
+144
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@@ -0,0 +1,144 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved.
*/
#include <linux/iio/common/ssp_sensors.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "../common/ssp_sensors/ssp_iio_sensor.h"
#define SSP_CHANNEL_COUNT 3
#define SSP_ACCEL_NAME "ssp-accelerometer"
static const char ssp_accel_device_name[] = SSP_ACCEL_NAME;
enum ssp_accel_3d_channel {
SSP_CHANNEL_SCAN_INDEX_X,
SSP_CHANNEL_SCAN_INDEX_Y,
SSP_CHANNEL_SCAN_INDEX_Z,
SSP_CHANNEL_SCAN_INDEX_TIME,
};
static int ssp_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
u32 t;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
t = ssp_get_sensor_delay(data, SSP_ACCELEROMETER_SENSOR);
ssp_convert_to_freq(t, val, val2);
return IIO_VAL_INT_PLUS_MICRO;
default:
break;
}
return -EINVAL;
}
static int ssp_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int ret;
struct ssp_data *data = dev_get_drvdata(indio_dev->dev.parent->parent);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = ssp_convert_to_time(val, val2);
ret = ssp_change_delay(data, SSP_ACCELEROMETER_SENSOR, ret);
if (ret < 0)
dev_err(&indio_dev->dev, "accel sensor enable fail\n");
return ret;
default:
break;
}
return -EINVAL;
}
static const struct iio_info ssp_accel_iio_info = {
.read_raw = &ssp_accel_read_raw,
.write_raw = &ssp_accel_write_raw,
};
static const unsigned long ssp_accel_scan_mask[] = { 0x7, 0, };
static const struct iio_chan_spec ssp_acc_channels[] = {
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_X, SSP_CHANNEL_SCAN_INDEX_X),
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_Y, SSP_CHANNEL_SCAN_INDEX_Y),
SSP_CHANNEL_AG(IIO_ACCEL, IIO_MOD_Z, SSP_CHANNEL_SCAN_INDEX_Z),
IIO_CHAN_SOFT_TIMESTAMP(SSP_CHANNEL_SCAN_INDEX_TIME),
};
static int ssp_process_accel_data(struct iio_dev *indio_dev, void *buf,
int64_t timestamp)
{
return ssp_common_process_data(indio_dev, buf, SSP_ACCELEROMETER_SIZE,
timestamp);
}
static const struct iio_buffer_setup_ops ssp_accel_buffer_ops = {
.postenable = &ssp_common_buffer_postenable,
.postdisable = &ssp_common_buffer_postdisable,
};
static int ssp_accel_probe(struct platform_device *pdev)
{
int ret;
struct iio_dev *indio_dev;
struct ssp_sensor_data *spd;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*spd));
if (!indio_dev)
return -ENOMEM;
spd = iio_priv(indio_dev);
spd->process_data = ssp_process_accel_data;
spd->type = SSP_ACCELEROMETER_SENSOR;
indio_dev->name = ssp_accel_device_name;
indio_dev->info = &ssp_accel_iio_info;
indio_dev->channels = ssp_acc_channels;
indio_dev->num_channels = ARRAY_SIZE(ssp_acc_channels);
indio_dev->available_scan_masks = ssp_accel_scan_mask;
ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev,
&ssp_accel_buffer_ops);
if (ret)
return ret;
platform_set_drvdata(pdev, indio_dev);
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0)
return ret;
/* ssp registering should be done after all iio setup */
ssp_register_consumer(indio_dev, SSP_ACCELEROMETER_SENSOR);
return 0;
}
static struct platform_driver ssp_accel_driver = {
.driver = {
.name = SSP_ACCEL_NAME,
},
.probe = ssp_accel_probe,
};
module_platform_driver(ssp_accel_driver);
MODULE_AUTHOR("Karol Wrona <k.wrona@samsung.com>");
MODULE_DESCRIPTION("Samsung sensorhub accelerometers driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_SSP_SENSORS");
linux-7.2.3/drivers/iio/accel/st_accel.h
+58
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@@ -0,0 +1,58 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <denis.ciocca@st.com>
* v. 1.0.0
*/
#ifndef ST_ACCEL_H
#define ST_ACCEL_H
#include <linux/types.h>
#include <linux/iio/common/st_sensors.h>
#define H3LIS331DL_ACCEL_DEV_NAME "h3lis331dl_accel"
#define LIS3LV02DL_ACCEL_DEV_NAME "lis3lv02dl_accel"
#define LSM303DLHC_ACCEL_DEV_NAME "lsm303dlhc_accel"
#define LIS3DH_ACCEL_DEV_NAME "lis3dh"
#define LSM330D_ACCEL_DEV_NAME "lsm330d_accel"
#define LSM330DL_ACCEL_DEV_NAME "lsm330dl_accel"
#define LSM330DLC_ACCEL_DEV_NAME "lsm330dlc_accel"
#define LIS331DL_ACCEL_DEV_NAME "lis331dl_accel"
#define LIS331DLH_ACCEL_DEV_NAME "lis331dlh"
#define LSM303DL_ACCEL_DEV_NAME "lsm303dl_accel"
#define LSM303DLH_ACCEL_DEV_NAME "lsm303dlh_accel"
#define LSM303DLM_ACCEL_DEV_NAME "lsm303dlm_accel"
#define LSM330_ACCEL_DEV_NAME "lsm330_accel"
#define LSM303AGR_ACCEL_DEV_NAME "lsm303agr_accel"
#define LIS2DH12_ACCEL_DEV_NAME "lis2dh12_accel"
#define LIS3L02DQ_ACCEL_DEV_NAME "lis3l02dq"
#define LNG2DM_ACCEL_DEV_NAME "lng2dm"
#define LIS2DW12_ACCEL_DEV_NAME "lis2dw12"
#define LIS3DHH_ACCEL_DEV_NAME "lis3dhh"
#define LIS3DE_ACCEL_DEV_NAME "lis3de"
#define LIS2DE12_ACCEL_DEV_NAME "lis2de12"
#define LIS2DS12_ACCEL_DEV_NAME "lis2ds12"
#define LIS2HH12_ACCEL_DEV_NAME "lis2hh12"
#define LIS302DL_ACCEL_DEV_NAME "lis302dl"
#define LSM303C_ACCEL_DEV_NAME "lsm303c_accel"
#define SC7A20_ACCEL_DEV_NAME "sc7a20"
#define IIS328DQ_ACCEL_DEV_NAME "iis328dq"
#ifdef CONFIG_IIO_BUFFER
int st_accel_allocate_ring(struct iio_dev *indio_dev);
int st_accel_trig_set_state(struct iio_trigger *trig, bool state);
#define ST_ACCEL_TRIGGER_SET_STATE (&st_accel_trig_set_state)
#else /* CONFIG_IIO_BUFFER */
static inline int st_accel_allocate_ring(struct iio_dev *indio_dev)
{
return 0;
}
#define ST_ACCEL_TRIGGER_SET_STATE NULL
#endif /* CONFIG_IIO_BUFFER */
#endif /* ST_ACCEL_H */
linux-7.2.3/drivers/iio/accel/st_accel_buffer.c
+66
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@@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <denis.ciocca@st.com>
*/
#include <linux/kernel.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/common/st_sensors.h>
#include "st_accel.h"
int st_accel_trig_set_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
return st_sensors_set_dataready_irq(indio_dev, state);
}
static int st_accel_buffer_postenable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]);
if (err < 0)
return err;
err = st_sensors_set_enable(indio_dev, true);
if (err < 0)
goto st_accel_buffer_enable_all_axis;
return 0;
st_accel_buffer_enable_all_axis:
st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS);
return err;
}
static int st_accel_buffer_predisable(struct iio_dev *indio_dev)
{
int err;
err = st_sensors_set_enable(indio_dev, false);
if (err < 0)
return err;
return st_sensors_set_axis_enable(indio_dev,
ST_SENSORS_ENABLE_ALL_AXIS);
}
static const struct iio_buffer_setup_ops st_accel_buffer_setup_ops = {
.postenable = &st_accel_buffer_postenable,
.predisable = &st_accel_buffer_predisable,
};
int st_accel_allocate_ring(struct iio_dev *indio_dev)
{
return devm_iio_triggered_buffer_setup(indio_dev->dev.parent, indio_dev,
NULL, &st_sensors_trigger_handler, &st_accel_buffer_setup_ops);
}
linux-7.2.3/drivers/iio/accel/st_accel_core.c
+1622
View File
File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/iio/accel/st_accel_i2c.c
+218
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@@ -0,0 +1,218 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <denis.ciocca@st.com>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors_i2c.h>
#include "st_accel.h"
static const struct of_device_id st_accel_of_match[] = {
{
/* An older compatible */
.compatible = "st,lis3lv02d",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3lv02dl-accel",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlh-accel",
.data = LSM303DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlhc-accel",
.data = LSM303DLHC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dh-accel",
.data = LIS3DH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330d-accel",
.data = LSM330D_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dl-accel",
.data = LSM330DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-accel",
.data = LSM330DLC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dl-accel",
.data = LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dlh-accel",
.data = LIS331DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dl-accel",
.data = LSM303DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303dlm-accel",
.data = LSM303DLM_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330-accel",
.data = LSM330_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303agr-accel",
.data = LSM303AGR_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dh12-accel",
.data = LIS2DH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,h3lis331dl-accel",
.data = H3LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3l02dq",
.data = LIS3L02DQ_ACCEL_DEV_NAME,
},
{
.compatible = "st,lng2dm-accel",
.data = LNG2DM_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dw12",
.data = LIS2DW12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3de",
.data = LIS3DE_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2de12",
.data = LIS2DE12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2ds12",
.data = LIS2DS12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2hh12",
.data = LIS2HH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis302dl",
.data = LIS302DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303c-accel",
.data = LSM303C_ACCEL_DEV_NAME,
},
{
.compatible = "silan,sc7a20",
.data = SC7A20_ACCEL_DEV_NAME,
},
{
.compatible = "st,iis328dq",
.data = IIS328DQ_ACCEL_DEV_NAME,
},
{ }
};
MODULE_DEVICE_TABLE(of, st_accel_of_match);
static const struct acpi_device_id st_accel_acpi_match[] = {
{"SMO8840", (kernel_ulong_t)LIS2DH12_ACCEL_DEV_NAME},
{"SMO8A90", (kernel_ulong_t)LNG2DM_ACCEL_DEV_NAME},
{ }
};
MODULE_DEVICE_TABLE(acpi, st_accel_acpi_match);
static const struct i2c_device_id st_accel_id_table[] = {
{ .name = LSM303DLH_ACCEL_DEV_NAME },
{ .name = LSM303DLHC_ACCEL_DEV_NAME },
{ .name = LIS3DH_ACCEL_DEV_NAME },
{ .name = LSM330D_ACCEL_DEV_NAME },
{ .name = LSM330DL_ACCEL_DEV_NAME },
{ .name = LSM330DLC_ACCEL_DEV_NAME },
{ .name = LIS331DLH_ACCEL_DEV_NAME },
{ .name = LSM303DL_ACCEL_DEV_NAME },
{ .name = LSM303DLM_ACCEL_DEV_NAME },
{ .name = LSM330_ACCEL_DEV_NAME },
{ .name = LSM303AGR_ACCEL_DEV_NAME },
{ .name = LIS2DH12_ACCEL_DEV_NAME },
{ .name = LIS3L02DQ_ACCEL_DEV_NAME },
{ .name = LNG2DM_ACCEL_DEV_NAME },
{ .name = H3LIS331DL_ACCEL_DEV_NAME },
{ .name = LIS331DL_ACCEL_DEV_NAME },
{ .name = LIS3LV02DL_ACCEL_DEV_NAME },
{ .name = LIS2DW12_ACCEL_DEV_NAME },
{ .name = LIS3DE_ACCEL_DEV_NAME },
{ .name = LIS2DE12_ACCEL_DEV_NAME },
{ .name = LIS2DS12_ACCEL_DEV_NAME },
{ .name = LIS2HH12_ACCEL_DEV_NAME },
{ .name = LIS302DL_ACCEL_DEV_NAME },
{ .name = LSM303C_ACCEL_DEV_NAME },
{ .name = SC7A20_ACCEL_DEV_NAME },
{ .name = IIS328DQ_ACCEL_DEV_NAME },
{ }
};
MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
static int st_accel_i2c_probe(struct i2c_client *client)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *adata;
struct iio_dev *indio_dev;
int ret;
st_sensors_dev_name_probe(&client->dev, client->name, sizeof(client->name));
settings = st_accel_get_settings(client->name);
if (!settings) {
dev_err(&client->dev, "device name %s not recognized.\n",
client->name);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adata));
if (!indio_dev)
return -ENOMEM;
adata = iio_priv(indio_dev);
adata->sensor_settings = (struct st_sensor_settings *)settings;
ret = st_sensors_i2c_configure(indio_dev, client);
if (ret < 0)
return ret;
ret = st_sensors_power_enable(indio_dev);
if (ret)
return ret;
return st_accel_common_probe(indio_dev);
}
static struct i2c_driver st_accel_driver = {
.driver = {
.name = "st-accel-i2c",
.of_match_table = st_accel_of_match,
.acpi_match_table = st_accel_acpi_match,
},
.probe = st_accel_i2c_probe,
.id_table = st_accel_id_table,
};
module_i2c_driver(st_accel_driver);
MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
MODULE_DESCRIPTION("STMicroelectronics accelerometers i2c driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ST_SENSORS");
linux-7.2.3/drivers/iio/accel/st_accel_spi.c
+186
View File
@@ -0,0 +1,186 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* STMicroelectronics accelerometers driver
*
* Copyright 2012-2013 STMicroelectronics Inc.
*
* Denis Ciocca <denis.ciocca@st.com>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/common/st_sensors.h>
#include <linux/iio/common/st_sensors_spi.h>
#include "st_accel.h"
/*
* For new single-chip sensors use <device_name> as compatible string.
* For old single-chip devices keep <device_name>-accel to maintain
* compatibility
*/
static const struct of_device_id st_accel_of_match[] = {
{
/* An older compatible */
.compatible = "st,lis302dl-spi",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3lv02dl-accel",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dh-accel",
.data = LIS3DH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330d-accel",
.data = LSM330D_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dl-accel",
.data = LSM330DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330dlc-accel",
.data = LSM330DLC_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dlh-accel",
.data = LIS331DLH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm330-accel",
.data = LSM330_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303agr-accel",
.data = LSM303AGR_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dh12-accel",
.data = LIS2DH12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2ds12",
.data = LIS2DS12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3l02dq",
.data = LIS3L02DQ_ACCEL_DEV_NAME,
},
{
.compatible = "st,lng2dm-accel",
.data = LNG2DM_ACCEL_DEV_NAME,
},
{
.compatible = "st,h3lis331dl-accel",
.data = H3LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis331dl-accel",
.data = LIS331DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis2dw12",
.data = LIS2DW12_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3dhh",
.data = LIS3DHH_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3de",
.data = LIS3DE_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis302dl",
.data = LIS302DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lsm303c-accel",
.data = LSM303C_ACCEL_DEV_NAME,
},
{
.compatible = "st,iis328dq",
.data = IIS328DQ_ACCEL_DEV_NAME,
},
{ }
};
MODULE_DEVICE_TABLE(of, st_accel_of_match);
static int st_accel_spi_probe(struct spi_device *spi)
{
const struct st_sensor_settings *settings;
struct st_sensor_data *adata;
struct iio_dev *indio_dev;
int err;
st_sensors_dev_name_probe(&spi->dev, spi->modalias, sizeof(spi->modalias));
settings = st_accel_get_settings(spi->modalias);
if (!settings) {
dev_err(&spi->dev, "device name %s not recognized.\n",
spi->modalias);
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adata));
if (!indio_dev)
return -ENOMEM;
adata = iio_priv(indio_dev);
adata->sensor_settings = (struct st_sensor_settings *)settings;
err = st_sensors_spi_configure(indio_dev, spi);
if (err < 0)
return err;
err = st_sensors_power_enable(indio_dev);
if (err)
return err;
return st_accel_common_probe(indio_dev);
}
static const struct spi_device_id st_accel_id_table[] = {
{ LIS3DH_ACCEL_DEV_NAME },
{ LSM330D_ACCEL_DEV_NAME },
{ LSM330DL_ACCEL_DEV_NAME },
{ LSM330DLC_ACCEL_DEV_NAME },
{ LIS331DLH_ACCEL_DEV_NAME },
{ LSM330_ACCEL_DEV_NAME },
{ LSM303AGR_ACCEL_DEV_NAME },
{ LIS2DH12_ACCEL_DEV_NAME },
{ LIS2DS12_ACCEL_DEV_NAME },
{ LIS3L02DQ_ACCEL_DEV_NAME },
{ LNG2DM_ACCEL_DEV_NAME },
{ H3LIS331DL_ACCEL_DEV_NAME },
{ LIS331DL_ACCEL_DEV_NAME },
{ LIS3LV02DL_ACCEL_DEV_NAME },
{ LIS2DW12_ACCEL_DEV_NAME },
{ LIS3DHH_ACCEL_DEV_NAME },
{ LIS3DE_ACCEL_DEV_NAME },
{ LIS302DL_ACCEL_DEV_NAME },
{ LSM303C_ACCEL_DEV_NAME },
{ IIS328DQ_ACCEL_DEV_NAME },
{ }
};
MODULE_DEVICE_TABLE(spi, st_accel_id_table);
static struct spi_driver st_accel_driver = {
.driver = {
.name = "st-accel-spi",
.of_match_table = st_accel_of_match,
},
.probe = st_accel_spi_probe,
.id_table = st_accel_id_table,
};
module_spi_driver(st_accel_driver);
MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
MODULE_DESCRIPTION("STMicroelectronics accelerometers spi driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("IIO_ST_SENSORS");
linux-7.2.3/drivers/iio/accel/stk8312.c
+653
View File
@@ -0,0 +1,653 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Sensortek STK8312 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* IIO driver for STK8312; 7-bit I2C address: 0x3D.
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/types.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define STK8312_REG_XOUT 0x00
#define STK8312_REG_YOUT 0x01
#define STK8312_REG_ZOUT 0x02
#define STK8312_REG_INTSU 0x06
#define STK8312_REG_MODE 0x07
#define STK8312_REG_SR 0x08
#define STK8312_REG_STH 0x13
#define STK8312_REG_RESET 0x20
#define STK8312_REG_AFECTRL 0x24
#define STK8312_REG_OTPADDR 0x3D
#define STK8312_REG_OTPDATA 0x3E
#define STK8312_REG_OTPCTRL 0x3F
#define STK8312_MODE_ACTIVE BIT(0)
#define STK8312_MODE_STANDBY 0x00
#define STK8312_MODE_INT_AH_PP 0xC0 /* active-high, push-pull */
#define STK8312_DREADY_BIT BIT(4)
#define STK8312_RNG_6G 1
#define STK8312_RNG_SHIFT 6
#define STK8312_RNG_MASK GENMASK(7, 6)
#define STK8312_SR_MASK GENMASK(2, 0)
#define STK8312_SR_400HZ_IDX 0
#define STK8312_ALL_CHANNEL_MASK GENMASK(2, 0)
#define STK8312_ALL_CHANNEL_SIZE 3
#define STK8312_DRIVER_NAME "stk8312"
/*
* The accelerometer has two measurement ranges:
*
* -6g - +6g (8-bit, signed)
* -16g - +16g (8-bit, signed)
*
* scale1 = (6 + 6) * 9.81 / (2^8 - 1) = 0.4616
* scale2 = (16 + 16) * 9.81 / (2^8 - 1) = 1.2311
*/
#define STK8312_SCALE_AVAIL "0.4616 1.2311"
static const int stk8312_scale_table[][2] = {
{0, 461600}, {1, 231100}
};
static const struct {
int val;
int val2;
} stk8312_samp_freq_table[] = {
{400, 0}, {200, 0}, {100, 0}, {50, 0}, {25, 0},
{12, 500000}, {6, 250000}, {3, 125000}
};
#define STK8312_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 8, \
.storagebits = 8, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec stk8312_channels[] = {
STK8312_ACCEL_CHANNEL(0, STK8312_REG_XOUT, X),
STK8312_ACCEL_CHANNEL(1, STK8312_REG_YOUT, Y),
STK8312_ACCEL_CHANNEL(2, STK8312_REG_ZOUT, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
struct stk8312_data {
struct i2c_client *client;
struct mutex lock;
u8 range;
u8 sample_rate_idx;
u8 mode;
struct iio_trigger *dready_trig;
bool dready_trigger_on;
/* Ensure timestamp is naturally aligned */
struct {
s8 chans[3];
aligned_s64 timestamp;
} scan;
};
static IIO_CONST_ATTR(in_accel_scale_available, STK8312_SCALE_AVAIL);
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("3.125 6.25 12.5 25 50 100 200 400");
static struct attribute *stk8312_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group stk8312_attribute_group = {
.attrs = stk8312_attributes
};
static int stk8312_otp_init(struct stk8312_data *data)
{
int ret;
int count = 10;
struct i2c_client *client = data->client;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPADDR, 0x70);
if (ret < 0)
goto exit_err;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPCTRL, 0x02);
if (ret < 0)
goto exit_err;
do {
usleep_range(1000, 5000);
ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPCTRL);
if (ret < 0)
goto exit_err;
count--;
} while (!(ret & BIT(7)) && count > 0);
if (count == 0) {
ret = -ETIMEDOUT;
goto exit_err;
}
ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPDATA);
if (ret == 0)
ret = -EINVAL;
if (ret < 0)
goto exit_err;
ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_AFECTRL, ret);
if (ret < 0)
goto exit_err;
msleep(150);
return 0;
exit_err:
dev_err(&client->dev, "failed to initialize sensor\n");
return ret;
}
static int stk8312_set_mode(struct stk8312_data *data, u8 mode)
{
int ret;
struct i2c_client *client = data->client;
if (mode == data->mode)
return 0;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_MODE, mode);
if (ret < 0) {
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
data->mode = mode;
if (mode & STK8312_MODE_ACTIVE) {
/* Need to run OTP sequence before entering active mode */
usleep_range(1000, 5000);
ret = stk8312_otp_init(data);
}
return ret;
}
static int stk8312_set_interrupts(struct stk8312_data *data, u8 int_mask)
{
int ret;
u8 mode;
struct i2c_client *client = data->client;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_INTSU, int_mask);
if (ret < 0) {
dev_err(&client->dev, "failed to set interrupts\n");
stk8312_set_mode(data, mode);
return ret;
}
return stk8312_set_mode(data, mode);
}
static int stk8312_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct stk8312_data *data = iio_priv(indio_dev);
int ret;
if (state)
ret = stk8312_set_interrupts(data, STK8312_DREADY_BIT);
else
ret = stk8312_set_interrupts(data, 0x00);
if (ret < 0) {
dev_err(&data->client->dev, "failed to set trigger state\n");
return ret;
}
data->dready_trigger_on = state;
return 0;
}
static const struct iio_trigger_ops stk8312_trigger_ops = {
.set_trigger_state = stk8312_data_rdy_trigger_set_state,
};
static int stk8312_set_sample_rate(struct stk8312_data *data, u8 rate)
{
int ret;
u8 masked_reg;
u8 mode;
struct i2c_client *client = data->client;
if (rate == data->sample_rate_idx)
return 0;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(client, STK8312_REG_SR);
if (ret < 0)
goto err_activate;
masked_reg = (ret & (~STK8312_SR_MASK)) | rate;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_SR, masked_reg);
if (ret < 0)
goto err_activate;
data->sample_rate_idx = rate;
return stk8312_set_mode(data, mode);
err_activate:
dev_err(&client->dev, "failed to set sampling rate\n");
stk8312_set_mode(data, mode);
return ret;
}
static int stk8312_set_range(struct stk8312_data *data, u8 range)
{
int ret;
u8 masked_reg;
u8 mode;
struct i2c_client *client = data->client;
if (range != 1 && range != 2)
return -EINVAL;
else if (range == data->range)
return 0;
mode = data->mode;
/* We need to go in standby mode to modify registers */
ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
if (ret < 0)
return ret;
ret = i2c_smbus_read_byte_data(client, STK8312_REG_STH);
if (ret < 0)
goto err_activate;
masked_reg = ret & (~STK8312_RNG_MASK);
masked_reg |= range << STK8312_RNG_SHIFT;
ret = i2c_smbus_write_byte_data(client, STK8312_REG_STH, masked_reg);
if (ret < 0)
goto err_activate;
data->range = range;
return stk8312_set_mode(data, mode);
err_activate:
dev_err(&client->dev, "failed to change sensor range\n");
stk8312_set_mode(data, mode);
return ret;
}
static int stk8312_read_accel(struct stk8312_data *data, u8 address)
{
int ret;
struct i2c_client *client = data->client;
if (address > 2)
return -EINVAL;
ret = i2c_smbus_read_byte_data(client, address);
if (ret < 0)
dev_err(&client->dev, "register read failed\n");
return ret;
}
static int stk8312_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct stk8312_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
mutex_lock(&data->lock);
ret = stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
if (ret < 0) {
mutex_unlock(&data->lock);
return ret;
}
ret = stk8312_read_accel(data, chan->address);
if (ret < 0) {
stk8312_set_mode(data,
data->mode & (~STK8312_MODE_ACTIVE));
mutex_unlock(&data->lock);
return ret;
}
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
ret = stk8312_set_mode(data,
data->mode & (~STK8312_MODE_ACTIVE));
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = stk8312_scale_table[data->range - 1][0];
*val2 = stk8312_scale_table[data->range - 1][1];
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = stk8312_samp_freq_table[data->sample_rate_idx].val;
*val2 = stk8312_samp_freq_table[data->sample_rate_idx].val2;
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int stk8312_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int i;
int index = -1;
int ret;
struct stk8312_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
for (i = 0; i < ARRAY_SIZE(stk8312_scale_table); i++)
if (val == stk8312_scale_table[i][0] &&
val2 == stk8312_scale_table[i][1]) {
index = i + 1;
break;
}
if (index < 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = stk8312_set_range(data, index);
mutex_unlock(&data->lock);
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
for (i = 0; i < ARRAY_SIZE(stk8312_samp_freq_table); i++)
if (val == stk8312_samp_freq_table[i].val &&
val2 == stk8312_samp_freq_table[i].val2) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
mutex_lock(&data->lock);
ret = stk8312_set_sample_rate(data, index);
mutex_unlock(&data->lock);
return ret;
}
return -EINVAL;
}
static const struct iio_info stk8312_info = {
.read_raw = stk8312_read_raw,
.write_raw = stk8312_write_raw,
.attrs = &stk8312_attribute_group,
};
static irqreturn_t stk8312_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct stk8312_data *data = iio_priv(indio_dev);
int bit, ret, i = 0;
mutex_lock(&data->lock);
/*
* Do a bulk read if all channels are requested,
* from 0x00 (XOUT) to 0x02 (ZOUT)
*/
if (*(indio_dev->active_scan_mask) == STK8312_ALL_CHANNEL_MASK) {
ret = i2c_smbus_read_i2c_block_data(data->client,
STK8312_REG_XOUT,
STK8312_ALL_CHANNEL_SIZE,
data->scan.chans);
if (ret < STK8312_ALL_CHANNEL_SIZE) {
dev_err(&data->client->dev, "register read failed\n");
mutex_unlock(&data->lock);
goto err;
}
} else {
iio_for_each_active_channel(indio_dev, bit) {
ret = stk8312_read_accel(data, bit);
if (ret < 0) {
mutex_unlock(&data->lock);
goto err;
}
data->scan.chans[i++] = ret;
}
}
mutex_unlock(&data->lock);
iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
pf->timestamp);
err:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t stk8312_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct stk8312_data *data = iio_priv(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
return IRQ_HANDLED;
}
static int stk8312_buffer_preenable(struct iio_dev *indio_dev)
{
struct stk8312_data *data = iio_priv(indio_dev);
return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
}
static int stk8312_buffer_postdisable(struct iio_dev *indio_dev)
{
struct stk8312_data *data = iio_priv(indio_dev);
return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
}
static const struct iio_buffer_setup_ops stk8312_buffer_setup_ops = {
.preenable = stk8312_buffer_preenable,
.postdisable = stk8312_buffer_postdisable,
};
static int stk8312_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct stk8312_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
indio_dev->info = &stk8312_info;
indio_dev->name = STK8312_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = stk8312_channels;
indio_dev->num_channels = ARRAY_SIZE(stk8312_channels);
/* A software reset is recommended at power-on */
ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_RESET, 0x00);
if (ret < 0) {
dev_err(&client->dev, "failed to reset sensor\n");
return ret;
}
data->sample_rate_idx = STK8312_SR_400HZ_IDX;
ret = stk8312_set_range(data, STK8312_RNG_6G);
if (ret < 0)
return ret;
ret = stk8312_set_mode(data,
STK8312_MODE_INT_AH_PP | STK8312_MODE_ACTIVE);
if (ret < 0)
return ret;
if (client->irq > 0) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
stk8312_data_rdy_trig_poll,
NULL,
IRQF_TRIGGER_RISING |
IRQF_ONESHOT,
"stk8312_event",
indio_dev);
if (ret < 0) {
dev_err(&client->dev, "request irq %d failed\n",
client->irq);
goto err_power_off;
}
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig) {
ret = -ENOMEM;
goto err_power_off;
}
data->dready_trig->ops = &stk8312_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret) {
dev_err(&client->dev, "iio trigger register failed\n");
goto err_power_off;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
stk8312_trigger_handler,
&stk8312_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
goto err_buffer_cleanup;
}
return 0;
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
err_power_off:
stk8312_set_mode(data, STK8312_MODE_STANDBY);
return ret;
}
static void stk8312_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct stk8312_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
stk8312_set_mode(data, STK8312_MODE_STANDBY);
}
static int stk8312_suspend(struct device *dev)
{
struct stk8312_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
}
static int stk8312_resume(struct device *dev)
{
struct stk8312_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
}
static DEFINE_SIMPLE_DEV_PM_OPS(stk8312_pm_ops, stk8312_suspend,
stk8312_resume);
static const struct i2c_device_id stk8312_i2c_id[] = {
/* Deprecated in favour of lowercase form */
{ .name = "STK8312" },
{ .name = "stk8312" },
{ }
};
MODULE_DEVICE_TABLE(i2c, stk8312_i2c_id);
static struct i2c_driver stk8312_driver = {
.driver = {
.name = STK8312_DRIVER_NAME,
.pm = pm_sleep_ptr(&stk8312_pm_ops),
},
.probe = stk8312_probe,
.remove = stk8312_remove,
.id_table = stk8312_i2c_id,
};
module_i2c_driver(stk8312_driver);
MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
MODULE_DESCRIPTION("STK8312 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");
linux-7.2.3/drivers/iio/accel/stk8ba50.c
+548
View File
@@ -0,0 +1,548 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Sensortek STK8BA50 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
*
* STK8BA50 7-bit I2C address: 0x18.
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#define STK8BA50_REG_XOUT 0x02
#define STK8BA50_REG_YOUT 0x04
#define STK8BA50_REG_ZOUT 0x06
#define STK8BA50_REG_RANGE 0x0F
#define STK8BA50_REG_BWSEL 0x10
#define STK8BA50_REG_POWMODE 0x11
#define STK8BA50_REG_SWRST 0x14
#define STK8BA50_REG_INTEN2 0x17
#define STK8BA50_REG_INTMAP2 0x1A
#define STK8BA50_MODE_NORMAL 0
#define STK8BA50_MODE_SUSPEND 1
#define STK8BA50_MODE_POWERBIT BIT(7)
#define STK8BA50_DATA_SHIFT 6
#define STK8BA50_RESET_CMD 0xB6
#define STK8BA50_SR_1792HZ_IDX 7
#define STK8BA50_DREADY_INT_MASK 0x10
#define STK8BA50_DREADY_INT_MAP 0x81
#define STK8BA50_ALL_CHANNEL_MASK 7
#define STK8BA50_ALL_CHANNEL_SIZE 6
#define STK8BA50_DRIVER_NAME "stk8ba50"
#define STK8BA50_SCALE_AVAIL "0.0384 0.0767 0.1534 0.3069"
/*
* The accelerometer has four measurement ranges:
* +/-2g; +/-4g; +/-8g; +/-16g
*
* Acceleration values are 10-bit, 2's complement.
* Scales are calculated as following:
*
* scale1 = (2 + 2) * 9.81 / (2^10 - 1) = 0.0384
* scale2 = (4 + 4) * 9.81 / (2^10 - 1) = 0.0767
* etc.
*
* Scales are stored in this format:
* { <register value>, <scale value> }
*
* Locally, the range is stored as a table index.
*/
static const struct {
u8 reg_val;
u32 scale_val;
} stk8ba50_scale_table[] = {
{3, 38400}, {5, 76700}, {8, 153400}, {12, 306900}
};
/* Sample rates are stored as { <register value>, <Hz value> } */
static const struct {
u8 reg_val;
u16 samp_freq;
} stk8ba50_samp_freq_table[] = {
{0x08, 14}, {0x09, 25}, {0x0A, 56}, {0x0B, 112},
{0x0C, 224}, {0x0D, 448}, {0x0E, 896}, {0x0F, 1792}
};
/* Used to map scan mask bits to their corresponding channel register. */
static const int stk8ba50_channel_table[] = {
STK8BA50_REG_XOUT,
STK8BA50_REG_YOUT,
STK8BA50_REG_ZOUT
};
struct stk8ba50_data {
struct i2c_client *client;
struct mutex lock;
int range;
u8 sample_rate_idx;
struct iio_trigger *dready_trig;
bool dready_trigger_on;
/* Ensure timestamp is naturally aligned */
struct {
s16 chans[3];
aligned_s64 timetamp;
} scan;
};
#define STK8BA50_ACCEL_CHANNEL(index, reg, axis) { \
.type = IIO_ACCEL, \
.address = reg, \
.modified = 1, \
.channel2 = IIO_MOD_##axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = index, \
.scan_type = { \
.sign = 's', \
.realbits = 10, \
.storagebits = 16, \
.shift = STK8BA50_DATA_SHIFT, \
.endianness = IIO_CPU, \
}, \
}
static const struct iio_chan_spec stk8ba50_channels[] = {
STK8BA50_ACCEL_CHANNEL(0, STK8BA50_REG_XOUT, X),
STK8BA50_ACCEL_CHANNEL(1, STK8BA50_REG_YOUT, Y),
STK8BA50_ACCEL_CHANNEL(2, STK8BA50_REG_ZOUT, Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static IIO_CONST_ATTR(in_accel_scale_available, STK8BA50_SCALE_AVAIL);
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("14 25 56 112 224 448 896 1792");
static struct attribute *stk8ba50_attributes[] = {
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL,
};
static const struct attribute_group stk8ba50_attribute_group = {
.attrs = stk8ba50_attributes
};
static int stk8ba50_read_accel(struct stk8ba50_data *data, u8 reg)
{
int ret;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_word_data(client, reg);
if (ret < 0) {
dev_err(&client->dev, "register read failed\n");
return ret;
}
return ret;
}
static int stk8ba50_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct stk8ba50_data *data = iio_priv(indio_dev);
int ret;
if (state)
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_INTEN2, STK8BA50_DREADY_INT_MASK);
else
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_INTEN2, 0x00);
if (ret < 0)
dev_err(&data->client->dev, "failed to set trigger state\n");
else
data->dready_trigger_on = state;
return ret;
}
static const struct iio_trigger_ops stk8ba50_trigger_ops = {
.set_trigger_state = stk8ba50_data_rdy_trigger_set_state,
};
static int stk8ba50_set_power(struct stk8ba50_data *data, bool mode)
{
int ret;
u8 masked_reg;
struct i2c_client *client = data->client;
ret = i2c_smbus_read_byte_data(client, STK8BA50_REG_POWMODE);
if (ret < 0)
goto exit_err;
if (mode)
masked_reg = ret | STK8BA50_MODE_POWERBIT;
else
masked_reg = ret & (~STK8BA50_MODE_POWERBIT);
ret = i2c_smbus_write_byte_data(client, STK8BA50_REG_POWMODE,
masked_reg);
if (ret < 0)
goto exit_err;
return ret;
exit_err:
dev_err(&client->dev, "failed to change sensor mode\n");
return ret;
}
static int stk8ba50_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (iio_buffer_enabled(indio_dev))
return -EBUSY;
mutex_lock(&data->lock);
ret = stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
if (ret < 0) {
mutex_unlock(&data->lock);
return -EINVAL;
}
ret = stk8ba50_read_accel(data, chan->address);
if (ret < 0) {
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
mutex_unlock(&data->lock);
return -EINVAL;
}
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
mutex_unlock(&data->lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = stk8ba50_scale_table[data->range].scale_val;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = stk8ba50_samp_freq_table
[data->sample_rate_idx].samp_freq;
*val2 = 0;
return IIO_VAL_INT;
}
return -EINVAL;
}
static int stk8ba50_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
int ret;
int i;
int index = -1;
struct stk8ba50_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(stk8ba50_scale_table); i++)
if (val2 == stk8ba50_scale_table[i].scale_val) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_RANGE,
stk8ba50_scale_table[index].reg_val);
if (ret < 0)
dev_err(&data->client->dev,
"failed to set measurement range\n");
else
data->range = index;
return ret;
case IIO_CHAN_INFO_SAMP_FREQ:
for (i = 0; i < ARRAY_SIZE(stk8ba50_samp_freq_table); i++)
if (val == stk8ba50_samp_freq_table[i].samp_freq) {
index = i;
break;
}
if (index < 0)
return -EINVAL;
ret = i2c_smbus_write_byte_data(data->client,
STK8BA50_REG_BWSEL,
stk8ba50_samp_freq_table[index].reg_val);
if (ret < 0)
dev_err(&data->client->dev,
"failed to set sampling rate\n");
else
data->sample_rate_idx = index;
return ret;
}
return -EINVAL;
}
static const struct iio_info stk8ba50_info = {
.read_raw = stk8ba50_read_raw,
.write_raw = stk8ba50_write_raw,
.attrs = &stk8ba50_attribute_group,
};
static irqreturn_t stk8ba50_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct stk8ba50_data *data = iio_priv(indio_dev);
int bit, ret, i = 0;
mutex_lock(&data->lock);
/*
* Do a bulk read if all channels are requested,
* from 0x02 (XOUT1) to 0x07 (ZOUT2)
*/
if (*(indio_dev->active_scan_mask) == STK8BA50_ALL_CHANNEL_MASK) {
ret = i2c_smbus_read_i2c_block_data(data->client,
STK8BA50_REG_XOUT,
STK8BA50_ALL_CHANNEL_SIZE,
(u8 *)data->scan.chans);
if (ret < STK8BA50_ALL_CHANNEL_SIZE) {
dev_err(&data->client->dev, "register read failed\n");
goto err;
}
} else {
iio_for_each_active_channel(indio_dev, bit) {
ret = stk8ba50_read_accel(data,
stk8ba50_channel_table[bit]);
if (ret < 0)
goto err;
data->scan.chans[i++] = ret;
}
}
iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
pf->timestamp);
err:
mutex_unlock(&data->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t stk8ba50_data_rdy_trig_poll(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct stk8ba50_data *data = iio_priv(indio_dev);
if (data->dready_trigger_on)
iio_trigger_poll(data->dready_trig);
return IRQ_HANDLED;
}
static int stk8ba50_buffer_preenable(struct iio_dev *indio_dev)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
return stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
}
static int stk8ba50_buffer_postdisable(struct iio_dev *indio_dev)
{
struct stk8ba50_data *data = iio_priv(indio_dev);
return stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static const struct iio_buffer_setup_ops stk8ba50_buffer_setup_ops = {
.preenable = stk8ba50_buffer_preenable,
.postdisable = stk8ba50_buffer_postdisable,
};
static int stk8ba50_probe(struct i2c_client *client)
{
int ret;
struct iio_dev *indio_dev;
struct stk8ba50_data *data;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
data->client = client;
i2c_set_clientdata(client, indio_dev);
mutex_init(&data->lock);
indio_dev->info = &stk8ba50_info;
indio_dev->name = STK8BA50_DRIVER_NAME;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = stk8ba50_channels;
indio_dev->num_channels = ARRAY_SIZE(stk8ba50_channels);
/* Reset all registers on startup */
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_SWRST, STK8BA50_RESET_CMD);
if (ret < 0) {
dev_err(&client->dev, "failed to reset sensor\n");
goto err_power_off;
}
/* The default range is +/-2g */
data->range = 0;
/* The default sampling rate is 1792 Hz (maximum) */
data->sample_rate_idx = STK8BA50_SR_1792HZ_IDX;
/* Set up interrupts */
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_INTEN2, STK8BA50_DREADY_INT_MASK);
if (ret < 0) {
dev_err(&client->dev, "failed to set up interrupts\n");
goto err_power_off;
}
ret = i2c_smbus_write_byte_data(client,
STK8BA50_REG_INTMAP2, STK8BA50_DREADY_INT_MAP);
if (ret < 0) {
dev_err(&client->dev, "failed to set up interrupts\n");
goto err_power_off;
}
if (client->irq > 0) {
ret = devm_request_irq(&client->dev, client->irq,
stk8ba50_data_rdy_trig_poll,
IRQF_TRIGGER_RISING | IRQF_NO_THREAD,
"stk8ba50_event", indio_dev);
if (ret < 0) {
dev_err(&client->dev, "request irq %d failed\n",
client->irq);
goto err_power_off;
}
data->dready_trig = devm_iio_trigger_alloc(&client->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!data->dready_trig) {
ret = -ENOMEM;
goto err_power_off;
}
data->dready_trig->ops = &stk8ba50_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);
if (ret) {
dev_err(&client->dev, "iio trigger register failed\n");
goto err_power_off;
}
}
ret = iio_triggered_buffer_setup(indio_dev,
iio_pollfunc_store_time,
stk8ba50_trigger_handler,
&stk8ba50_buffer_setup_ops);
if (ret < 0) {
dev_err(&client->dev, "iio triggered buffer setup failed\n");
goto err_trigger_unregister;
}
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(&client->dev, "device_register failed\n");
goto err_buffer_cleanup;
}
return ret;
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
err_power_off:
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
return ret;
}
static void stk8ba50_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct stk8ba50_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
if (data->dready_trig)
iio_trigger_unregister(data->dready_trig);
stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static int stk8ba50_suspend(struct device *dev)
{
struct stk8ba50_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8ba50_set_power(data, STK8BA50_MODE_SUSPEND);
}
static int stk8ba50_resume(struct device *dev)
{
struct stk8ba50_data *data;
data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
return stk8ba50_set_power(data, STK8BA50_MODE_NORMAL);
}
static DEFINE_SIMPLE_DEV_PM_OPS(stk8ba50_pm_ops, stk8ba50_suspend,
stk8ba50_resume);
static const struct i2c_device_id stk8ba50_i2c_id[] = {
{ .name = "stk8ba50" },
{ }
};
MODULE_DEVICE_TABLE(i2c, stk8ba50_i2c_id);
static const struct acpi_device_id stk8ba50_acpi_id[] = {
{"STK8BA50", 0},
{ }
};
MODULE_DEVICE_TABLE(acpi, stk8ba50_acpi_id);
static struct i2c_driver stk8ba50_driver = {
.driver = {
.name = "stk8ba50",
.pm = pm_sleep_ptr(&stk8ba50_pm_ops),
.acpi_match_table = stk8ba50_acpi_id,
},
.probe = stk8ba50_probe,
.remove = stk8ba50_remove,
.id_table = stk8ba50_i2c_id,
};
module_i2c_driver(stk8ba50_driver);
MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
MODULE_DESCRIPTION("STK8BA50 3-Axis Accelerometer driver");
MODULE_LICENSE("GPL v2");