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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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linux-7.2.3/drivers/iio/imu/inv_mpu6050/Kconfig
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# SPDX-License-Identifier: GPL-2.0-only
#
# inv-mpu6050 drivers for Invensense MPU devices and combos
#
config INV_MPU6050_IIO
tristate
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select IIO_INV_SENSORS_TIMESTAMP
config INV_MPU6050_I2C
tristate "Invensense MPU6050 devices (I2C)"
depends on I2C
select I2C_MUX
select INV_MPU6050_IIO
select REGMAP_I2C
help
This driver supports the Invensense MPU6050/9150,
MPU6500/6515/6880/9250/9255, ICM20608(D)/20609/20689, ICM20600/20602/20690
and IAM20680 motion tracking devices over I2C.
This driver can be built as a module. The module will be called
inv-mpu6050-i2c.
config INV_MPU6050_SPI
tristate "Invensense MPU6050 devices (SPI)"
depends on SPI_MASTER
select INV_MPU6050_IIO
select REGMAP_SPI
help
This driver supports the Invensense MPU6000,
MPU6500/6515/6880/9250/9255, ICM20608(D)/20609/20689, ICM20600/20602/20690
and IAM20680 motion tracking devices over SPI.
This driver can be built as a module. The module will be called
inv-mpu6050-spi.
linux-7.2.3/drivers/iio/imu/inv_mpu6050/Makefile
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# SPDX-License-Identifier: GPL-2.0
#
# Makefile for Invensense MPU6050 device.
#
obj-$(CONFIG_INV_MPU6050_IIO) += inv-mpu6050.o
inv-mpu6050-y := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o \
inv_mpu_aux.o inv_mpu_magn.o
obj-$(CONFIG_INV_MPU6050_I2C) += inv-mpu6050-i2c.o
inv-mpu6050-i2c-y := inv_mpu_i2c.o inv_mpu_acpi.o
obj-$(CONFIG_INV_MPU6050_SPI) += inv-mpu6050-spi.o
inv-mpu6050-spi-y := inv_mpu_spi.o
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* inv_mpu_acpi: ACPI processing for creating client devices
* Copyright (c) 2015, Intel Corporation.
*/
#ifdef CONFIG_ACPI
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <linux/wordpart.h>
#include "inv_mpu_iio.h"
enum inv_mpu_product_name {
INV_MPU_NOT_MATCHED,
INV_MPU_ASUS_T100TA,
};
static enum inv_mpu_product_name matched_product_name;
static int __init asus_t100_matched(const struct dmi_system_id *d)
{
matched_product_name = INV_MPU_ASUS_T100TA;
return 0;
}
static const struct dmi_system_id inv_mpu_dev_list[] = {
{
.callback = asus_t100_matched,
.ident = "Asus Transformer Book T100",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC"),
DMI_MATCH(DMI_PRODUCT_NAME, "T100TA"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
/* Add more matching tables here..*/
{ }
};
static int asus_acpi_get_sensor_info(struct acpi_device *adev,
struct i2c_client *client,
struct i2c_board_info *info)
{
struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
int i;
acpi_status status;
union acpi_object *cpm;
int ret;
status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer);
if (ACPI_FAILURE(status))
return -ENODEV;
cpm = buffer.pointer;
for (i = 0; i < cpm->package.count; ++i) {
union acpi_object *elem;
int j;
elem = &cpm->package.elements[i];
for (j = 0; j < elem->package.count; ++j) {
union acpi_object *sub_elem;
sub_elem = &elem->package.elements[j];
if (sub_elem->type == ACPI_TYPE_STRING)
strscpy(info->type, sub_elem->string.pointer,
sizeof(info->type));
else if (sub_elem->type == ACPI_TYPE_INTEGER) {
if (sub_elem->integer.value != client->addr) {
info->addr = sub_elem->integer.value;
break; /* Not a MPU6500 primary */
}
}
}
}
ret = cpm->package.count;
kfree(buffer.pointer);
return ret;
}
static int acpi_i2c_check_resource(struct acpi_resource *ares, void *data)
{
struct acpi_resource_i2c_serialbus *sb;
u32 *addr = data;
if (i2c_acpi_get_i2c_resource(ares, &sb)) {
if (*addr)
*addr |= (sb->slave_address << 16);
else
*addr = sb->slave_address;
}
/* Tell the ACPI core that we already copied this address */
return 1;
}
static int inv_mpu_process_acpi_config(struct i2c_client *client,
unsigned short *primary_addr,
unsigned short *secondary_addr)
{
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
u32 i2c_addr = 0;
LIST_HEAD(resources);
int ret;
if (!is_acpi_device_node(dev_fwnode(&client->dev)))
return -ENODEV;
ret = acpi_dev_get_resources(adev, &resources,
acpi_i2c_check_resource, &i2c_addr);
if (ret < 0)
return ret;
acpi_dev_free_resource_list(&resources);
*primary_addr = lower_16_bits(i2c_addr);
*secondary_addr = upper_16_bits(i2c_addr);
return 0;
}
int inv_mpu_acpi_create_mux_client(struct i2c_client *client)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(&client->dev));
struct acpi_device *adev = ACPI_COMPANION(&client->dev);
st->mux_client = NULL;
if (adev) {
struct i2c_board_info info = { };
struct i2c_client *mux_client;
int ret = -1;
dmi_check_system(inv_mpu_dev_list);
switch (matched_product_name) {
case INV_MPU_ASUS_T100TA:
ret = asus_acpi_get_sensor_info(adev, client,
&info);
break;
/* Add more matched product processing here */
default:
break;
}
if (ret < 0) {
/* No matching DMI, so create device on INV6XX type */
unsigned short primary, secondary;
ret = inv_mpu_process_acpi_config(client, &primary,
&secondary);
if (!ret && secondary) {
char *name;
info.addr = secondary;
strscpy(info.type, dev_name(&adev->dev),
sizeof(info.type));
name = strchr(info.type, ':');
if (name)
*name = '\0';
strlcat(info.type, "-client",
sizeof(info.type));
} else
return 0; /* no secondary addr, which is OK */
}
mux_client = i2c_new_client_device(st->muxc->adapter[0], &info);
if (IS_ERR(mux_client))
return PTR_ERR(mux_client);
st->mux_client = mux_client;
}
return 0;
}
void inv_mpu_acpi_delete_mux_client(struct i2c_client *client)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(&client->dev));
i2c_unregister_device(st->mux_client);
}
#else
#include "inv_mpu_iio.h"
int inv_mpu_acpi_create_mux_client(struct i2c_client *client)
{
return 0;
}
void inv_mpu_acpi_delete_mux_client(struct i2c_client *client)
{
}
#endif
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.c
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/regmap.h>
#include <linux/delay.h>
#include "inv_mpu_aux.h"
#include "inv_mpu_iio.h"
/*
* i2c master auxiliary bus transfer function.
* Requires the i2c operations to be correctly setup before.
* Disables SLV0 and checks for NACK status internally.
* Assumes that only SLV0 is used for transfers.
*/
static int inv_mpu_i2c_master_xfer(const struct inv_mpu6050_state *st)
{
/* use 50hz frequency for xfer */
const unsigned int freq = 50;
const unsigned int period_ms = 1000 / freq;
uint8_t d;
unsigned int user_ctrl;
int ret;
unsigned int status;
/* set sample rate */
d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(freq);
ret = regmap_write(st->map, st->reg->sample_rate_div, d);
if (ret)
return ret;
/* start i2c master */
user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
if (ret)
goto error_restore_rate;
/* wait for xfer: 1 period + half-period margin */
msleep(period_ms + period_ms / 2);
/* stop i2c master */
user_ctrl = st->chip_config.user_ctrl;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
if (ret)
goto error_stop_i2c;
/* restore sample rate */
d = st->chip_config.divider;
ret = regmap_write(st->map, st->reg->sample_rate_div, d);
if (ret)
goto error_restore_rate;
/* disable i2c slave */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
if (ret)
goto error_disable_i2c;
/* check i2c status */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
if (ret)
return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK)
return -EIO;
return 0;
error_stop_i2c:
regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl);
error_restore_rate:
regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider);
error_disable_i2c:
regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
return ret;
}
/**
* inv_mpu_aux_init() - init i2c auxiliary bus
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_init(const struct inv_mpu6050_state *st)
{
unsigned int val;
int ret;
/*
* Code based on the vendor Linux kernel v3.0,
* the exact meaning is unknown.
*/
if (st->chip_type == INV_MPU9150) {
unsigned int mask = BIT(7);
val = st->level_shifter ? mask : 0;
ret = regmap_update_bits(st->map, 0x1, mask, val);
if (ret)
return ret;
}
/* configure i2c master */
val = INV_MPU6050_BITS_I2C_MST_CLK_400KHZ |
INV_MPU6050_BIT_WAIT_FOR_ES;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val);
if (ret)
return ret;
/* configure i2c master delay */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0);
if (ret)
return ret;
val = INV_MPU6050_BIT_I2C_SLV0_DLY_EN |
INV_MPU6050_BIT_I2C_SLV1_DLY_EN |
INV_MPU6050_BIT_I2C_SLV2_DLY_EN |
INV_MPU6050_BIT_I2C_SLV3_DLY_EN |
INV_MPU6050_BIT_DELAY_ES_SHADOW;
return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val);
}
/**
* inv_mpu_aux_read() - read register function for i2c auxiliary bus
* @st: driver internal state.
* @addr: chip i2c Address
* @reg: chip register address
* @val: buffer for storing read bytes
* @size: number of bytes to read
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t *val, size_t size)
{
int ret;
if (size > 0x0F)
return -EINVAL;
/* setup i2c SLV0 control: i2c addr, register, enable + size */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0),
INV_MPU6050_BIT_I2C_SLV_RNW | addr);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN | size);
if (ret)
return ret;
/* do i2c xfer, disable i2c slave and check status*/
ret = inv_mpu_i2c_master_xfer(st);
if (ret)
return ret;
/* read data in registers */
return regmap_bulk_read(st->map, INV_MPU6050_REG_EXT_SENS_DATA,
val, size);
}
/**
* inv_mpu_aux_write() - write register function for i2c auxiliary bus
* @st: driver internal state.
* @addr: chip i2c Address
* @reg: chip register address
* @val: 1 byte value to write
*
* Returns 0 on success, a negative error code otherwise.
*/
int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t val)
{
int ret;
/* setup i2c SLV0 control: i2c addr, register, value, enable + size */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), addr);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(0), val);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN | 1);
if (ret)
return ret;
/* do i2c xfer, disable i2c slave and check status*/
ret = inv_mpu_i2c_master_xfer(st);
if (ret)
return ret;
return 0;
}
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.h
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#ifndef INV_MPU_AUX_H_
#define INV_MPU_AUX_H_
#include "inv_mpu_iio.h"
int inv_mpu_aux_init(const struct inv_mpu6050_state *st);
int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t *val, size_t size);
int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr,
uint8_t reg, uint8_t val);
#endif /* INV_MPU_AUX_H_ */
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
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linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/module.h>
#include <linux/property.h>
#include "inv_mpu_iio.h"
static const struct regmap_config inv_mpu_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int inv_mpu6050_select_bypass(struct i2c_mux_core *muxc, u32 chan_id)
{
return 0;
}
static bool inv_mpu_i2c_aux_bus(struct device *dev)
{
struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
switch (st->chip_type) {
case INV_ICM20608:
case INV_ICM20608D:
case INV_ICM20609:
case INV_ICM20689:
case INV_ICM20600:
case INV_ICM20602:
case INV_IAM20380:
case INV_IAM20680:
/* no i2c auxiliary bus on the chip */
return false;
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
if (st->magn_disabled)
return true;
else
return false;
default:
return true;
}
}
static int inv_mpu_i2c_aux_setup(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *dev = indio_dev->dev.parent;
struct fwnode_handle *mux_node;
int ret;
/*
* MPU9xxx magnetometer support requires to disable i2c auxiliary bus.
* To ensure backward compatibility with existing setups, do not disable
* i2c auxiliary bus if it used.
* Check for i2c-gate node in devicetree and set magnetometer disabled.
* Only MPU6500 is supported by ACPI, no need to check.
*/
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
mux_node = device_get_named_child_node(dev, "i2c-gate");
if (mux_node != NULL) {
st->magn_disabled = true;
dev_warn(dev, "disable internal use of magnetometer\n");
}
fwnode_handle_put(mux_node);
break;
default:
break;
}
/* enable i2c bypass when using i2c auxiliary bus */
if (inv_mpu_i2c_aux_bus(dev)) {
ret = regmap_write(st->map, st->reg->int_pin_cfg,
st->irq_mask | INV_MPU6050_BIT_BYPASS_EN);
if (ret)
return ret;
}
return 0;
}
/**
* inv_mpu_probe() - probe function.
* @client: i2c client.
*
* Returns 0 on success, a negative error code otherwise.
*/
static int inv_mpu_probe(struct i2c_client *client)
{
const struct i2c_device_id *id = i2c_client_get_device_id(client);
const void *match;
struct inv_mpu6050_state *st;
int result;
enum inv_devices chip_type;
struct regmap *regmap;
const char *name;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_I2C_BLOCK))
return -EOPNOTSUPP;
match = device_get_match_data(&client->dev);
if (match) {
chip_type = (uintptr_t)match;
name = client->name;
} else if (id) {
chip_type = (enum inv_devices)
id->driver_data;
name = id->name;
} else {
return -ENOSYS;
}
regmap = devm_regmap_init_i2c(client, &inv_mpu_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
result = inv_mpu_core_probe(regmap, client->irq, name,
inv_mpu_i2c_aux_setup, chip_type);
if (result < 0)
return result;
st = iio_priv(dev_get_drvdata(&client->dev));
if (inv_mpu_i2c_aux_bus(&client->dev)) {
/* declare i2c auxiliary bus */
st->muxc = i2c_mux_alloc(client->adapter, &client->dev,
1, 0, I2C_MUX_LOCKED | I2C_MUX_GATE,
inv_mpu6050_select_bypass, NULL);
if (!st->muxc)
return -ENOMEM;
st->muxc->priv = dev_get_drvdata(&client->dev);
result = i2c_mux_add_adapter(st->muxc, 0, 0);
if (result)
return result;
result = inv_mpu_acpi_create_mux_client(client);
if (result)
goto out_del_mux;
}
return 0;
out_del_mux:
i2c_mux_del_adapters(st->muxc);
return result;
}
static void inv_mpu_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
if (st->muxc) {
inv_mpu_acpi_delete_mux_client(client);
i2c_mux_del_adapters(st->muxc);
}
}
/*
* device id table is used to identify what device can be
* supported by this driver
*/
static const struct i2c_device_id inv_mpu_id[] = {
{ .name = "mpu6050", .driver_data = INV_MPU6050 },
{ .name = "mpu6500", .driver_data = INV_MPU6500 },
{ .name = "mpu6515", .driver_data = INV_MPU6515 },
{ .name = "mpu6880", .driver_data = INV_MPU6880 },
{ .name = "mpu9150", .driver_data = INV_MPU9150 },
{ .name = "mpu9250", .driver_data = INV_MPU9250 },
{ .name = "mpu9255", .driver_data = INV_MPU9255 },
{ .name = "icm20608", .driver_data = INV_ICM20608 },
{ .name = "icm20608d", .driver_data = INV_ICM20608D },
{ .name = "icm20609", .driver_data = INV_ICM20609 },
{ .name = "icm20689", .driver_data = INV_ICM20689 },
{ .name = "icm20600", .driver_data = INV_ICM20600 },
{ .name = "icm20602", .driver_data = INV_ICM20602 },
{ .name = "icm20690", .driver_data = INV_ICM20690 },
{ .name = "iam20380", .driver_data = INV_IAM20380 },
{ .name = "iam20680", .driver_data = INV_IAM20680 },
{ .name = "iam20680hp", .driver_data = INV_IAM20680HP },
{ .name = "iam20680ht", .driver_data = INV_IAM20680HT },
{ }
};
MODULE_DEVICE_TABLE(i2c, inv_mpu_id);
static const struct of_device_id inv_of_match[] = {
{
.compatible = "invensense,mpu6050",
.data = (void *)INV_MPU6050
},
{
.compatible = "invensense,mpu6500",
.data = (void *)INV_MPU6500
},
{
.compatible = "invensense,mpu6515",
.data = (void *)INV_MPU6515
},
{
.compatible = "invensense,mpu6880",
.data = (void *)INV_MPU6880
},
{
.compatible = "invensense,mpu9150",
.data = (void *)INV_MPU9150
},
{
.compatible = "invensense,mpu9250",
.data = (void *)INV_MPU9250
},
{
.compatible = "invensense,mpu9255",
.data = (void *)INV_MPU9255
},
{
.compatible = "invensense,icm20608",
.data = (void *)INV_ICM20608
},
{
.compatible = "invensense,icm20608d",
.data = (void *)INV_ICM20608D
},
{
.compatible = "invensense,icm20609",
.data = (void *)INV_ICM20609
},
{
.compatible = "invensense,icm20689",
.data = (void *)INV_ICM20689
},
{
.compatible = "invensense,icm20600",
.data = (void *)INV_ICM20600
},
{
.compatible = "invensense,icm20602",
.data = (void *)INV_ICM20602
},
{
.compatible = "invensense,icm20690",
.data = (void *)INV_ICM20690
},
{
.compatible = "invensense,iam20380",
.data = (void *)INV_IAM20380
},
{
.compatible = "invensense,iam20680",
.data = (void *)INV_IAM20680
},
{
.compatible = "invensense,iam20680hp",
.data = (void *)INV_IAM20680HP
},
{
.compatible = "invensense,iam20680ht",
.data = (void *)INV_IAM20680HT
},
{ }
};
MODULE_DEVICE_TABLE(of, inv_of_match);
static const struct acpi_device_id inv_acpi_match[] = {
{"INVN6500", INV_MPU6500},
{ }
};
MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
static struct i2c_driver inv_mpu_driver = {
.probe = inv_mpu_probe,
.remove = inv_mpu_remove,
.id_table = inv_mpu_id,
.driver = {
.of_match_table = inv_of_match,
.acpi_match_table = inv_acpi_match,
.name = "inv-mpu6050-i2c",
.pm = pm_ptr(&inv_mpu_pmops),
},
};
module_i2c_driver(inv_mpu_driver);
MODULE_AUTHOR("Invensense Corporation");
MODULE_DESCRIPTION("Invensense device MPU6050 driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_MPU6050");
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
+516
View File
@@ -0,0 +1,516 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#ifndef INV_MPU_IIO_H_
#define INV_MPU_IIO_H_
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/mutex.h>
#include <linux/platform_data/invensense_mpu6050.h>
#include <linux/regmap.h>
#include <linux/iio/buffer.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/trigger.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/sysfs.h>
/**
* struct inv_mpu6050_reg_map - Notable registers.
* @sample_rate_div: Divider applied to gyro output rate.
* @lpf: Configures internal low pass filter.
* @accel_lpf: Configures accelerometer low pass filter.
* @user_ctrl: Enables/resets the FIFO.
* @fifo_en: Determines which data will appear in FIFO.
* @gyro_config: gyro config register.
* @accl_config: accel config register
* @fifo_count_h: Upper byte of FIFO count.
* @fifo_r_w: FIFO register.
* @raw_gyro: Address of first gyro register.
* @raw_accl: Address of first accel register.
* @temperature: temperature register
* @int_enable: Interrupt enable register.
* @int_status: Interrupt status register.
* @pwr_mgmt_1: Controls chip's power state and clock source.
* @pwr_mgmt_2: Controls power state of individual sensors.
* @int_pin_cfg; Controls interrupt pin configuration.
* @accl_offset: Controls the accelerometer calibration offset.
* @gyro_offset: Controls the gyroscope calibration offset.
* @i2c_if: Controls the i2c interface
*/
struct inv_mpu6050_reg_map {
u8 sample_rate_div;
u8 lpf;
u8 accel_lpf;
u8 user_ctrl;
u8 fifo_en;
u8 gyro_config;
u8 accl_config;
u8 fifo_count_h;
u8 fifo_r_w;
u8 raw_gyro;
u8 raw_accl;
u8 temperature;
u8 int_enable;
u8 int_status;
u8 pwr_mgmt_1;
u8 pwr_mgmt_2;
u8 int_pin_cfg;
u8 accl_offset;
u8 gyro_offset;
u8 i2c_if;
};
/*device enum */
enum inv_devices {
INV_MPU6050,
INV_MPU6500,
INV_MPU6515,
INV_MPU6880,
INV_MPU6000,
INV_MPU9150,
INV_MPU9250,
INV_MPU9255,
INV_ICM20608,
INV_ICM20608D,
INV_ICM20609,
INV_ICM20689,
INV_ICM20600,
INV_ICM20602,
INV_ICM20690,
INV_IAM20380,
INV_IAM20680,
INV_IAM20680HP,
INV_IAM20680HT,
INV_NUM_PARTS
};
/* chip sensors mask: accelerometer, gyroscope, temperature, magnetometer, WoM */
#define INV_MPU6050_SENSOR_ACCL BIT(0)
#define INV_MPU6050_SENSOR_GYRO BIT(1)
#define INV_MPU6050_SENSOR_TEMP BIT(2)
#define INV_MPU6050_SENSOR_MAGN BIT(3)
#define INV_MPU6050_SENSOR_WOM BIT(4)
/**
* struct inv_mpu6050_chip_config - Cached chip configuration data.
* @clk: selected chip clock
* @fsr: Full scale range.
* @lpf: Digital low pass filter frequency.
* @accl_fs: accel full scale range.
* @accl_en: accel engine enabled
* @gyro_en: gyro engine enabled
* @temp_en: temperature sensor enabled
* @magn_en: magn engine (i2c master) enabled
* @wom_en: Wake-on-Motion enabled
* @accl_fifo_enable: enable accel data output
* @gyro_fifo_enable: enable gyro data output
* @temp_fifo_enable: enable temp data output
* @magn_fifo_enable: enable magn data output
* @divider: chip sample rate divider (sample rate divider - 1)
* @roc_threshold: save ROC threshold (WoM) set value
*/
struct inv_mpu6050_chip_config {
unsigned int clk:3;
unsigned int fsr:2;
unsigned int lpf:3;
unsigned int accl_fs:2;
unsigned int accl_en:1;
unsigned int gyro_en:1;
unsigned int temp_en:1;
unsigned int magn_en:1;
unsigned int wom_en:1;
unsigned int accl_fifo_enable:1;
unsigned int gyro_fifo_enable:1;
unsigned int temp_fifo_enable:1;
unsigned int magn_fifo_enable:1;
u8 divider;
u8 user_ctrl;
u64 roc_threshold;
};
/*
* Maximum of 6 + 6 + 2 + 7 (for MPU9x50) = 21 round up to 24 and plus 8.
* May be less if fewer channels are enabled, as long as the timestamp
* remains 8 byte aligned
*/
#define INV_MPU6050_OUTPUT_DATA_SIZE 32
/**
* struct inv_mpu6050_hw - Other important hardware information.
* @whoami: Self identification byte from WHO_AM_I register
* @name: name of the chip.
* @reg: register map of the chip.
* @config: configuration of the chip.
* @fifo_size: size of the FIFO in bytes.
* @temp: offset and scale to apply to raw temperature.
*/
struct inv_mpu6050_hw {
u8 whoami;
u8 *name;
const struct inv_mpu6050_reg_map *reg;
const struct inv_mpu6050_chip_config *config;
size_t fifo_size;
struct {
int offset;
int scale;
} temp;
struct {
unsigned int accel;
unsigned int gyro;
} startup_time;
};
/*
* struct inv_mpu6050_state - Driver state variables.
* @lock: Chip access lock.
* @trig: IIO trigger.
* @chip_config: Cached attribute information.
* @reg: Map of important registers.
* @hw: Other hardware-specific information.
* @chip_type: chip type.
* @plat_data: platform data (deprecated in favor of @orientation).
* @orientation: sensor chip orientation relative to main hardware.
* @map regmap pointer.
* @irq interrupt number.
* @irq_mask the int_pin_cfg mask to configure interrupt type.
* @timestamp: timestamping module
* @vdd_supply: VDD voltage regulator for the chip.
* @vddio_supply I/O voltage regulator for the chip.
* @magn_disabled: magnetometer disabled for backward compatibility reason.
* @magn_raw_to_gauss: coefficient to convert mag raw value to Gauss.
* @magn_orient: magnetometer sensor chip orientation if available.
* @suspended_sensors: sensors mask of sensors turned off for suspend
* @data: read buffer used for bulk reads.
* @it_timestamp: interrupt timestamp.
*/
struct inv_mpu6050_state {
struct mutex lock;
struct iio_trigger *trig;
struct inv_mpu6050_chip_config chip_config;
const struct inv_mpu6050_reg_map *reg;
const struct inv_mpu6050_hw *hw;
enum inv_devices chip_type;
struct i2c_mux_core *muxc;
struct i2c_client *mux_client;
struct inv_mpu6050_platform_data plat_data;
struct iio_mount_matrix orientation;
struct regmap *map;
int irq;
u8 irq_mask;
unsigned skip_samples;
struct inv_sensors_timestamp timestamp;
struct regulator *vdd_supply;
struct regulator *vddio_supply;
bool magn_disabled;
s32 magn_raw_to_gauss[3];
struct iio_mount_matrix magn_orient;
unsigned int suspended_sensors;
bool level_shifter;
u8 *data;
s64 it_timestamp;
};
/*register and associated bit definition*/
#define INV_MPU6050_REG_ACCEL_OFFSET 0x06
#define INV_MPU6050_REG_GYRO_OFFSET 0x13
#define INV_MPU6050_REG_SAMPLE_RATE_DIV 0x19
#define INV_MPU6050_REG_CONFIG 0x1A
#define INV_MPU6050_REG_GYRO_CONFIG 0x1B
#define INV_MPU6050_REG_ACCEL_CONFIG 0x1C
#define INV_MPU6050_REG_FIFO_EN 0x23
#define INV_MPU6050_BIT_SLAVE_0 0x01
#define INV_MPU6050_BIT_SLAVE_1 0x02
#define INV_MPU6050_BIT_SLAVE_2 0x04
#define INV_MPU6050_BIT_ACCEL_OUT 0x08
#define INV_MPU6050_BITS_GYRO_OUT 0x70
#define INV_MPU6050_BIT_TEMP_OUT 0x80
#define INV_MPU6050_REG_I2C_MST_CTRL 0x24
#define INV_MPU6050_BITS_I2C_MST_CLK_400KHZ 0x0D
#define INV_MPU6050_BIT_I2C_MST_P_NSR 0x10
#define INV_MPU6050_BIT_SLV3_FIFO_EN 0x20
#define INV_MPU6050_BIT_WAIT_FOR_ES 0x40
#define INV_MPU6050_BIT_MULT_MST_EN 0x80
/* control I2C slaves from 0 to 3 */
#define INV_MPU6050_REG_I2C_SLV_ADDR(_x) (0x25 + 3 * (_x))
#define INV_MPU6050_BIT_I2C_SLV_RNW 0x80
#define INV_MPU6050_REG_I2C_SLV_REG(_x) (0x26 + 3 * (_x))
#define INV_MPU6050_REG_I2C_SLV_CTRL(_x) (0x27 + 3 * (_x))
#define INV_MPU6050_BIT_SLV_GRP 0x10
#define INV_MPU6050_BIT_SLV_REG_DIS 0x20
#define INV_MPU6050_BIT_SLV_BYTE_SW 0x40
#define INV_MPU6050_BIT_SLV_EN 0x80
/* I2C master delay register */
#define INV_MPU6050_REG_I2C_SLV4_CTRL 0x34
#define INV_MPU6050_BITS_I2C_MST_DLY(_x) ((_x) & 0x1F)
#define INV_MPU6050_REG_I2C_MST_STATUS 0x36
#define INV_MPU6050_BIT_I2C_SLV0_NACK 0x01
#define INV_MPU6050_BIT_I2C_SLV1_NACK 0x02
#define INV_MPU6050_BIT_I2C_SLV2_NACK 0x04
#define INV_MPU6050_BIT_I2C_SLV3_NACK 0x08
#define INV_MPU6050_REG_INT_ENABLE 0x38
#define INV_MPU6050_BIT_DATA_RDY_EN 0x01
#define INV_MPU6050_BIT_DMP_INT_EN 0x02
#define INV_MPU6500_BIT_WOM_INT_EN BIT(6)
#define INV_ICM20608_BIT_WOM_INT_EN GENMASK(7, 5)
#define INV_MPU6050_REG_RAW_ACCEL 0x3B
#define INV_MPU6050_REG_TEMPERATURE 0x41
#define INV_MPU6050_REG_RAW_GYRO 0x43
#define INV_MPU6050_REG_INT_STATUS 0x3A
#define INV_MPU6500_BIT_WOM_INT BIT(6)
#define INV_ICM20608_BIT_WOM_INT GENMASK(7, 5)
#define INV_MPU6050_BIT_FIFO_OVERFLOW_INT 0x10
#define INV_MPU6050_BIT_RAW_DATA_RDY_INT 0x01
#define INV_MPU6050_REG_EXT_SENS_DATA 0x49
/* I2C slaves data output from 0 to 3 */
#define INV_MPU6050_REG_I2C_SLV_DO(_x) (0x63 + (_x))
#define INV_MPU6050_REG_I2C_MST_DELAY_CTRL 0x67
#define INV_MPU6050_BIT_I2C_SLV0_DLY_EN 0x01
#define INV_MPU6050_BIT_I2C_SLV1_DLY_EN 0x02
#define INV_MPU6050_BIT_I2C_SLV2_DLY_EN 0x04
#define INV_MPU6050_BIT_I2C_SLV3_DLY_EN 0x08
#define INV_MPU6050_BIT_DELAY_ES_SHADOW 0x80
#define INV_MPU6050_REG_SIGNAL_PATH_RESET 0x68
#define INV_MPU6050_BIT_TEMP_RST BIT(0)
#define INV_MPU6050_BIT_ACCEL_RST BIT(1)
#define INV_MPU6050_BIT_GYRO_RST BIT(2)
#define INV_MPU6050_REG_USER_CTRL 0x6A
#define INV_MPU6050_BIT_SIG_COND_RST 0x01
#define INV_MPU6050_BIT_FIFO_RST 0x04
#define INV_MPU6050_BIT_DMP_RST 0x08
#define INV_MPU6050_BIT_I2C_MST_EN 0x20
#define INV_MPU6050_BIT_FIFO_EN 0x40
#define INV_MPU6050_BIT_DMP_EN 0x80
#define INV_MPU6050_BIT_I2C_IF_DIS 0x10
#define INV_MPU6050_REG_PWR_MGMT_1 0x6B
#define INV_MPU6050_BIT_H_RESET 0x80
#define INV_MPU6050_BIT_SLEEP 0x40
#define INV_MPU6050_BIT_CYCLE 0x20
#define INV_MPU6050_BIT_TEMP_DIS 0x08
#define INV_MPU6050_BIT_CLK_MASK 0x7
#define INV_MPU6050_REG_PWR_MGMT_2 0x6C
#define INV_MPU6050_BIT_PWR_ACCL_STBY 0x38
#define INV_MPU6050_BIT_PWR_GYRO_STBY 0x07
/* ICM20609 registers */
#define INV_ICM20609_REG_ACCEL_WOM_X_THR 0x20
#define INV_ICM20609_REG_ACCEL_WOM_Y_THR 0x21
#define INV_ICM20609_REG_ACCEL_WOM_Z_THR 0x22
/* ICM20602 register */
#define INV_ICM20602_REG_I2C_IF 0x70
#define INV_ICM20602_BIT_I2C_IF_DIS 0x40
#define INV_MPU6050_REG_FIFO_COUNT_H 0x72
#define INV_MPU6050_REG_FIFO_R_W 0x74
#define INV_MPU6050_BYTES_PER_3AXIS_SENSOR 6
#define INV_MPU6050_FIFO_COUNT_BYTE 2
/* MPU9X50 9-axis magnetometer */
#define INV_MPU9X50_BYTES_MAGN 7
/* FIFO temperature sample size */
#define INV_MPU6050_BYTES_PER_TEMP_SENSOR 2
/* mpu6500 registers */
#define INV_MPU6500_REG_ACCEL_CONFIG_2 0x1D
#define INV_ICM20689_BITS_FIFO_SIZE_MAX 0xC0
#define INV_MPU6500_REG_LP_ODR 0x1E
#define INV_MPU6500_REG_WOM_THRESHOLD 0x1F
#define INV_MPU6500_REG_ACCEL_INTEL_CTRL 0x69
#define INV_MPU6500_BIT_ACCEL_INTEL_EN BIT(7)
#define INV_MPU6500_BIT_ACCEL_INTEL_MODE BIT(6)
#define INV_MPU6500_REG_ACCEL_OFFSET 0x77
/* delay time in milliseconds */
#define INV_MPU6050_POWER_UP_TIME 100
#define INV_MPU6050_TEMP_UP_TIME 100
#define INV_MPU6050_ACCEL_STARTUP_TIME 20
#define INV_MPU6050_GYRO_STARTUP_TIME 60
#define INV_MPU6050_GYRO_DOWN_TIME 150
#define INV_MPU6050_SUSPEND_DELAY_MS 2000
#define INV_MPU6500_GYRO_STARTUP_TIME 70
#define INV_MPU6500_ACCEL_STARTUP_TIME 30
#define INV_ICM20602_GYRO_STARTUP_TIME 100
#define INV_ICM20602_ACCEL_STARTUP_TIME 20
#define INV_ICM20690_GYRO_STARTUP_TIME 80
#define INV_ICM20690_ACCEL_STARTUP_TIME 10
/* delay time in microseconds */
#define INV_MPU6050_REG_UP_TIME_MIN 5000
#define INV_MPU6050_REG_UP_TIME_MAX 10000
#define INV_MPU6050_TEMP_OFFSET 12420
#define INV_MPU6050_TEMP_SCALE 2941176
#define INV_MPU6050_MAX_GYRO_FS_PARAM 3
#define INV_MPU6050_MAX_ACCL_FS_PARAM 3
#define INV_MPU6050_THREE_AXIS 3
#define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3
#define INV_ICM20690_GYRO_CONFIG_FSR_SHIFT 2
#define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3
#define INV_MPU6500_TEMP_OFFSET 7011
#define INV_MPU6500_TEMP_SCALE 2995178
#define INV_ICM20608_TEMP_OFFSET 8170
#define INV_ICM20608_TEMP_SCALE 3059976
#define INV_MPU6050_REG_INT_PIN_CFG 0x37
#define INV_MPU6050_ACTIVE_HIGH 0x00
#define INV_MPU6050_ACTIVE_LOW 0x80
/* enable level triggering */
#define INV_MPU6050_LATCH_INT_EN 0x20
#define INV_MPU6050_BIT_BYPASS_EN 0x2
/* allow acking interrupts by any register read */
#define INV_MPU6050_INT_RD_CLEAR 0x10
/* Allowed timestamp period jitter in percent */
#define INV_MPU6050_TS_PERIOD_JITTER 4
/* init parameters */
#define INV_MPU6050_MAX_FIFO_RATE 1000
#define INV_MPU6050_MIN_FIFO_RATE 4
/* chip internal frequency: 1KHz */
#define INV_MPU6050_INTERNAL_FREQ_HZ 1000
/* return the frequency divider (chip sample rate divider + 1) */
#define INV_MPU6050_FREQ_DIVIDER(st) \
((st)->chip_config.divider + 1)
/* chip sample rate divider to fifo rate */
#define INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate) \
((INV_MPU6050_INTERNAL_FREQ_HZ / (fifo_rate)) - 1)
#define INV_MPU6050_DIVIDER_TO_FIFO_RATE(divider) \
(INV_MPU6050_INTERNAL_FREQ_HZ / ((divider) + 1))
#define INV_MPU6050_REG_WHOAMI 117
#define INV_MPU6000_WHOAMI_VALUE 0x68
#define INV_MPU6050_WHOAMI_VALUE 0x68
#define INV_MPU6500_WHOAMI_VALUE 0x70
#define INV_MPU6880_WHOAMI_VALUE 0x78
#define INV_MPU9150_WHOAMI_VALUE 0x68
#define INV_MPU9250_WHOAMI_VALUE 0x71
#define INV_MPU9255_WHOAMI_VALUE 0x73
#define INV_MPU6515_WHOAMI_VALUE 0x74
#define INV_ICM20608_WHOAMI_VALUE 0xAF
#define INV_ICM20608D_WHOAMI_VALUE 0xAE
#define INV_ICM20609_WHOAMI_VALUE 0xA6
#define INV_ICM20689_WHOAMI_VALUE 0x98
#define INV_ICM20600_WHOAMI_VALUE 0x11
#define INV_ICM20602_WHOAMI_VALUE 0x12
#define INV_ICM20690_WHOAMI_VALUE 0x20
#define INV_IAM20380_WHOAMI_VALUE 0xB5
#define INV_IAM20680_WHOAMI_VALUE 0xA9
#define INV_IAM20680HP_WHOAMI_VALUE 0xF8
#define INV_IAM20680HT_WHOAMI_VALUE 0xFA
/* scan element definition for generic MPU6xxx devices */
enum inv_mpu6050_scan {
INV_MPU6050_SCAN_ACCL_X,
INV_MPU6050_SCAN_ACCL_Y,
INV_MPU6050_SCAN_ACCL_Z,
INV_MPU6050_SCAN_TEMP,
INV_MPU6050_SCAN_GYRO_X,
INV_MPU6050_SCAN_GYRO_Y,
INV_MPU6050_SCAN_GYRO_Z,
INV_MPU6050_SCAN_TIMESTAMP,
INV_MPU9X50_SCAN_MAGN_X = INV_MPU6050_SCAN_GYRO_Z + 1,
INV_MPU9X50_SCAN_MAGN_Y,
INV_MPU9X50_SCAN_MAGN_Z,
INV_MPU9X50_SCAN_TIMESTAMP,
};
enum inv_mpu6050_filter_e {
INV_MPU6050_FILTER_NOLPF2 = 0,
INV_MPU6050_FILTER_200HZ,
INV_MPU6050_FILTER_100HZ,
INV_MPU6050_FILTER_45HZ,
INV_MPU6050_FILTER_20HZ,
INV_MPU6050_FILTER_10HZ,
INV_MPU6050_FILTER_5HZ,
INV_MPU6050_FILTER_NOLPF,
NUM_MPU6050_FILTER
};
enum inv_mpu6050_lposc_e {
INV_MPU6050_LPOSC_4HZ = 4,
INV_MPU6050_LPOSC_8HZ,
INV_MPU6050_LPOSC_16HZ,
INV_MPU6050_LPOSC_31HZ,
INV_MPU6050_LPOSC_62HZ,
INV_MPU6050_LPOSC_125HZ,
INV_MPU6050_LPOSC_250HZ,
INV_MPU6050_LPOSC_500HZ,
NUM_MPU6050_LPOSC,
};
/* IIO attribute address */
enum INV_MPU6050_IIO_ATTR_ADDR {
ATTR_GYRO_MATRIX,
ATTR_ACCL_MATRIX,
};
enum inv_mpu6050_accl_fs_e {
INV_MPU6050_FS_02G = 0,
INV_MPU6050_FS_04G,
INV_MPU6050_FS_08G,
INV_MPU6050_FS_16G,
NUM_ACCL_FSR
};
enum inv_mpu6050_fsr_e {
INV_MPU6050_FSR_250DPS = 0,
INV_MPU6050_FSR_500DPS,
INV_MPU6050_FSR_1000DPS,
INV_MPU6050_FSR_2000DPS,
NUM_MPU6050_FSR
};
enum inv_mpu6050_clock_sel_e {
INV_CLK_INTERNAL = 0,
INV_CLK_PLL,
NUM_CLK
};
irqreturn_t inv_mpu6050_read_fifo(int irq, void *p);
int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type);
int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable);
int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
unsigned int mask);
int inv_mpu_acpi_create_mux_client(struct i2c_client *client);
void inv_mpu_acpi_delete_mux_client(struct i2c_client *client);
int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type);
extern const struct dev_pm_ops inv_mpu_pmops;
#endif
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c
+365
View File
@@ -0,0 +1,365 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/string.h>
#include "inv_mpu_aux.h"
#include "inv_mpu_iio.h"
#include "inv_mpu_magn.h"
/*
* MPU9xxx magnetometer are AKM chips on I2C aux bus
* MPU9150 is AK8975
* MPU9250 is AK8963
*/
#define INV_MPU_MAGN_I2C_ADDR 0x0C
#define INV_MPU_MAGN_REG_WIA 0x00
#define INV_MPU_MAGN_BITS_WIA 0x48
#define INV_MPU_MAGN_REG_ST1 0x02
#define INV_MPU_MAGN_BIT_DRDY 0x01
#define INV_MPU_MAGN_BIT_DOR 0x02
#define INV_MPU_MAGN_REG_DATA 0x03
#define INV_MPU_MAGN_REG_ST2 0x09
#define INV_MPU_MAGN_BIT_HOFL 0x08
#define INV_MPU_MAGN_BIT_BITM 0x10
#define INV_MPU_MAGN_REG_CNTL1 0x0A
#define INV_MPU_MAGN_BITS_MODE_PWDN 0x00
#define INV_MPU_MAGN_BITS_MODE_SINGLE 0x01
#define INV_MPU_MAGN_BITS_MODE_FUSE 0x0F
#define INV_MPU9250_MAGN_BIT_OUTPUT_BIT 0x10
#define INV_MPU9250_MAGN_REG_CNTL2 0x0B
#define INV_MPU9250_MAGN_BIT_SRST 0x01
#define INV_MPU_MAGN_REG_ASAX 0x10
#define INV_MPU_MAGN_REG_ASAY 0x11
#define INV_MPU_MAGN_REG_ASAZ 0x12
static bool inv_magn_supported(const struct inv_mpu6050_state *st)
{
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
return true;
default:
return false;
}
}
/* init magnetometer chip */
static int inv_magn_init(struct inv_mpu6050_state *st)
{
uint8_t val;
uint8_t asa[3];
int32_t sensitivity;
int ret;
/* check whoami */
ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_WIA,
&val, sizeof(val));
if (ret)
return ret;
if (val != INV_MPU_MAGN_BITS_WIA)
return -ENODEV;
/* software reset for MPU925x only */
switch (st->chip_type) {
case INV_MPU9250:
case INV_MPU9255:
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU9250_MAGN_REG_CNTL2,
INV_MPU9250_MAGN_BIT_SRST);
if (ret)
return ret;
break;
default:
break;
}
/* read fuse ROM data */
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU_MAGN_REG_CNTL1,
INV_MPU_MAGN_BITS_MODE_FUSE);
if (ret)
return ret;
ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_ASAX,
asa, sizeof(asa));
if (ret)
return ret;
/* switch back to power-down */
ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR,
INV_MPU_MAGN_REG_CNTL1,
INV_MPU_MAGN_BITS_MODE_PWDN);
if (ret)
return ret;
/*
* Sensor sentivity
* 1 uT = 0.01 G and value is in micron (1e6)
* sensitvity = x uT * 0.01 * 1e6
*/
switch (st->chip_type) {
case INV_MPU9150:
/* sensor sensitivity is 0.3 uT */
sensitivity = 3000;
break;
case INV_MPU9250:
case INV_MPU9255:
/* sensor sensitivity in 16 bits mode: 0.15 uT */
sensitivity = 1500;
break;
default:
return -EINVAL;
}
/*
* Sensitivity adjustment and scale to Gauss
*
* Hadj = H * (((ASA - 128) * 0.5 / 128) + 1)
* Factor simplification:
* Hadj = H * ((ASA + 128) / 256)
*
* raw_to_gauss = Hadj * sensitivity
*/
st->magn_raw_to_gauss[0] = (((int32_t)asa[0] + 128) * sensitivity) / 256;
st->magn_raw_to_gauss[1] = (((int32_t)asa[1] + 128) * sensitivity) / 256;
st->magn_raw_to_gauss[2] = (((int32_t)asa[2] + 128) * sensitivity) / 256;
return 0;
}
/**
* inv_mpu_magn_probe() - probe and setup magnetometer chip
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise
*
* It is probing the chip and setting up all needed i2c transfers.
* Noop if there is no magnetometer in the chip.
*/
int inv_mpu_magn_probe(struct inv_mpu6050_state *st)
{
uint8_t val;
int ret;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return 0;
/* configure i2c master aux port */
ret = inv_mpu_aux_init(st);
if (ret)
return ret;
/* check and init mag chip */
ret = inv_magn_init(st);
if (ret)
return ret;
/*
* configure mpu i2c master accesses
* i2c SLV0: read sensor data, 7 bytes data(6)-ST2
* Byte swap data to store them in big-endian in impair address groups
*/
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0),
INV_MPU6050_BIT_I2C_SLV_RNW | INV_MPU_MAGN_I2C_ADDR);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0),
INV_MPU_MAGN_REG_DATA);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
INV_MPU6050_BIT_SLV_EN |
INV_MPU6050_BIT_SLV_BYTE_SW |
INV_MPU6050_BIT_SLV_GRP |
INV_MPU9X50_BYTES_MAGN);
if (ret)
return ret;
/* i2c SLV1: launch single measurement */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(1),
INV_MPU_MAGN_I2C_ADDR);
if (ret)
return ret;
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(1),
INV_MPU_MAGN_REG_CNTL1);
if (ret)
return ret;
/* add 16 bits mode for MPU925x */
val = INV_MPU_MAGN_BITS_MODE_SINGLE;
switch (st->chip_type) {
case INV_MPU9250:
case INV_MPU9255:
val |= INV_MPU9250_MAGN_BIT_OUTPUT_BIT;
break;
default:
break;
}
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(1), val);
if (ret)
return ret;
return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(1),
INV_MPU6050_BIT_SLV_EN | 1);
}
/**
* inv_mpu_magn_set_rate() - set magnetometer sampling rate
* @st: driver internal state
* @fifo_rate: mpu set fifo rate
*
* Returns 0 on success, a negative error code otherwise
*
* Limit sampling frequency to the maximum value supported by the
* magnetometer chip. Resulting in duplicated data for higher frequencies.
* Noop if there is no magnetometer in the chip.
*/
int inv_mpu_magn_set_rate(const struct inv_mpu6050_state *st, int fifo_rate)
{
uint8_t d;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return 0;
/*
* update i2c master delay to limit mag sampling to max frequency
* compute fifo_rate divider d: rate = fifo_rate / (d + 1)
*/
if (fifo_rate > INV_MPU_MAGN_FREQ_HZ_MAX)
d = fifo_rate / INV_MPU_MAGN_FREQ_HZ_MAX - 1;
else
d = 0;
return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, d);
}
/**
* inv_mpu_magn_set_orient() - fill magnetometer mounting matrix
* @st: driver internal state
*
* Returns 0 on success, a negative error code otherwise
*
* Fill magnetometer mounting matrix using the provided chip matrix.
*/
int inv_mpu_magn_set_orient(struct inv_mpu6050_state *st)
{
struct device *dev = regmap_get_device(st->map);
const char *orient;
char *str;
int i;
/* fill magnetometer orientation */
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
/* x <- y */
st->magn_orient.rotation[0] = st->orientation.rotation[3];
st->magn_orient.rotation[1] = st->orientation.rotation[4];
st->magn_orient.rotation[2] = st->orientation.rotation[5];
/* y <- x */
st->magn_orient.rotation[3] = st->orientation.rotation[0];
st->magn_orient.rotation[4] = st->orientation.rotation[1];
st->magn_orient.rotation[5] = st->orientation.rotation[2];
/* z <- -z */
for (i = 6; i < 9; ++i) {
orient = st->orientation.rotation[i];
/*
* The value is negated according to one of the following
* rules:
*
* 1) Drop leading minus.
* 2) Leave 0 as is.
* 3) Add leading minus.
*/
if (orient[0] == '-')
str = devm_kstrdup(dev, orient + 1, GFP_KERNEL);
else if (!strcmp(orient, "0"))
str = devm_kstrdup(dev, orient, GFP_KERNEL);
else
str = devm_kasprintf(dev, GFP_KERNEL, "-%s", orient);
if (!str)
return -ENOMEM;
st->magn_orient.rotation[i] = str;
}
break;
default:
st->magn_orient = st->orientation;
break;
}
return 0;
}
/**
* inv_mpu_magn_read() - read magnetometer data
* @st: driver internal state
* @axis: IIO modifier axis value
* @val: store corresponding axis value
*
* Returns 0 on success, a negative error code otherwise
*/
int inv_mpu_magn_read(struct inv_mpu6050_state *st, int axis, int *val)
{
unsigned int status;
__be16 data;
uint8_t addr;
int ret;
/* quit if chip is not supported */
if (!inv_magn_supported(st))
return -ENODEV;
/* Mag data: XH,XL,YH,YL,ZH,ZL */
switch (axis) {
case IIO_MOD_X:
addr = 0;
break;
case IIO_MOD_Y:
addr = 2;
break;
case IIO_MOD_Z:
addr = 4;
break;
default:
return -EINVAL;
}
addr += INV_MPU6050_REG_EXT_SENS_DATA;
/* check i2c status and read raw data */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
if (ret)
return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK ||
status & INV_MPU6050_BIT_I2C_SLV1_NACK)
return -EIO;
ret = regmap_bulk_read(st->map, addr, &data, sizeof(data));
if (ret)
return ret;
*val = (int16_t)be16_to_cpu(data);
return IIO_VAL_INT;
}
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.h
+39
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@@ -0,0 +1,39 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 TDK-InvenSense, Inc.
*/
#ifndef INV_MPU_MAGN_H_
#define INV_MPU_MAGN_H_
#include <linux/kernel.h>
#include "inv_mpu_iio.h"
/* Magnetometer maximum frequency */
#define INV_MPU_MAGN_FREQ_HZ_MAX 50
int inv_mpu_magn_probe(struct inv_mpu6050_state *st);
/**
* inv_mpu_magn_get_scale() - get magnetometer scale value
* @st: driver internal state
*
* Returns IIO data format.
*/
static inline int inv_mpu_magn_get_scale(const struct inv_mpu6050_state *st,
const struct iio_chan_spec *chan,
int *val, int *val2)
{
*val = 0;
*val2 = st->magn_raw_to_gauss[chan->address];
return IIO_VAL_INT_PLUS_MICRO;
}
int inv_mpu_magn_set_rate(const struct inv_mpu6050_state *st, int fifo_rate);
int inv_mpu_magn_set_orient(struct inv_mpu6050_state *st);
int inv_mpu_magn_read(struct inv_mpu6050_state *st, int axis, int *val);
#endif /* INV_MPU_MAGN_H_ */
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c
+135
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@@ -0,0 +1,135 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/jiffies.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/poll.h>
#include <linux/math64.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include "inv_mpu_iio.h"
static int inv_reset_fifo(struct iio_dev *indio_dev)
{
int result;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
/* disable fifo and reenable it */
inv_mpu6050_prepare_fifo(st, false);
result = inv_mpu6050_prepare_fifo(st, true);
if (result)
goto reset_fifo_fail;
return 0;
reset_fifo_fail:
dev_err(regmap_get_device(st->map), "reset fifo failed %d\n", result);
return regmap_update_bits(st->map, st->reg->int_enable,
INV_MPU6050_BIT_DATA_RDY_EN, INV_MPU6050_BIT_DATA_RDY_EN);
}
/*
* inv_mpu6050_read_fifo() - Transfer data from hardware FIFO to KFIFO.
*/
irqreturn_t inv_mpu6050_read_fifo(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
size_t bytes_per_datum;
int result;
u16 fifo_count;
u32 fifo_period;
s64 timestamp;
/* clear internal data buffer for avoiding kernel data leak */
u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] __aligned(8) = { };
size_t i, nb;
mutex_lock(&st->lock);
if (!(st->chip_config.accl_fifo_enable |
st->chip_config.gyro_fifo_enable |
st->chip_config.magn_fifo_enable))
goto end_session;
bytes_per_datum = 0;
if (st->chip_config.accl_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
if (st->chip_config.gyro_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
if (st->chip_config.temp_fifo_enable)
bytes_per_datum += INV_MPU6050_BYTES_PER_TEMP_SENSOR;
if (st->chip_config.magn_fifo_enable)
bytes_per_datum += INV_MPU9X50_BYTES_MAGN;
/*
* read fifo_count register to know how many bytes are inside the FIFO
* right now
*/
result = regmap_bulk_read(st->map, st->reg->fifo_count_h,
st->data, INV_MPU6050_FIFO_COUNT_BYTE);
if (result)
goto end_session;
fifo_count = be16_to_cpup((__be16 *)&st->data[0]);
/*
* Handle fifo overflow by resetting fifo.
* Reset if there is only 3 data set free remaining to mitigate
* possible delay between reading fifo count and fifo data.
*/
nb = 3 * bytes_per_datum;
if (fifo_count >= st->hw->fifo_size - nb) {
dev_warn(regmap_get_device(st->map), "fifo overflow reset\n");
goto flush_fifo;
}
/* compute and process only all complete datum */
nb = fifo_count / bytes_per_datum;
fifo_count = nb * bytes_per_datum;
if (nb == 0)
goto end_session;
/* Each FIFO data contains all sensors, so same number for FIFO and sensor data */
fifo_period = NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
inv_sensors_timestamp_interrupt(&st->timestamp, 1, pf->timestamp);
inv_sensors_timestamp_apply_odr(&st->timestamp, fifo_period, 1, 0);
/* read all data once and process every samples */
result = regmap_noinc_read(st->map, st->reg->fifo_r_w, st->data, fifo_count);
if (result)
goto flush_fifo;
for (i = 0; i < nb; ++i) {
/* skip first samples if needed */
if (st->skip_samples) {
st->skip_samples--;
continue;
}
memcpy(data, &st->data[i * bytes_per_datum], bytes_per_datum);
timestamp = inv_sensors_timestamp_pop(&st->timestamp);
iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
}
end_session:
mutex_unlock(&st->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
flush_fifo:
/* Flush HW and SW FIFOs. */
inv_reset_fifo(indio_dev);
mutex_unlock(&st->lock);
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c
+185
View File
@@ -0,0 +1,185 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2015 Intel Corporation Inc.
*/
#include <linux/module.h>
#include <linux/property.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>
#include <linux/iio/iio.h>
#include "inv_mpu_iio.h"
static const struct regmap_config inv_mpu_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static int inv_mpu_i2c_disable(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int ret = 0;
if (st->reg->i2c_if) {
ret = regmap_write(st->map, st->reg->i2c_if,
INV_ICM20602_BIT_I2C_IF_DIS);
} else {
st->chip_config.user_ctrl |= INV_MPU6050_BIT_I2C_IF_DIS;
ret = regmap_write(st->map, st->reg->user_ctrl,
st->chip_config.user_ctrl);
}
return ret;
}
static int inv_mpu_probe(struct spi_device *spi)
{
const void *match;
struct regmap *regmap;
const struct spi_device_id *spi_id;
const char *name = NULL;
enum inv_devices chip_type;
if ((spi_id = spi_get_device_id(spi))) {
chip_type = (enum inv_devices)spi_id->driver_data;
name = spi_id->name;
} else if ((match = device_get_match_data(&spi->dev))) {
chip_type = (uintptr_t)match;
name = dev_name(&spi->dev);
} else {
return -ENODEV;
}
regmap = devm_regmap_init_spi(spi, &inv_mpu_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap: %pe\n",
regmap);
return PTR_ERR(regmap);
}
return inv_mpu_core_probe(regmap, spi->irq, name,
inv_mpu_i2c_disable, chip_type);
}
/*
* device id table is used to identify what device can be
* supported by this driver
*/
static const struct spi_device_id inv_mpu_id[] = {
{"mpu6000", INV_MPU6000},
{"mpu6500", INV_MPU6500},
{"mpu6515", INV_MPU6515},
{"mpu6880", INV_MPU6880},
{"mpu9250", INV_MPU9250},
{"mpu9255", INV_MPU9255},
{"icm20608", INV_ICM20608},
{"icm20608d", INV_ICM20608D},
{"icm20609", INV_ICM20609},
{"icm20689", INV_ICM20689},
{"icm20600", INV_ICM20600},
{"icm20602", INV_ICM20602},
{"icm20690", INV_ICM20690},
{"iam20380", INV_IAM20380},
{"iam20680", INV_IAM20680},
{"iam20680hp", INV_IAM20680HP},
{"iam20680ht", INV_IAM20680HT},
{ }
};
MODULE_DEVICE_TABLE(spi, inv_mpu_id);
static const struct of_device_id inv_of_match[] = {
{
.compatible = "invensense,mpu6000",
.data = (void *)INV_MPU6000
},
{
.compatible = "invensense,mpu6500",
.data = (void *)INV_MPU6500
},
{
.compatible = "invensense,mpu6515",
.data = (void *)INV_MPU6515
},
{
.compatible = "invensense,mpu6880",
.data = (void *)INV_MPU6880
},
{
.compatible = "invensense,mpu9250",
.data = (void *)INV_MPU9250
},
{
.compatible = "invensense,mpu9255",
.data = (void *)INV_MPU9255
},
{
.compatible = "invensense,icm20608",
.data = (void *)INV_ICM20608
},
{
.compatible = "invensense,icm20608d",
.data = (void *)INV_ICM20608D
},
{
.compatible = "invensense,icm20609",
.data = (void *)INV_ICM20609
},
{
.compatible = "invensense,icm20689",
.data = (void *)INV_ICM20689
},
{
.compatible = "invensense,icm20600",
.data = (void *)INV_ICM20600
},
{
.compatible = "invensense,icm20602",
.data = (void *)INV_ICM20602
},
{
.compatible = "invensense,icm20690",
.data = (void *)INV_ICM20690
},
{
.compatible = "invensense,iam20380",
.data = (void *)INV_IAM20380
},
{
.compatible = "invensense,iam20680",
.data = (void *)INV_IAM20680
},
{
.compatible = "invensense,iam20680hp",
.data = (void *)INV_IAM20680HP
},
{
.compatible = "invensense,iam20680ht",
.data = (void *)INV_IAM20680HT
},
{ }
};
MODULE_DEVICE_TABLE(of, inv_of_match);
static const struct acpi_device_id inv_acpi_match[] = {
{"INVN6000", INV_MPU6000},
{ }
};
MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
static struct spi_driver inv_mpu_driver = {
.probe = inv_mpu_probe,
.id_table = inv_mpu_id,
.driver = {
.of_match_table = inv_of_match,
.acpi_match_table = inv_acpi_match,
.name = "inv-mpu6000-spi",
.pm = pm_ptr(&inv_mpu_pmops),
},
};
module_spi_driver(inv_mpu_driver);
MODULE_AUTHOR("Adriana Reus <adriana.reus@intel.com>");
MODULE_DESCRIPTION("Invensense device MPU6000 driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS("IIO_MPU6050");
linux-7.2.3/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
+332
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@@ -0,0 +1,332 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Invensense, Inc.
*/
#include <linux/pm_runtime.h>
#include <linux/iio/common/inv_sensors_timestamp.h>
#include <linux/iio/events.h>
#include "inv_mpu_iio.h"
static unsigned int inv_scan_query_mpu6050(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
unsigned int mask;
/*
* If the MPU6050 is just used as a trigger, then the scan mask
* is not allocated so we simply enable the temperature channel
* as a dummy and bail out.
*/
if (!indio_dev->active_scan_mask) {
st->chip_config.temp_fifo_enable = true;
return INV_MPU6050_SENSOR_TEMP;
}
st->chip_config.gyro_fifo_enable =
test_bit(INV_MPU6050_SCAN_GYRO_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_GYRO_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_GYRO_Z,
indio_dev->active_scan_mask);
st->chip_config.accl_fifo_enable =
test_bit(INV_MPU6050_SCAN_ACCL_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_ACCL_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU6050_SCAN_ACCL_Z,
indio_dev->active_scan_mask);
st->chip_config.temp_fifo_enable =
test_bit(INV_MPU6050_SCAN_TEMP, indio_dev->active_scan_mask);
mask = 0;
if (st->chip_config.gyro_fifo_enable)
mask |= INV_MPU6050_SENSOR_GYRO;
if (st->chip_config.accl_fifo_enable)
mask |= INV_MPU6050_SENSOR_ACCL;
if (st->chip_config.temp_fifo_enable)
mask |= INV_MPU6050_SENSOR_TEMP;
return mask;
}
static unsigned int inv_scan_query_mpu9x50(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
unsigned int mask;
mask = inv_scan_query_mpu6050(indio_dev);
/* no magnetometer if i2c auxiliary bus is used */
if (st->magn_disabled)
return mask;
st->chip_config.magn_fifo_enable =
test_bit(INV_MPU9X50_SCAN_MAGN_X,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU9X50_SCAN_MAGN_Y,
indio_dev->active_scan_mask) ||
test_bit(INV_MPU9X50_SCAN_MAGN_Z,
indio_dev->active_scan_mask);
if (st->chip_config.magn_fifo_enable)
mask |= INV_MPU6050_SENSOR_MAGN;
return mask;
}
static unsigned int inv_scan_query(struct iio_dev *indio_dev)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
switch (st->chip_type) {
case INV_MPU9150:
case INV_MPU9250:
case INV_MPU9255:
return inv_scan_query_mpu9x50(indio_dev);
default:
return inv_scan_query_mpu6050(indio_dev);
}
}
static unsigned int inv_compute_skip_samples(const struct inv_mpu6050_state *st)
{
unsigned int skip_samples = 0;
/* mag first sample is always not ready, skip it */
if (st->chip_config.magn_fifo_enable)
skip_samples = 1;
return skip_samples;
}
int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
{
uint8_t d;
int ret;
if (enable) {
/* reset timestamping */
inv_sensors_timestamp_reset(&st->timestamp);
/* reset FIFO */
d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
ret = regmap_write(st->map, st->reg->user_ctrl, d);
if (ret)
return ret;
/* enable sensor output to FIFO */
d = 0;
if (st->chip_config.gyro_fifo_enable)
d |= INV_MPU6050_BITS_GYRO_OUT;
if (st->chip_config.accl_fifo_enable)
d |= INV_MPU6050_BIT_ACCEL_OUT;
if (st->chip_config.temp_fifo_enable)
d |= INV_MPU6050_BIT_TEMP_OUT;
if (st->chip_config.magn_fifo_enable)
d |= INV_MPU6050_BIT_SLAVE_0;
ret = regmap_write(st->map, st->reg->fifo_en, d);
if (ret)
return ret;
/* enable FIFO reading */
d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, d);
if (ret)
return ret;
/* enable data interrupt */
ret = regmap_update_bits(st->map, st->reg->int_enable,
INV_MPU6050_BIT_DATA_RDY_EN, INV_MPU6050_BIT_DATA_RDY_EN);
} else {
/* disable data interrupt */
ret = regmap_update_bits(st->map, st->reg->int_enable,
INV_MPU6050_BIT_DATA_RDY_EN, 0);
if (ret)
return ret;
ret = regmap_write(st->map, st->reg->fifo_en, 0);
if (ret)
return ret;
/* restore user_ctrl for disabling FIFO reading */
ret = regmap_write(st->map, st->reg->user_ctrl,
st->chip_config.user_ctrl);
}
return ret;
}
/**
* inv_mpu6050_set_enable() - enable chip functions.
* @indio_dev: Device driver instance.
* @enable: enable/disable
*/
static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
{
struct inv_mpu6050_state *st = iio_priv(indio_dev);
struct device *pdev = regmap_get_device(st->map);
unsigned int scan;
int result;
if (enable) {
scan = inv_scan_query(indio_dev);
result = pm_runtime_resume_and_get(pdev);
if (result)
return result;
/*
* In case autosuspend didn't trigger, turn off first not
* required sensors excepted WoM
*/
result = inv_mpu6050_switch_engine(st, false, ~scan & ~INV_MPU6050_SENSOR_WOM);
if (result)
goto error_power_off;
result = inv_mpu6050_switch_engine(st, true, scan);
if (result)
goto error_power_off;
st->skip_samples = inv_compute_skip_samples(st);
result = inv_mpu6050_prepare_fifo(st, true);
if (result)
goto error_power_off;
} else {
st->chip_config.gyro_fifo_enable = 0;
st->chip_config.accl_fifo_enable = 0;
st->chip_config.temp_fifo_enable = 0;
st->chip_config.magn_fifo_enable = 0;
result = inv_mpu6050_prepare_fifo(st, false);
if (result)
goto error_power_off;
pm_runtime_put_autosuspend(pdev);
}
return 0;
error_power_off:
pm_runtime_put_autosuspend(pdev);
return result;
}
/**
* inv_mpu_data_rdy_trigger_set_state() - set data ready interrupt state
* @trig: Trigger instance
* @state: Desired trigger state
*/
static int inv_mpu_data_rdy_trigger_set_state(struct iio_trigger *trig,
bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
int result;
mutex_lock(&st->lock);
result = inv_mpu6050_set_enable(indio_dev, state);
mutex_unlock(&st->lock);
return result;
}
static const struct iio_trigger_ops inv_mpu_trigger_ops = {
.set_trigger_state = &inv_mpu_data_rdy_trigger_set_state,
};
static irqreturn_t inv_mpu6050_interrupt_timestamp(int irq, void *p)
{
struct iio_dev *indio_dev = p;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
st->it_timestamp = iio_get_time_ns(indio_dev);
return IRQ_WAKE_THREAD;
}
static irqreturn_t inv_mpu6050_interrupt_handle(int irq, void *p)
{
struct iio_dev *indio_dev = p;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
unsigned int int_status, wom_bits;
u64 ev_code;
int result;
switch (st->chip_type) {
case INV_MPU6000:
case INV_MPU6050:
/*
* WoM is not supported and interrupt status read seems to be broken for
* some chips. Since data ready is the only interrupt, bypass interrupt
* status read and always assert data ready bit.
*/
wom_bits = 0;
int_status = INV_MPU6050_BIT_RAW_DATA_RDY_INT;
goto data_ready_interrupt;
case INV_MPU9150:
/* IRQ needs to be acked */
wom_bits = 0;
break;
case INV_MPU6500:
case INV_MPU6515:
case INV_MPU6880:
case INV_MPU9250:
case INV_MPU9255:
wom_bits = INV_MPU6500_BIT_WOM_INT;
break;
default:
wom_bits = INV_ICM20608_BIT_WOM_INT;
break;
}
scoped_guard(mutex, &st->lock) {
/* ack interrupt and check status */
result = regmap_read(st->map, st->reg->int_status, &int_status);
if (result) {
dev_err(regmap_get_device(st->map), "failed to ack interrupt\n");
return IRQ_HANDLED;
}
/* handle WoM event */
if (st->chip_config.wom_en && (int_status & wom_bits)) {
ev_code = IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X_OR_Y_OR_Z,
IIO_EV_TYPE_ROC, IIO_EV_DIR_RISING);
iio_push_event(indio_dev, ev_code, st->it_timestamp);
}
}
data_ready_interrupt:
/* handle raw data interrupt */
if (int_status & INV_MPU6050_BIT_RAW_DATA_RDY_INT) {
indio_dev->pollfunc->timestamp = st->it_timestamp;
iio_trigger_poll_nested(st->trig);
}
return IRQ_HANDLED;
}
int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type)
{
int ret;
struct inv_mpu6050_state *st = iio_priv(indio_dev);
st->trig = devm_iio_trigger_alloc(&indio_dev->dev,
"%s-dev%d",
indio_dev->name,
iio_device_id(indio_dev));
if (!st->trig)
return -ENOMEM;
irq_type |= IRQF_ONESHOT;
ret = devm_request_threaded_irq(&indio_dev->dev, st->irq,
&inv_mpu6050_interrupt_timestamp,
&inv_mpu6050_interrupt_handle,
irq_type, "inv_mpu", indio_dev);
if (ret)
return ret;
st->trig->dev.parent = regmap_get_device(st->map);
st->trig->ops = &inv_mpu_trigger_ops;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(&indio_dev->dev, st->trig);
if (ret)
return ret;
indio_dev->trig = iio_trigger_get(st->trig);
return 0;
}