Resguardo inicial

This commit is contained in:
lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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# SPDX-License-Identifier: GPL-2.0
menuconfig BCM_VIDEOCORE
tristate "Broadcom VideoCore support"
depends on OF
depends on RASPBERRYPI_FIRMWARE || (COMPILE_TEST && !RASPBERRYPI_FIRMWARE)
default y
help
Support for Broadcom VideoCore services including
the BCM2835 family of products which is used
by the Raspberry PI.
if BCM_VIDEOCORE
config BCM2835_VCHIQ
tristate "BCM2835 VCHIQ"
depends on HAS_DMA
imply VCHIQ_CDEV
help
Broadcom BCM2835 and similar SoCs have a VPU called VideoCore.
This config enables the VCHIQ driver, which implements a
messaging interface between the kernel and the firmware running
on VideoCore. Other drivers use this interface to communicate to
the VPU. More specifically, the VCHIQ driver is used by
audio/video and camera drivers as well as for implementing MMAL
API, which is in turn used by several multimedia services on the
BCM2835 family of SoCs.
Defaults to Y when the Broadcom Videocore services are included
in the build, N otherwise.
if BCM2835_VCHIQ
config VCHIQ_CDEV
bool "VCHIQ Character Driver"
help
Enable the creation of VCHIQ character driver. The cdev exposes
ioctls used by userspace libraries and testing tools to interact
with VideoCore, via the VCHIQ core driver (Check BCM2835_VCHIQ
for more info).
This can be set to 'N' if the VideoCore communication is not
needed by userspace but only by other kernel modules
(like bcm2835-audio).
If not sure, set this to 'Y'.
endif
source "drivers/platform/raspberrypi/vchiq-mmal/Kconfig"
endif
@@ -0,0 +1,15 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_BCM2835_VCHIQ) += vchiq.o
vchiq-objs := \
vchiq-interface/vchiq_core.o \
vchiq-interface/vchiq_arm.o \
vchiq-interface/vchiq_bus.o \
vchiq-interface/vchiq_debugfs.o \
ifdef CONFIG_VCHIQ_CDEV
vchiq-objs += vchiq-interface/vchiq_dev.o
endif
obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/
@@ -0,0 +1,125 @@
This document contains some hints to test the function of the VCHIQ driver
without having additional hardware to the Raspberry Pi.
* Requirements & limitations
Testing the VCHIQ driver requires a Raspberry Pi with one of the following SoC:
- BCM2835 ( e.g. Raspberry Pi Zero W )
- BCM2836 ( e.g. Raspberry Pi 2 )
- BCM2837 ( e.g. Raspberry Pi 3 B+ )
The BCM2711 used in the Raspberry Pi 4 is currently not supported in the
mainline kernel.
There are no specific requirements to the VideoCore firmware to get VCHIQ
working.
The test scenarios described in this document based on the tool vchiq_test.
Its source code is available here: https://github.com/raspberrypi/userland
* Configuration
Here are the most common kernel configurations:
1. BCM2835 target SoC (ARM 32 bit)
Just use bcm2835_defconfig which already has VCHIQ enabled.
2. BCM2836/7 target SoC (ARM 32 bit)
Use the multi_v7_defconfig as a base and then enable all VCHIQ options.
3. BCM2837 target SoC (ARM 64 bit)
Use the defconfig which has most of the VCHIQ options enabled.
* Scenarios
* Initial test
Check the driver is probed and /dev/vchiq is created
* Functional test
Command: vchiq_test -f 10
Expected output:
Functional test - iters:10
======== iteration 1 ========
Testing bulk transfer for alignment.
Testing bulk transfer at PAGE_SIZE.
...
* Ping test
Command: vchiq_test -p
Expected output:
Ping test - service:echo, iters:1000, version 3
vchi ping (size 0) -> 57.000000us
vchi ping (size 0, 0 async, 0 oneway) -> 122.000000us
vchi bulk (size 0, 0 async, 0 oneway) -> 546.000000us
vchi bulk (size 0, 0 oneway) -> 230.000000us
vchi ping (size 0) -> 49.000000us
vchi ping (size 0, 0 async, 0 oneway) -> 70.000000us
vchi bulk (size 0, 0 async, 0 oneway) -> 296.000000us
vchi bulk (size 0, 0 oneway) -> 266.000000us
vchi ping (size 0, 1 async, 0 oneway) -> 65.000000us
vchi bulk (size 0, 0 oneway) -> 456.000000us
vchi ping (size 0, 2 async, 0 oneway) -> 74.000000us
vchi bulk (size 0, 0 oneway) -> 640.000000us
vchi ping (size 0, 10 async, 0 oneway) -> 125.000000us
vchi bulk (size 0, 0 oneway) -> 2309.000000us
vchi ping (size 0, 0 async, 1 oneway) -> 70.000000us
vchi ping (size 0, 0 async, 2 oneway) -> 76.000000us
vchi ping (size 0, 0 async, 10 oneway) -> 105.000000us
vchi ping (size 0, 10 async, 10 oneway) -> 165.000000us
vchi ping (size 0, 100 async, 0 oneway) -> nanus
vchi bulk (size 0, 0 oneway) -> nanus
vchi ping (size 0, 0 async, 100 oneway) -> nanus
vchi ping (size 0, 100 async, 100 oneway) -> infus
vchi ping (size 0, 200 async, 0 oneway) -> infus
...
* Debugfs test
Command: cat /sys/kernel/debug/vchiq/state
Example output:
State 0: CONNECTED
tx_pos=0x1e8(@43b0acda), rx_pos=0x170(@05493af8)
Version: 8 (min 3)
Stats: ctrl_tx_count=7, ctrl_rx_count=7, error_count=0
Slots: 30 available (29 data), 0 recyclable, 0 stalls (0 data)
Platform: 2835 (VC master)
Local: slots 34-64 tx_pos=0x1e8 recycle=0x1f
Slots claimed:
DEBUG: SLOT_HANDLER_COUNT = 20(0x14)
DEBUG: SLOT_HANDLER_LINE = 1937(0x791)
DEBUG: PARSE_LINE = 1864(0x748)
DEBUG: PARSE_HEADER = -249155224(0xf1263168)
DEBUG: PARSE_MSGID = 67362817(0x403e001)
DEBUG: AWAIT_COMPLETION_LINE = 0(0x0)
DEBUG: DEQUEUE_MESSAGE_LINE = 0(0x0)
DEBUG: SERVICE_CALLBACK_LINE = 0(0x0)
DEBUG: MSG_QUEUE_FULL_COUNT = 0(0x0)
DEBUG: COMPLETION_QUEUE_FULL_COUNT = 0(0x0)
Remote: slots 2-32 tx_pos=0x170 recycle=0x1f
Slots claimed:
2: 10/9
DEBUG: SLOT_HANDLER_COUNT = 20(0x14)
DEBUG: SLOT_HANDLER_LINE = 1851(0x73b)
DEBUG: PARSE_LINE = 1827(0x723)
DEBUG: PARSE_HEADER = -150330912(0xf70a21e0)
DEBUG: PARSE_MSGID = 67113022(0x400103e)
DEBUG: AWAIT_COMPLETION_LINE = 0(0x0)
DEBUG: DEQUEUE_MESSAGE_LINE = 0(0x0)
DEBUG: SERVICE_CALLBACK_LINE = 0(0x0)
DEBUG: MSG_QUEUE_FULL_COUNT = 0(0x0)
DEBUG: COMPLETION_QUEUE_FULL_COUNT = 0(0x0)
Service 0: LISTENING (ref 1) 'PEEK little-endian (0x4b454550)' remote n/a (msg use 0/3840, slot use 0/15)
Bulk: tx_pending=0 (size 0), rx_pending=0 (size 0)
Ctrl: tx_count=0, tx_bytes=0, rx_count=0, rx_bytes=0
Bulk: tx_count=0, tx_bytes=0, rx_count=0, rx_bytes=0
0 quota stalls, 0 slot stalls, 0 bulk stalls, 0 aborted, 0 errors
instance b511f60b
@@ -0,0 +1,4 @@
* Documentation
A short top-down description of this driver's architecture (function of
kthreads, userspace, limitations) could be very helpful for reviewers.
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// SPDX-License-Identifier: GPL-2.0
/*
* vchiq_device.c - VCHIQ generic device and bus-type
*
* Copyright (c) 2023 Ideas On Board Oy
*/
#include <linux/device/bus.h>
#include <linux/dma-mapping.h>
#include <linux/of_device.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/raspberrypi/vchiq_arm.h>
#include <linux/raspberrypi/vchiq_bus.h>
static int vchiq_bus_type_match(struct device *dev, const struct device_driver *drv)
{
if (dev->bus == &vchiq_bus_type &&
strcmp(dev_name(dev), drv->name) == 0)
return true;
return false;
}
static int vchiq_bus_uevent(const struct device *dev, struct kobj_uevent_env *env)
{
const struct vchiq_device *device = container_of_const(dev, struct vchiq_device, dev);
return add_uevent_var(env, "MODALIAS=vchiq:%s", dev_name(&device->dev));
}
static int vchiq_bus_probe(struct device *dev)
{
struct vchiq_device *device = to_vchiq_device(dev);
struct vchiq_driver *driver = to_vchiq_driver(dev->driver);
return driver->probe(device);
}
static void vchiq_bus_remove(struct device *dev)
{
struct vchiq_device *device = to_vchiq_device(dev);
struct vchiq_driver *driver = to_vchiq_driver(dev->driver);
if (driver->remove)
driver->remove(device);
}
const struct bus_type vchiq_bus_type = {
.name = "vchiq-bus",
.match = vchiq_bus_type_match,
.uevent = vchiq_bus_uevent,
.probe = vchiq_bus_probe,
.remove = vchiq_bus_remove,
};
static void vchiq_device_release(struct device *dev)
{
struct vchiq_device *device = to_vchiq_device(dev);
kfree(device);
}
struct vchiq_device *
vchiq_device_register(struct device *parent, const char *name)
{
struct vchiq_device *device;
int ret;
device = kzalloc_obj(*device);
if (!device)
return NULL;
device->dev.init_name = name;
device->dev.parent = parent;
device->dev.bus = &vchiq_bus_type;
device->dev.dma_mask = &device->dev.coherent_dma_mask;
device->dev.release = vchiq_device_release;
device->drv_mgmt = dev_get_drvdata(parent);
of_dma_configure(&device->dev, parent->of_node, true);
ret = device_register(&device->dev);
if (ret) {
dev_err(parent, "Cannot register %s: %d\n", name, ret);
put_device(&device->dev);
return NULL;
}
return device;
}
void vchiq_device_unregister(struct vchiq_device *vchiq_dev)
{
device_unregister(&vchiq_dev->dev);
}
int vchiq_driver_register(struct vchiq_driver *vchiq_drv)
{
vchiq_drv->driver.bus = &vchiq_bus_type;
return driver_register(&vchiq_drv->driver);
}
EXPORT_SYMBOL_GPL(vchiq_driver_register);
void vchiq_driver_unregister(struct vchiq_driver *vchiq_drv)
{
driver_unregister(&vchiq_drv->driver);
}
EXPORT_SYMBOL_GPL(vchiq_driver_unregister);
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Copyright (c) 2014 Raspberry Pi (Trading) Ltd. All rights reserved.
* Copyright (c) 2010-2012 Broadcom. All rights reserved.
*/
#include <linux/debugfs.h>
#include <linux/raspberrypi/vchiq_core.h>
#include <linux/raspberrypi/vchiq_arm.h>
#include <linux/raspberrypi/vchiq_debugfs.h>
#ifdef CONFIG_DEBUG_FS
#define DEBUGFS_WRITE_BUF_SIZE 256
/* Global 'vchiq' debugfs and clients entry used by all instances */
static struct dentry *vchiq_dbg_dir;
static struct dentry *vchiq_dbg_clients;
static int debugfs_usecount_show(struct seq_file *f, void *offset)
{
struct vchiq_instance *instance = f->private;
int use_count;
use_count = vchiq_instance_get_use_count(instance);
seq_printf(f, "%d\n", use_count);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(debugfs_usecount);
static int debugfs_trace_show(struct seq_file *f, void *offset)
{
struct vchiq_instance *instance = f->private;
int trace;
trace = vchiq_instance_get_trace(instance);
seq_printf(f, "%s\n", trace ? "Y" : "N");
return 0;
}
static int vchiq_dump_show(struct seq_file *f, void *offset)
{
struct vchiq_state *state = f->private;
vchiq_dump_state(f, state);
return 0;
}
DEFINE_SHOW_ATTRIBUTE(vchiq_dump);
static int debugfs_trace_open(struct inode *inode, struct file *file)
{
return single_open(file, debugfs_trace_show, inode->i_private);
}
static ssize_t debugfs_trace_write(struct file *file,
const char __user *buffer,
size_t count, loff_t *ppos)
{
struct seq_file *f = (struct seq_file *)file->private_data;
struct vchiq_instance *instance = f->private;
char firstchar;
if (copy_from_user(&firstchar, buffer, 1))
return -EFAULT;
switch (firstchar) {
case 'Y':
case 'y':
case '1':
vchiq_instance_set_trace(instance, 1);
break;
case 'N':
case 'n':
case '0':
vchiq_instance_set_trace(instance, 0);
break;
default:
break;
}
*ppos += count;
return count;
}
static const struct file_operations debugfs_trace_fops = {
.owner = THIS_MODULE,
.open = debugfs_trace_open,
.write = debugfs_trace_write,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
/* add an instance (process) to the debugfs entries */
void vchiq_debugfs_add_instance(struct vchiq_instance *instance)
{
char pidstr[16];
struct dentry *top;
snprintf(pidstr, sizeof(pidstr), "%d",
vchiq_instance_get_pid(instance));
top = debugfs_create_dir(pidstr, vchiq_dbg_clients);
debugfs_create_file("use_count", 0444, top, instance,
&debugfs_usecount_fops);
debugfs_create_file("trace", 0644, top, instance, &debugfs_trace_fops);
vchiq_instance_get_debugfs_node(instance)->dentry = top;
}
void vchiq_debugfs_remove_instance(struct vchiq_instance *instance)
{
struct vchiq_debugfs_node *node =
vchiq_instance_get_debugfs_node(instance);
debugfs_remove_recursive(node->dentry);
}
void vchiq_debugfs_init(struct vchiq_state *state)
{
vchiq_dbg_dir = debugfs_create_dir("vchiq", NULL);
vchiq_dbg_clients = debugfs_create_dir("clients", vchiq_dbg_dir);
debugfs_create_file("state", S_IFREG | 0444, vchiq_dbg_dir, state,
&vchiq_dump_fops);
}
/* remove all the debugfs entries */
void vchiq_debugfs_deinit(void)
{
debugfs_remove_recursive(vchiq_dbg_dir);
}
#else /* CONFIG_DEBUG_FS */
void vchiq_debugfs_init(struct vchiq_state *state)
{
}
void vchiq_debugfs_deinit(void)
{
}
void vchiq_debugfs_add_instance(struct vchiq_instance *instance)
{
}
void vchiq_debugfs_remove_instance(struct vchiq_instance *instance)
{
}
#endif /* CONFIG_DEBUG_FS */
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright (c) 2010-2012 Broadcom. All rights reserved. */
#ifndef VCHIQ_IOCTLS_H
#define VCHIQ_IOCTLS_H
#include <linux/ioctl.h>
#include <linux/raspberrypi/vchiq.h>
#define VCHIQ_IOC_MAGIC 0xc4
#define VCHIQ_INVALID_HANDLE (~0)
struct vchiq_service_params {
int fourcc;
int __user (*callback)(enum vchiq_reason reason,
struct vchiq_header *header,
unsigned int handle,
void *bulk_userdata);
void __user *userdata;
short version; /* Increment for non-trivial changes */
short version_min; /* Update for incompatible changes */
};
struct vchiq_create_service {
struct vchiq_service_params params;
int is_open;
int is_vchi;
unsigned int handle; /* OUT */
};
struct vchiq_queue_message {
unsigned int handle;
unsigned int count;
const struct vchiq_element __user *elements;
};
struct vchiq_queue_bulk_transfer {
unsigned int handle;
void __user *data;
unsigned int size;
void __user *userdata;
enum vchiq_bulk_mode mode;
};
struct vchiq_completion_data {
enum vchiq_reason reason;
struct vchiq_header __user *header;
void __user *service_userdata;
void __user *cb_userdata;
};
struct vchiq_await_completion {
unsigned int count;
struct vchiq_completion_data __user *buf;
unsigned int msgbufsize;
unsigned int msgbufcount; /* IN/OUT */
void * __user *msgbufs;
};
struct vchiq_dequeue_message {
unsigned int handle;
int blocking;
unsigned int bufsize;
void __user *buf;
};
struct vchiq_get_config {
unsigned int config_size;
struct vchiq_config __user *pconfig;
};
struct vchiq_set_service_option {
unsigned int handle;
enum vchiq_service_option option;
int value;
};
struct vchiq_dump_mem {
void __user *virt_addr;
size_t num_bytes;
};
#define VCHIQ_IOC_CONNECT _IO(VCHIQ_IOC_MAGIC, 0)
#define VCHIQ_IOC_SHUTDOWN _IO(VCHIQ_IOC_MAGIC, 1)
#define VCHIQ_IOC_CREATE_SERVICE \
_IOWR(VCHIQ_IOC_MAGIC, 2, struct vchiq_create_service)
#define VCHIQ_IOC_REMOVE_SERVICE _IO(VCHIQ_IOC_MAGIC, 3)
#define VCHIQ_IOC_QUEUE_MESSAGE \
_IOW(VCHIQ_IOC_MAGIC, 4, struct vchiq_queue_message)
#define VCHIQ_IOC_QUEUE_BULK_TRANSMIT \
_IOWR(VCHIQ_IOC_MAGIC, 5, struct vchiq_queue_bulk_transfer)
#define VCHIQ_IOC_QUEUE_BULK_RECEIVE \
_IOWR(VCHIQ_IOC_MAGIC, 6, struct vchiq_queue_bulk_transfer)
#define VCHIQ_IOC_AWAIT_COMPLETION \
_IOWR(VCHIQ_IOC_MAGIC, 7, struct vchiq_await_completion)
#define VCHIQ_IOC_DEQUEUE_MESSAGE \
_IOWR(VCHIQ_IOC_MAGIC, 8, struct vchiq_dequeue_message)
#define VCHIQ_IOC_GET_CLIENT_ID _IO(VCHIQ_IOC_MAGIC, 9)
#define VCHIQ_IOC_GET_CONFIG \
_IOWR(VCHIQ_IOC_MAGIC, 10, struct vchiq_get_config)
#define VCHIQ_IOC_CLOSE_SERVICE _IO(VCHIQ_IOC_MAGIC, 11)
#define VCHIQ_IOC_USE_SERVICE _IO(VCHIQ_IOC_MAGIC, 12)
#define VCHIQ_IOC_RELEASE_SERVICE _IO(VCHIQ_IOC_MAGIC, 13)
#define VCHIQ_IOC_SET_SERVICE_OPTION \
_IOW(VCHIQ_IOC_MAGIC, 14, struct vchiq_set_service_option)
#define VCHIQ_IOC_DUMP_PHYS_MEM \
_IOW(VCHIQ_IOC_MAGIC, 15, struct vchiq_dump_mem)
#define VCHIQ_IOC_LIB_VERSION _IO(VCHIQ_IOC_MAGIC, 16)
#define VCHIQ_IOC_CLOSE_DELIVERED _IO(VCHIQ_IOC_MAGIC, 17)
#define VCHIQ_IOC_MAX 17
#endif
@@ -0,0 +1,7 @@
config BCM2835_VCHIQ_MMAL
tristate "BCM2835 MMAL VCHIQ service"
depends on BCM2835_VCHIQ
help
Enables the MMAL API over VCHIQ interface as used for the
majority of the multimedia services on VideoCore.
Defaults to Y when the Broadcomd BCM2835 camera host is selected.
@@ -0,0 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
bcm2835-mmal-vchiq-objs := mmal-vchiq.o
obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += bcm2835-mmal-vchiq.o
@@ -0,0 +1,65 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*
* MMAL structures
*
*/
#ifndef MMAL_COMMON_H
#define MMAL_COMMON_H
#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24))
#define MMAL_MAGIC MMAL_FOURCC('m', 'm', 'a', 'l')
/** Special value signalling that time is not known */
#define MMAL_TIME_UNKNOWN BIT_ULL(63)
struct mmal_msg_context;
/* mapping between v4l and mmal video modes */
struct mmal_fmt {
u32 fourcc; /* v4l2 format id */
int flags; /* v4l2 flags field */
u32 mmal;
int depth;
u32 mmal_component; /* MMAL component index to be used to encode */
u32 ybbp; /* depth of first Y plane for planar formats */
bool remove_padding; /* Does the GPU have to remove padding,
* or can we do hide padding via bytesperline.
*/
};
/* buffer for one video frame */
struct mmal_buffer {
/* v4l buffer data -- must be first */
struct vb2_v4l2_buffer vb;
/* list of buffers available */
struct list_head list;
void *buffer; /* buffer pointer */
unsigned long buffer_size; /* size of allocated buffer */
struct mmal_msg_context *msg_context;
unsigned long length;
u32 mmal_flags;
s64 dts;
s64 pts;
};
/* */
struct mmal_colourfx {
s32 enable;
u32 u;
u32 v;
};
#endif
@@ -0,0 +1,124 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
#ifndef MMAL_ENCODINGS_H
#define MMAL_ENCODINGS_H
#define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4')
#define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3')
#define MMAL_ENCODING_MP4V MMAL_FOURCC('M', 'P', '4', 'V')
#define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V')
#define MMAL_ENCODING_MP1V MMAL_FOURCC('M', 'P', '1', 'V')
#define MMAL_ENCODING_WMV3 MMAL_FOURCC('W', 'M', 'V', '3')
#define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2')
#define MMAL_ENCODING_WMV1 MMAL_FOURCC('W', 'M', 'V', '1')
#define MMAL_ENCODING_WVC1 MMAL_FOURCC('W', 'V', 'C', '1')
#define MMAL_ENCODING_VP8 MMAL_FOURCC('V', 'P', '8', ' ')
#define MMAL_ENCODING_VP7 MMAL_FOURCC('V', 'P', '7', ' ')
#define MMAL_ENCODING_VP6 MMAL_FOURCC('V', 'P', '6', ' ')
#define MMAL_ENCODING_THEORA MMAL_FOURCC('T', 'H', 'E', 'O')
#define MMAL_ENCODING_SPARK MMAL_FOURCC('S', 'P', 'R', 'K')
#define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G')
#define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G')
#define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ')
#define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ')
#define MMAL_ENCODING_PPM MMAL_FOURCC('P', 'P', 'M', ' ')
#define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ')
#define MMAL_ENCODING_BMP MMAL_FOURCC('B', 'M', 'P', ' ')
#define MMAL_ENCODING_I420 MMAL_FOURCC('I', '4', '2', '0')
#define MMAL_ENCODING_I420_SLICE MMAL_FOURCC('S', '4', '2', '0')
#define MMAL_ENCODING_YV12 MMAL_FOURCC('Y', 'V', '1', '2')
#define MMAL_ENCODING_I422 MMAL_FOURCC('I', '4', '2', '2')
#define MMAL_ENCODING_I422_SLICE MMAL_FOURCC('S', '4', '2', '2')
#define MMAL_ENCODING_YUYV MMAL_FOURCC('Y', 'U', 'Y', 'V')
#define MMAL_ENCODING_YVYU MMAL_FOURCC('Y', 'V', 'Y', 'U')
#define MMAL_ENCODING_UYVY MMAL_FOURCC('U', 'Y', 'V', 'Y')
#define MMAL_ENCODING_VYUY MMAL_FOURCC('V', 'Y', 'U', 'Y')
#define MMAL_ENCODING_NV12 MMAL_FOURCC('N', 'V', '1', '2')
#define MMAL_ENCODING_NV21 MMAL_FOURCC('N', 'V', '2', '1')
#define MMAL_ENCODING_ARGB MMAL_FOURCC('A', 'R', 'G', 'B')
#define MMAL_ENCODING_RGBA MMAL_FOURCC('R', 'G', 'B', 'A')
#define MMAL_ENCODING_ABGR MMAL_FOURCC('A', 'B', 'G', 'R')
#define MMAL_ENCODING_BGRA MMAL_FOURCC('B', 'G', 'R', 'A')
#define MMAL_ENCODING_RGB16 MMAL_FOURCC('R', 'G', 'B', '2')
#define MMAL_ENCODING_RGB24 MMAL_FOURCC('R', 'G', 'B', '3')
#define MMAL_ENCODING_RGB32 MMAL_FOURCC('R', 'G', 'B', '4')
#define MMAL_ENCODING_BGR16 MMAL_FOURCC('B', 'G', 'R', '2')
#define MMAL_ENCODING_BGR24 MMAL_FOURCC('B', 'G', 'R', '3')
#define MMAL_ENCODING_BGR32 MMAL_FOURCC('B', 'G', 'R', '4')
/** SAND Video (YUVUV128) format, native format understood by VideoCore.
* This format is *not* opaque - if requested you will receive full frames
* of YUV_UV video.
*/
#define MMAL_ENCODING_YUVUV128 MMAL_FOURCC('S', 'A', 'N', 'D')
/** VideoCore opaque image format, image handles are returned to
* the host but not the actual image data.
*/
#define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V')
/** An EGL image handle
*/
#define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I')
/* }@ */
/** \name Pre-defined audio encodings */
/* @{ */
#define MMAL_ENCODING_PCM_UNSIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'U')
#define MMAL_ENCODING_PCM_UNSIGNED_LE MMAL_FOURCC('p', 'c', 'm', 'u')
#define MMAL_ENCODING_PCM_SIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'S')
#define MMAL_ENCODING_PCM_SIGNED_LE MMAL_FOURCC('p', 'c', 'm', 's')
#define MMAL_ENCODING_PCM_FLOAT_BE MMAL_FOURCC('P', 'C', 'M', 'F')
#define MMAL_ENCODING_PCM_FLOAT_LE MMAL_FOURCC('p', 'c', 'm', 'f')
/* Pre-defined H264 encoding variants */
/** ISO 14496-10 Annex B byte stream format */
#define MMAL_ENCODING_VARIANT_H264_DEFAULT 0
/** ISO 14496-15 AVC stream format */
#define MMAL_ENCODING_VARIANT_H264_AVC1 MMAL_FOURCC('A', 'V', 'C', '1')
/** Implicitly delineated NAL units without emulation prevention */
#define MMAL_ENCODING_VARIANT_H264_RAW MMAL_FOURCC('R', 'A', 'W', ' ')
/** \defgroup MmalColorSpace List of pre-defined video color spaces
* This defines a list of common color spaces. This list isn't exhaustive and
* is only provided as a convenience to avoid clients having to use FourCC
* codes directly. However components are allowed to define and use their own
* FourCC codes.
*/
/* @{ */
/** Unknown color space */
#define MMAL_COLOR_SPACE_UNKNOWN 0
/** ITU-R BT.601-5 [SDTV] */
#define MMAL_COLOR_SPACE_ITUR_BT601 MMAL_FOURCC('Y', '6', '0', '1')
/** ITU-R BT.709-3 [HDTV] */
#define MMAL_COLOR_SPACE_ITUR_BT709 MMAL_FOURCC('Y', '7', '0', '9')
/** JPEG JFIF */
#define MMAL_COLOR_SPACE_JPEG_JFIF MMAL_FOURCC('Y', 'J', 'F', 'I')
/** Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */
#define MMAL_COLOR_SPACE_FCC MMAL_FOURCC('Y', 'F', 'C', 'C')
/** Society of Motion Picture and Television Engineers 240M (1999) */
#define MMAL_COLOR_SPACE_SMPTE240M MMAL_FOURCC('Y', '2', '4', '0')
/** ITU-R BT.470-2 System M */
#define MMAL_COLOR_SPACE_BT470_2_M MMAL_FOURCC('Y', '_', '_', 'M')
/** ITU-R BT.470-2 System BG */
#define MMAL_COLOR_SPACE_BT470_2_BG MMAL_FOURCC('Y', '_', 'B', 'G')
/** JPEG JFIF, but with 16..255 luma */
#define MMAL_COLOR_SPACE_JFIF_Y16_255 MMAL_FOURCC('Y', 'Y', '1', '6')
/* @} MmalColorSpace List */
#endif /* MMAL_ENCODINGS_H */
@@ -0,0 +1,45 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
#ifndef MMAL_MSG_COMMON_H
#define MMAL_MSG_COMMON_H
#include <linux/types.h>
enum mmal_msg_status {
MMAL_MSG_STATUS_SUCCESS = 0, /**< Success */
MMAL_MSG_STATUS_ENOMEM, /**< Out of memory */
MMAL_MSG_STATUS_ENOSPC, /**< Out of resources other than memory */
MMAL_MSG_STATUS_EINVAL, /**< Argument is invalid */
MMAL_MSG_STATUS_ENOSYS, /**< Function not implemented */
MMAL_MSG_STATUS_ENOENT, /**< No such file or directory */
MMAL_MSG_STATUS_ENXIO, /**< No such device or address */
MMAL_MSG_STATUS_EIO, /**< I/O error */
MMAL_MSG_STATUS_ESPIPE, /**< Illegal seek */
MMAL_MSG_STATUS_ECORRUPT, /**< Data is corrupt \attention */
MMAL_MSG_STATUS_ENOTREADY, /**< Component is not ready */
MMAL_MSG_STATUS_ECONFIG, /**< Component is not configured */
MMAL_MSG_STATUS_EISCONN, /**< Port is already connected */
MMAL_MSG_STATUS_ENOTCONN, /**< Port is disconnected */
MMAL_MSG_STATUS_EAGAIN, /**< Resource temporarily unavailable. */
MMAL_MSG_STATUS_EFAULT, /**< Bad address */
};
struct mmal_rect {
s32 x; /**< x coordinate (from left) */
s32 y; /**< y coordinate (from top) */
s32 width; /**< width */
s32 height; /**< height */
};
#endif /* MMAL_MSG_COMMON_H */
@@ -0,0 +1,108 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
#ifndef MMAL_MSG_FORMAT_H
#define MMAL_MSG_FORMAT_H
#include <linux/math.h>
#include "mmal-msg-common.h"
/* MMAL_ES_FORMAT_T */
struct mmal_audio_format {
u32 channels; /* Number of audio channels */
u32 sample_rate; /* Sample rate */
u32 bits_per_sample; /* Bits per sample */
u32 block_align; /* Size of a block of data */
};
struct mmal_video_format {
u32 width; /* Width of frame in pixels */
u32 height; /* Height of frame in rows of pixels */
struct mmal_rect crop; /* Visible region of the frame */
struct s32_fract frame_rate; /* Frame rate */
struct s32_fract par; /* Pixel aspect ratio */
/*
* FourCC specifying the color space of the video stream. See the
* MmalColorSpace "pre-defined color spaces" for some examples.
*/
u32 color_space;
};
struct mmal_subpicture_format {
u32 x_offset;
u32 y_offset;
};
union mmal_es_specific_format {
struct mmal_audio_format audio;
struct mmal_video_format video;
struct mmal_subpicture_format subpicture;
};
/* Definition of an elementary stream format (MMAL_ES_FORMAT_T) */
struct mmal_es_format_local {
u32 type; /* enum mmal_es_type */
u32 encoding; /* FourCC specifying encoding of the elementary
* stream.
*/
u32 encoding_variant; /* FourCC specifying the specific
* encoding variant of the elementary
* stream.
*/
union mmal_es_specific_format *es; /* Type specific
* information for the
* elementary stream
*/
u32 bitrate; /* Bitrate in bits per second */
u32 flags; /* Flags describing properties of the elementary
* stream.
*/
u32 extradata_size; /* Size of the codec specific data */
u8 *extradata; /* Codec specific data */
};
/* Remote definition of an elementary stream format (MMAL_ES_FORMAT_T) */
struct mmal_es_format {
u32 type; /* enum mmal_es_type */
u32 encoding; /* FourCC specifying encoding of the elementary
* stream.
*/
u32 encoding_variant; /* FourCC specifying the specific
* encoding variant of the elementary
* stream.
*/
u32 es; /* Type specific
* information for the
* elementary stream
*/
u32 bitrate; /* Bitrate in bits per second */
u32 flags; /* Flags describing properties of the elementary
* stream.
*/
u32 extradata_size; /* Size of the codec specific data */
u32 extradata; /* Codec specific data */
};
#endif /* MMAL_MSG_FORMAT_H */
@@ -0,0 +1,109 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
/* MMAL_PORT_TYPE_T */
enum mmal_port_type {
MMAL_PORT_TYPE_UNKNOWN = 0, /* Unknown port type */
MMAL_PORT_TYPE_CONTROL, /* Control port */
MMAL_PORT_TYPE_INPUT, /* Input port */
MMAL_PORT_TYPE_OUTPUT, /* Output port */
MMAL_PORT_TYPE_CLOCK, /* Clock port */
};
/* The port is pass-through and doesn't need buffer headers allocated */
#define MMAL_PORT_CAPABILITY_PASSTHROUGH 0x01
/*
*The port wants to allocate the buffer payloads.
* This signals a preference that payload allocation should be done
* on this port for efficiency reasons.
*/
#define MMAL_PORT_CAPABILITY_ALLOCATION 0x02
/*
* The port supports format change events.
* This applies to input ports and is used to let the client know
* whether the port supports being reconfigured via a format
* change event (i.e. without having to disable the port).
*/
#define MMAL_PORT_CAPABILITY_SUPPORTS_EVENT_FORMAT_CHANGE 0x04
/*
* mmal port structure (MMAL_PORT_T)
*
* most elements are informational only, the pointer values for
* interogation messages are generally provided as additional
* structures within the message. When used to set values only the
* buffer_num, buffer_size and userdata parameters are writable.
*/
struct mmal_port {
u32 priv; /* Private member used by the framework */
u32 name; /* Port name. Used for debugging purposes (RO) */
u32 type; /* Type of the port (RO) enum mmal_port_type */
u16 index; /* Index of the port in its type list (RO) */
u16 index_all; /* Index of the port in the list of all ports (RO) */
u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */
u32 format; /* Format of the elementary stream */
u32 buffer_num_min; /* Minimum number of buffers the port
* requires (RO). This is set by the
* component.
*/
u32 buffer_size_min; /* Minimum size of buffers the port
* requires (RO). This is set by the
* component.
*/
u32 buffer_alignment_min;/* Minimum alignment requirement for
* the buffers (RO). A value of
* zero means no special alignment
* requirements. This is set by the
* component.
*/
u32 buffer_num_recommended; /* Number of buffers the port
* recommends for optimal
* performance (RO). A value of
* zero means no special
* recommendation. This is set
* by the component.
*/
u32 buffer_size_recommended; /* Size of buffers the port
* recommends for optimal
* performance (RO). A value of
* zero means no special
* recommendation. This is set
* by the component.
*/
u32 buffer_num; /* Actual number of buffers the port will use.
* This is set by the client.
*/
u32 buffer_size; /* Actual maximum size of the buffers that
* will be sent to the port. This is set by
* the client.
*/
u32 component; /* Component this port belongs to (Read Only) */
u32 userdata; /* Field reserved for use by the client */
u32 capabilities; /* Flags describing the capabilities of a
* port (RO). Bitwise combination of \ref
* portcapabilities "Port capabilities"
* values.
*/
};
@@ -0,0 +1,406 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
/*
* all the data structures which serialise the MMAL protocol. note
* these are directly mapped onto the received message data.
*
* BEWARE: They seem to *assume* pointers are u32 and that there is no
* structure padding!
*
* NOTE: this implementation uses kernel types to ensure sizes. Rather
* than assigning values to enums to force their size the
* implementation uses fixed size types and not the enums (though the
* comments have the actual enum type
*/
#ifndef MMAL_MSG_H
#define MMAL_MSG_H
#define VC_MMAL_VER 15
#define VC_MMAL_MIN_VER 10
/* max total message size is 512 bytes */
#define MMAL_MSG_MAX_SIZE 512
/* with six 32bit header elements max payload is therefore 488 bytes */
#define MMAL_MSG_MAX_PAYLOAD 488
#include "mmal-msg-common.h"
#include "mmal-msg-format.h"
#include "mmal-msg-port.h"
#include "mmal-vchiq.h"
enum mmal_msg_type {
MMAL_MSG_TYPE_QUIT = 1,
MMAL_MSG_TYPE_SERVICE_CLOSED,
MMAL_MSG_TYPE_GET_VERSION,
MMAL_MSG_TYPE_COMPONENT_CREATE,
MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */
MMAL_MSG_TYPE_COMPONENT_ENABLE,
MMAL_MSG_TYPE_COMPONENT_DISABLE,
MMAL_MSG_TYPE_PORT_INFO_GET,
MMAL_MSG_TYPE_PORT_INFO_SET,
MMAL_MSG_TYPE_PORT_ACTION, /* 10 */
MMAL_MSG_TYPE_BUFFER_FROM_HOST,
MMAL_MSG_TYPE_BUFFER_TO_HOST,
MMAL_MSG_TYPE_GET_STATS,
MMAL_MSG_TYPE_PORT_PARAMETER_SET,
MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */
MMAL_MSG_TYPE_EVENT_TO_HOST,
MMAL_MSG_TYPE_GET_CORE_STATS_FOR_PORT,
MMAL_MSG_TYPE_OPAQUE_ALLOCATOR,
MMAL_MSG_TYPE_CONSUME_MEM,
MMAL_MSG_TYPE_LMK, /* 20 */
MMAL_MSG_TYPE_OPAQUE_ALLOCATOR_DESC,
MMAL_MSG_TYPE_DRM_GET_LHS32,
MMAL_MSG_TYPE_DRM_GET_TIME,
MMAL_MSG_TYPE_BUFFER_FROM_HOST_ZEROLEN,
MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */
MMAL_MSG_TYPE_HOST_LOG,
MMAL_MSG_TYPE_MSG_LAST
};
/* port action request messages differ depending on the action type */
enum mmal_msg_port_action_type {
MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unknown action */
MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */
MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */
MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */
MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */
MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */
MMAL_MSG_PORT_ACTION_TYPE_SET_REQUIREMENTS, /* Set buffer requirements*/
};
struct mmal_msg_header {
u32 magic;
u32 type; /* enum mmal_msg_type */
/* Opaque handle to the control service */
u32 control_service;
u32 context; /* a u32 per message context */
u32 status; /* The status of the vchiq operation */
u32 padding;
};
/* Send from VC to host to report version */
struct mmal_msg_version {
u32 flags;
u32 major;
u32 minor;
u32 minimum;
};
/* request to VC to create component */
struct mmal_msg_component_create {
u32 client_component; /* component context */
char name[128];
u32 pid; /* For debug */
};
/* reply from VC to component creation request */
struct mmal_msg_component_create_reply {
u32 status; /* enum mmal_msg_status - how does this differ to
* the one in the header?
*/
u32 component_handle; /* VideoCore handle for component */
u32 input_num; /* Number of input ports */
u32 output_num; /* Number of output ports */
u32 clock_num; /* Number of clock ports */
};
/* request to VC to destroy a component */
struct mmal_msg_component_destroy {
u32 component_handle;
};
struct mmal_msg_component_destroy_reply {
u32 status; /* The component destruction status */
};
/* request and reply to VC to enable a component */
struct mmal_msg_component_enable {
u32 component_handle;
};
struct mmal_msg_component_enable_reply {
u32 status; /* The component enable status */
};
/* request and reply to VC to disable a component */
struct mmal_msg_component_disable {
u32 component_handle;
};
struct mmal_msg_component_disable_reply {
u32 status; /* The component disable status */
};
/* request to VC to get port information */
struct mmal_msg_port_info_get {
u32 component_handle; /* component handle port is associated with */
u32 port_type; /* enum mmal_msg_port_type */
u32 index; /* port index to query */
};
/* reply from VC to get port info request */
struct mmal_msg_port_info_get_reply {
u32 status; /* enum mmal_msg_status */
u32 component_handle; /* component handle port is associated with */
u32 port_type; /* enum mmal_msg_port_type */
u32 port_index; /* port indexed in query */
s32 found; /* unused */
u32 port_handle; /* Handle to use for this port */
struct mmal_port port;
struct mmal_es_format format; /* elementary stream format */
union mmal_es_specific_format es; /* es type specific data */
u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; /* es extra data */
};
/* request to VC to set port information */
struct mmal_msg_port_info_set {
u32 component_handle;
u32 port_type; /* enum mmal_msg_port_type */
u32 port_index; /* port indexed in query */
struct mmal_port port;
struct mmal_es_format format;
union mmal_es_specific_format es;
u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE];
};
/* reply from VC to port info set request */
struct mmal_msg_port_info_set_reply {
u32 status;
u32 component_handle; /* component handle port is associated with */
u32 port_type; /* enum mmal_msg_port_type */
u32 index; /* port indexed in query */
s32 found; /* unused */
u32 port_handle; /* Handle to use for this port */
struct mmal_port port;
struct mmal_es_format format;
union mmal_es_specific_format es;
u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE];
};
/* port action requests that take a mmal_port as a parameter */
struct mmal_msg_port_action_port {
u32 component_handle;
u32 port_handle;
u32 action; /* enum mmal_msg_port_action_type */
struct mmal_port port;
};
/* port action requests that take handles as a parameter */
struct mmal_msg_port_action_handle {
u32 component_handle;
u32 port_handle;
u32 action; /* enum mmal_msg_port_action_type */
u32 connect_component_handle;
u32 connect_port_handle;
};
struct mmal_msg_port_action_reply {
u32 status; /* The port action operation status */
};
/* MMAL buffer transfer */
/* Size of space reserved in a buffer message for short messages. */
#define MMAL_VC_SHORT_DATA 128
/* Signals that the current payload is the end of the stream of data */
#define MMAL_BUFFER_HEADER_FLAG_EOS BIT(0)
/* Signals that the start of the current payload starts a frame */
#define MMAL_BUFFER_HEADER_FLAG_FRAME_START BIT(1)
/* Signals that the end of the current payload ends a frame */
#define MMAL_BUFFER_HEADER_FLAG_FRAME_END BIT(2)
/* Signals that the current payload contains only complete frames (>1) */
#define MMAL_BUFFER_HEADER_FLAG_FRAME \
(MMAL_BUFFER_HEADER_FLAG_FRAME_START | \
MMAL_BUFFER_HEADER_FLAG_FRAME_END)
/* Signals that the current payload is a keyframe (i.e. self decodable) */
#define MMAL_BUFFER_HEADER_FLAG_KEYFRAME BIT(3)
/*
* Signals a discontinuity in the stream of data (e.g. after a seek).
* Can be used for instance by a decoder to reset its state
*/
#define MMAL_BUFFER_HEADER_FLAG_DISCONTINUITY BIT(4)
/*
* Signals a buffer containing some kind of config data for the component
* (e.g. codec config data)
*/
#define MMAL_BUFFER_HEADER_FLAG_CONFIG BIT(5)
/* Signals an encrypted payload */
#define MMAL_BUFFER_HEADER_FLAG_ENCRYPTED BIT(6)
/* Signals a buffer containing side information */
#define MMAL_BUFFER_HEADER_FLAG_CODECSIDEINFO BIT(7)
/*
* Signals a buffer which is the snapshot/postview image from a stills
* capture
*/
#define MMAL_BUFFER_HEADER_FLAGS_SNAPSHOT BIT(8)
/* Signals a buffer which contains data known to be corrupted */
#define MMAL_BUFFER_HEADER_FLAG_CORRUPTED BIT(9)
/* Signals that a buffer failed to be transmitted */
#define MMAL_BUFFER_HEADER_FLAG_TRANSMISSION_FAILED BIT(10)
struct mmal_driver_buffer {
u32 magic;
u32 component_handle;
u32 port_handle;
u32 client_context;
};
/* buffer header */
struct mmal_buffer_header {
u32 next; /* next header */
u32 priv; /* framework private data */
u32 cmd;
u32 data;
u32 alloc_size;
u32 length;
u32 offset;
u32 flags;
s64 pts;
s64 dts;
u32 type;
u32 user_data;
};
struct mmal_buffer_header_type_specific {
union {
struct {
u32 planes;
u32 offset[4];
u32 pitch[4];
u32 flags;
} video;
} u;
};
struct mmal_msg_buffer_from_host {
/*
*The front 32 bytes of the buffer header are copied
* back to us in the reply to allow for context. This
* area is used to store two mmal_driver_buffer structures to
* allow for multiple concurrent service users.
*/
/* control data */
struct mmal_driver_buffer drvbuf;
/* referenced control data for passthrough buffer management */
struct mmal_driver_buffer drvbuf_ref;
struct mmal_buffer_header buffer_header; /* buffer header itself */
struct mmal_buffer_header_type_specific buffer_header_type_specific;
s32 is_zero_copy;
s32 has_reference;
/* allows short data to be xfered in control message */
u32 payload_in_message;
u8 short_data[MMAL_VC_SHORT_DATA];
};
/* port parameter setting */
#define MMAL_WORKER_PORT_PARAMETER_SPACE 96
struct mmal_msg_port_parameter_set {
u32 component_handle; /* component */
u32 port_handle; /* port */
u32 id; /* Parameter ID */
u32 size; /* Parameter size */
u32 value[MMAL_WORKER_PORT_PARAMETER_SPACE];
};
struct mmal_msg_port_parameter_set_reply {
u32 status; /* enum mmal_msg_status todo: how does this
* differ to the one in the header?
*/
};
/* port parameter getting */
struct mmal_msg_port_parameter_get {
u32 component_handle; /* component */
u32 port_handle; /* port */
u32 id; /* Parameter ID */
u32 size; /* Parameter size */
};
struct mmal_msg_port_parameter_get_reply {
u32 status; /* Status of mmal_port_parameter_get call */
u32 id; /* Parameter ID */
u32 size; /* Parameter size */
u32 value[MMAL_WORKER_PORT_PARAMETER_SPACE];
};
/* event messages */
#define MMAL_WORKER_EVENT_SPACE 256
struct mmal_msg_event_to_host {
u32 client_component; /* component context */
u32 port_type;
u32 port_num;
u32 cmd;
u32 length;
u8 data[MMAL_WORKER_EVENT_SPACE];
u32 delayed_buffer;
};
/* all mmal messages are serialised through this structure */
struct mmal_msg {
/* header */
struct mmal_msg_header h;
/* payload */
union {
struct mmal_msg_version version;
struct mmal_msg_component_create component_create;
struct mmal_msg_component_create_reply component_create_reply;
struct mmal_msg_component_destroy component_destroy;
struct mmal_msg_component_destroy_reply component_destroy_reply;
struct mmal_msg_component_enable component_enable;
struct mmal_msg_component_enable_reply component_enable_reply;
struct mmal_msg_component_disable component_disable;
struct mmal_msg_component_disable_reply component_disable_reply;
struct mmal_msg_port_info_get port_info_get;
struct mmal_msg_port_info_get_reply port_info_get_reply;
struct mmal_msg_port_info_set port_info_set;
struct mmal_msg_port_info_set_reply port_info_set_reply;
struct mmal_msg_port_action_port port_action_port;
struct mmal_msg_port_action_handle port_action_handle;
struct mmal_msg_port_action_reply port_action_reply;
struct mmal_msg_buffer_from_host buffer_from_host;
struct mmal_msg_port_parameter_set port_parameter_set;
struct mmal_msg_port_parameter_set_reply
port_parameter_set_reply;
struct mmal_msg_port_parameter_get
port_parameter_get;
struct mmal_msg_port_parameter_get_reply
port_parameter_get_reply;
struct mmal_msg_event_to_host event_to_host;
u8 payload[MMAL_MSG_MAX_PAYLOAD];
} u;
};
#endif
@@ -0,0 +1,752 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*/
/* common parameters */
/** @name Parameter groups
* Parameters are divided into groups, and then allocated sequentially within
* a group using an enum.
* @{
*/
#ifndef MMAL_PARAMETERS_H
#define MMAL_PARAMETERS_H
#include <linux/math.h>
/** Common parameter ID group, used with many types of component. */
#define MMAL_PARAMETER_GROUP_COMMON (0 << 16)
/** Camera-specific parameter ID group. */
#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16)
/** Video-specific parameter ID group. */
#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16)
/** Audio-specific parameter ID group. */
#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16)
/** Clock-specific parameter ID group. */
#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16)
/** Miracast-specific parameter ID group. */
#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16)
/* Common parameters */
enum mmal_parameter_common_type {
/**< Never a valid parameter ID */
MMAL_PARAMETER_UNUSED = MMAL_PARAMETER_GROUP_COMMON,
/**< MMAL_PARAMETER_ENCODING_T */
MMAL_PARAMETER_SUPPORTED_ENCODINGS,
/**< MMAL_PARAMETER_URI_T */
MMAL_PARAMETER_URI,
/** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */
MMAL_PARAMETER_CHANGE_EVENT_REQUEST,
/** MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_ZERO_COPY,
/**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */
MMAL_PARAMETER_BUFFER_REQUIREMENTS,
/**< MMAL_PARAMETER_STATISTICS_T */
MMAL_PARAMETER_STATISTICS,
/**< MMAL_PARAMETER_CORE_STATISTICS_T */
MMAL_PARAMETER_CORE_STATISTICS,
/**< MMAL_PARAMETER_MEM_USAGE_T */
MMAL_PARAMETER_MEM_USAGE,
/**< MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_BUFFER_FLAG_FILTER,
/**< MMAL_PARAMETER_SEEK_T */
MMAL_PARAMETER_SEEK,
/**< MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_POWERMON_ENABLE,
/**< MMAL_PARAMETER_LOGGING_T */
MMAL_PARAMETER_LOGGING,
/**< MMAL_PARAMETER_UINT64_T */
MMAL_PARAMETER_SYSTEM_TIME,
/**< MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_NO_IMAGE_PADDING,
};
/* camera parameters */
enum mmal_parameter_camera_type {
/* 0 */
/** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */
MMAL_PARAMETER_THUMBNAIL_CONFIGURATION =
MMAL_PARAMETER_GROUP_CAMERA,
/**< Unused? */
MMAL_PARAMETER_CAPTURE_QUALITY,
/**< @ref MMAL_PARAMETER_INT32_T */
MMAL_PARAMETER_ROTATION,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_EXIF_DISABLE,
/**< @ref MMAL_PARAMETER_EXIF_T */
MMAL_PARAMETER_EXIF,
/**< @ref MMAL_PARAM_AWBMODE_T */
MMAL_PARAMETER_AWB_MODE,
/**< @ref MMAL_PARAMETER_IMAGEFX_T */
MMAL_PARAMETER_IMAGE_EFFECT,
/**< @ref MMAL_PARAMETER_COLOURFX_T */
MMAL_PARAMETER_COLOUR_EFFECT,
/**< @ref MMAL_PARAMETER_FLICKERAVOID_T */
MMAL_PARAMETER_FLICKER_AVOID,
/**< @ref MMAL_PARAMETER_FLASH_T */
MMAL_PARAMETER_FLASH,
/**< @ref MMAL_PARAMETER_REDEYE_T */
MMAL_PARAMETER_REDEYE,
/**< @ref MMAL_PARAMETER_FOCUS_T */
MMAL_PARAMETER_FOCUS,
/**< Unused? */
MMAL_PARAMETER_FOCAL_LENGTHS,
/**< @ref MMAL_PARAMETER_INT32_T */
MMAL_PARAMETER_EXPOSURE_COMP,
/**< @ref MMAL_PARAMETER_SCALEFACTOR_T */
MMAL_PARAMETER_ZOOM,
/**< @ref MMAL_PARAMETER_MIRROR_T */
MMAL_PARAMETER_MIRROR,
/* 0x10 */
/**< @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_CAMERA_NUM,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_CAPTURE,
/**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */
MMAL_PARAMETER_EXPOSURE_MODE,
/**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */
MMAL_PARAMETER_EXP_METERING_MODE,
/**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */
MMAL_PARAMETER_FOCUS_STATUS,
/**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */
MMAL_PARAMETER_CAMERA_CONFIG,
/**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */
MMAL_PARAMETER_CAPTURE_STATUS,
/**< @ref MMAL_PARAMETER_FACE_TRACK_T */
MMAL_PARAMETER_FACE_TRACK,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS,
/**< @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_JPEG_Q_FACTOR,
/**< @ref MMAL_PARAMETER_FRAME_RATE_T */
MMAL_PARAMETER_FRAME_RATE,
/**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */
MMAL_PARAMETER_USE_STC,
/**< @ref MMAL_PARAMETER_CAMERA_INFO_T */
MMAL_PARAMETER_CAMERA_INFO,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_STABILISATION,
/**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */
MMAL_PARAMETER_FACE_TRACK_RESULTS,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_ENABLE_RAW_CAPTURE,
/* 0x20 */
/**< @ref MMAL_PARAMETER_URI_T */
MMAL_PARAMETER_DPF_FILE,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_ENABLE_DPF_FILE,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_DPF_FAIL_IS_FATAL,
/**< @ref MMAL_PARAMETER_CAPTUREMODE_T */
MMAL_PARAMETER_CAPTURE_MODE,
/**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */
MMAL_PARAMETER_FOCUS_REGIONS,
/**< @ref MMAL_PARAMETER_INPUT_CROP_T */
MMAL_PARAMETER_INPUT_CROP,
/**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */
MMAL_PARAMETER_SENSOR_INFORMATION,
/**< @ref MMAL_PARAMETER_FLASH_SELECT_T */
MMAL_PARAMETER_FLASH_SELECT,
/**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */
MMAL_PARAMETER_FIELD_OF_VIEW,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_HIGH_DYNAMIC_RANGE,
/**< @ref MMAL_PARAMETER_DRC_T */
MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION,
/**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */
MMAL_PARAMETER_ALGORITHM_CONTROL,
/**< @ref MMAL_PARAMETER_RATIONAL_T */
MMAL_PARAMETER_SHARPNESS,
/**< @ref MMAL_PARAMETER_RATIONAL_T */
MMAL_PARAMETER_CONTRAST,
/**< @ref MMAL_PARAMETER_RATIONAL_T */
MMAL_PARAMETER_BRIGHTNESS,
/**< @ref MMAL_PARAMETER_RATIONAL_T */
MMAL_PARAMETER_SATURATION,
/* 0x30 */
/**< @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_ISO,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_ANTISHAKE,
/** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */
MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_CAMERA_BURST_CAPTURE,
/** @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_CAMERA_MIN_ISO,
/** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */
MMAL_PARAMETER_CAMERA_USE_CASE,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_CAPTURE_STATS_PASS,
/** @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_CAMERA_CUSTOM_SENSOR_CONFIG,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_ENABLE_REGISTER_FILE,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_REGISTER_FAIL_IS_FATAL,
/** @ref MMAL_PARAMETER_CONFIGFILE_T */
MMAL_PARAMETER_CONFIGFILE_REGISTERS,
/** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */
MMAL_PARAMETER_CONFIGFILE_CHUNK_REGISTERS,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_JPEG_ATTACH_LOG,
/**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */
MMAL_PARAMETER_ZERO_SHUTTER_LAG,
/**< @ref MMAL_PARAMETER_FPS_RANGE_T */
MMAL_PARAMETER_FPS_RANGE,
/**< @ref MMAL_PARAMETER_INT32_T */
MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP,
/* 0x40 */
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_SW_SHARPEN_DISABLE,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_FLASH_REQUIRED,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_SW_SATURATION_DISABLE,
/**< Takes a @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_SHUTTER_SPEED,
/**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */
MMAL_PARAMETER_CUSTOM_AWB_GAINS,
};
enum mmal_parameter_camera_config_timestamp_mode {
MMAL_PARAM_TIMESTAMP_MODE_ZERO = 0, /* Always timestamp frames as 0 */
MMAL_PARAM_TIMESTAMP_MODE_RAW_STC, /* Use the raw STC value
* for the frame timestamp
*/
MMAL_PARAM_TIMESTAMP_MODE_RESET_STC, /* Use the STC timestamp
* but subtract the
* timestamp of the first
* frame sent to give a
* zero based timestamp.
*/
};
struct mmal_parameter_fps_range {
/**< Low end of the permitted framerate range */
struct s32_fract fps_low;
/**< High end of the permitted framerate range */
struct s32_fract fps_high;
};
/* camera configuration parameter */
struct mmal_parameter_camera_config {
/* Parameters for setting up the image pools */
u32 max_stills_w; /* Max size of stills capture */
u32 max_stills_h;
u32 stills_yuv422; /* Allow YUV422 stills capture */
u32 one_shot_stills; /* Continuous or one shot stills captures. */
u32 max_preview_video_w; /* Max size of the preview or video
* capture frames
*/
u32 max_preview_video_h;
u32 num_preview_video_frames;
/** Sets the height of the circular buffer for stills capture. */
u32 stills_capture_circular_buffer_height;
/** Allows preview/encode to resume as fast as possible after the stills
* input frame has been received, and then processes the still frame in
* the background whilst preview/encode has resumed.
* Actual mode is controlled by MMAL_PARAMETER_CAPTURE_MODE.
*/
u32 fast_preview_resume;
/** Selects algorithm for timestamping frames if
* there is no clock component connected.
* enum mmal_parameter_camera_config_timestamp_mode
*/
s32 use_stc_timestamp;
};
enum mmal_parameter_exposuremode {
MMAL_PARAM_EXPOSUREMODE_OFF,
MMAL_PARAM_EXPOSUREMODE_AUTO,
MMAL_PARAM_EXPOSUREMODE_NIGHT,
MMAL_PARAM_EXPOSUREMODE_NIGHTPREVIEW,
MMAL_PARAM_EXPOSUREMODE_BACKLIGHT,
MMAL_PARAM_EXPOSUREMODE_SPOTLIGHT,
MMAL_PARAM_EXPOSUREMODE_SPORTS,
MMAL_PARAM_EXPOSUREMODE_SNOW,
MMAL_PARAM_EXPOSUREMODE_BEACH,
MMAL_PARAM_EXPOSUREMODE_VERYLONG,
MMAL_PARAM_EXPOSUREMODE_FIXEDFPS,
MMAL_PARAM_EXPOSUREMODE_ANTISHAKE,
MMAL_PARAM_EXPOSUREMODE_FIREWORKS,
};
enum mmal_parameter_exposuremeteringmode {
MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE,
MMAL_PARAM_EXPOSUREMETERINGMODE_SPOT,
MMAL_PARAM_EXPOSUREMETERINGMODE_BACKLIT,
MMAL_PARAM_EXPOSUREMETERINGMODE_MATRIX,
};
enum mmal_parameter_awbmode {
MMAL_PARAM_AWBMODE_OFF,
MMAL_PARAM_AWBMODE_AUTO,
MMAL_PARAM_AWBMODE_SUNLIGHT,
MMAL_PARAM_AWBMODE_CLOUDY,
MMAL_PARAM_AWBMODE_SHADE,
MMAL_PARAM_AWBMODE_TUNGSTEN,
MMAL_PARAM_AWBMODE_FLUORESCENT,
MMAL_PARAM_AWBMODE_INCANDESCENT,
MMAL_PARAM_AWBMODE_FLASH,
MMAL_PARAM_AWBMODE_HORIZON,
};
enum mmal_parameter_imagefx {
MMAL_PARAM_IMAGEFX_NONE,
MMAL_PARAM_IMAGEFX_NEGATIVE,
MMAL_PARAM_IMAGEFX_SOLARIZE,
MMAL_PARAM_IMAGEFX_POSTERIZE,
MMAL_PARAM_IMAGEFX_WHITEBOARD,
MMAL_PARAM_IMAGEFX_BLACKBOARD,
MMAL_PARAM_IMAGEFX_SKETCH,
MMAL_PARAM_IMAGEFX_DENOISE,
MMAL_PARAM_IMAGEFX_EMBOSS,
MMAL_PARAM_IMAGEFX_OILPAINT,
MMAL_PARAM_IMAGEFX_HATCH,
MMAL_PARAM_IMAGEFX_GPEN,
MMAL_PARAM_IMAGEFX_PASTEL,
MMAL_PARAM_IMAGEFX_WATERCOLOUR,
MMAL_PARAM_IMAGEFX_FILM,
MMAL_PARAM_IMAGEFX_BLUR,
MMAL_PARAM_IMAGEFX_SATURATION,
MMAL_PARAM_IMAGEFX_COLOURSWAP,
MMAL_PARAM_IMAGEFX_WASHEDOUT,
MMAL_PARAM_IMAGEFX_POSTERISE,
MMAL_PARAM_IMAGEFX_COLOURPOINT,
MMAL_PARAM_IMAGEFX_COLOURBALANCE,
MMAL_PARAM_IMAGEFX_CARTOON,
};
enum MMAL_PARAM_FLICKERAVOID {
MMAL_PARAM_FLICKERAVOID_OFF,
MMAL_PARAM_FLICKERAVOID_AUTO,
MMAL_PARAM_FLICKERAVOID_50HZ,
MMAL_PARAM_FLICKERAVOID_60HZ,
MMAL_PARAM_FLICKERAVOID_MAX = 0x7FFFFFFF
};
struct mmal_parameter_awbgains {
struct s32_fract r_gain; /**< Red gain */
struct s32_fract b_gain; /**< Blue gain */
};
/** Manner of video rate control */
enum mmal_parameter_rate_control_mode {
MMAL_VIDEO_RATECONTROL_DEFAULT,
MMAL_VIDEO_RATECONTROL_VARIABLE,
MMAL_VIDEO_RATECONTROL_CONSTANT,
MMAL_VIDEO_RATECONTROL_VARIABLE_SKIP_FRAMES,
MMAL_VIDEO_RATECONTROL_CONSTANT_SKIP_FRAMES
};
enum mmal_video_profile {
MMAL_VIDEO_PROFILE_H263_BASELINE,
MMAL_VIDEO_PROFILE_H263_H320CODING,
MMAL_VIDEO_PROFILE_H263_BACKWARDCOMPATIBLE,
MMAL_VIDEO_PROFILE_H263_ISWV2,
MMAL_VIDEO_PROFILE_H263_ISWV3,
MMAL_VIDEO_PROFILE_H263_HIGHCOMPRESSION,
MMAL_VIDEO_PROFILE_H263_INTERNET,
MMAL_VIDEO_PROFILE_H263_INTERLACE,
MMAL_VIDEO_PROFILE_H263_HIGHLATENCY,
MMAL_VIDEO_PROFILE_MP4V_SIMPLE,
MMAL_VIDEO_PROFILE_MP4V_SIMPLESCALABLE,
MMAL_VIDEO_PROFILE_MP4V_CORE,
MMAL_VIDEO_PROFILE_MP4V_MAIN,
MMAL_VIDEO_PROFILE_MP4V_NBIT,
MMAL_VIDEO_PROFILE_MP4V_SCALABLETEXTURE,
MMAL_VIDEO_PROFILE_MP4V_SIMPLEFACE,
MMAL_VIDEO_PROFILE_MP4V_SIMPLEFBA,
MMAL_VIDEO_PROFILE_MP4V_BASICANIMATED,
MMAL_VIDEO_PROFILE_MP4V_HYBRID,
MMAL_VIDEO_PROFILE_MP4V_ADVANCEDREALTIME,
MMAL_VIDEO_PROFILE_MP4V_CORESCALABLE,
MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCODING,
MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCORE,
MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSCALABLE,
MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSIMPLE,
MMAL_VIDEO_PROFILE_H264_BASELINE,
MMAL_VIDEO_PROFILE_H264_MAIN,
MMAL_VIDEO_PROFILE_H264_EXTENDED,
MMAL_VIDEO_PROFILE_H264_HIGH,
MMAL_VIDEO_PROFILE_H264_HIGH10,
MMAL_VIDEO_PROFILE_H264_HIGH422,
MMAL_VIDEO_PROFILE_H264_HIGH444,
MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE,
MMAL_VIDEO_PROFILE_DUMMY = 0x7FFFFFFF
};
enum mmal_video_level {
MMAL_VIDEO_LEVEL_H263_10,
MMAL_VIDEO_LEVEL_H263_20,
MMAL_VIDEO_LEVEL_H263_30,
MMAL_VIDEO_LEVEL_H263_40,
MMAL_VIDEO_LEVEL_H263_45,
MMAL_VIDEO_LEVEL_H263_50,
MMAL_VIDEO_LEVEL_H263_60,
MMAL_VIDEO_LEVEL_H263_70,
MMAL_VIDEO_LEVEL_MP4V_0,
MMAL_VIDEO_LEVEL_MP4V_0b,
MMAL_VIDEO_LEVEL_MP4V_1,
MMAL_VIDEO_LEVEL_MP4V_2,
MMAL_VIDEO_LEVEL_MP4V_3,
MMAL_VIDEO_LEVEL_MP4V_4,
MMAL_VIDEO_LEVEL_MP4V_4a,
MMAL_VIDEO_LEVEL_MP4V_5,
MMAL_VIDEO_LEVEL_MP4V_6,
MMAL_VIDEO_LEVEL_H264_1,
MMAL_VIDEO_LEVEL_H264_1b,
MMAL_VIDEO_LEVEL_H264_11,
MMAL_VIDEO_LEVEL_H264_12,
MMAL_VIDEO_LEVEL_H264_13,
MMAL_VIDEO_LEVEL_H264_2,
MMAL_VIDEO_LEVEL_H264_21,
MMAL_VIDEO_LEVEL_H264_22,
MMAL_VIDEO_LEVEL_H264_3,
MMAL_VIDEO_LEVEL_H264_31,
MMAL_VIDEO_LEVEL_H264_32,
MMAL_VIDEO_LEVEL_H264_4,
MMAL_VIDEO_LEVEL_H264_41,
MMAL_VIDEO_LEVEL_H264_42,
MMAL_VIDEO_LEVEL_H264_5,
MMAL_VIDEO_LEVEL_H264_51,
MMAL_VIDEO_LEVEL_DUMMY = 0x7FFFFFFF
};
struct mmal_parameter_video_profile {
enum mmal_video_profile profile;
enum mmal_video_level level;
};
/* video parameters */
enum mmal_parameter_video_type {
/** @ref MMAL_DISPLAYREGION_T */
MMAL_PARAMETER_DISPLAYREGION = MMAL_PARAMETER_GROUP_VIDEO,
/** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */
MMAL_PARAMETER_SUPPORTED_PROFILES,
/** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */
MMAL_PARAMETER_PROFILE,
/** @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_INTRAPERIOD,
/** @ref MMAL_PARAMETER_VIDEO_RATECONTROL_T */
MMAL_PARAMETER_RATECONTROL,
/** @ref MMAL_PARAMETER_VIDEO_NALUNITFORMAT_T */
MMAL_PARAMETER_NALUNITFORMAT,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_MINIMISE_FRAGMENTATION,
/** @ref MMAL_PARAMETER_UINT32_T.
* Setting the value to zero resets to the default (one slice per
* frame).
*/
MMAL_PARAMETER_MB_ROWS_PER_SLICE,
/** @ref MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION_T */
MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION,
/** @ref MMAL_PARAMETER_VIDEO_EEDE_ENABLE_T */
MMAL_PARAMETER_VIDEO_EEDE_ENABLE,
/** @ref MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE_T */
MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE,
/** @ref MMAL_PARAMETER_BOOLEAN_T. Request an I-frame. */
MMAL_PARAMETER_VIDEO_REQUEST_I_FRAME,
/** @ref MMAL_PARAMETER_VIDEO_INTRA_REFRESH_T */
MMAL_PARAMETER_VIDEO_INTRA_REFRESH,
/** @ref MMAL_PARAMETER_BOOLEAN_T. */
MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT,
/** @ref MMAL_PARAMETER_UINT32_T. Run-time bit rate control */
MMAL_PARAMETER_VIDEO_BIT_RATE,
/** @ref MMAL_PARAMETER_FRAME_RATE_T */
MMAL_PARAMETER_VIDEO_FRAME_RATE,
/** @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_MIN_QUANT,
/** @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_MAX_QUANT,
/** @ref MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL_T. */
MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL,
MMAL_PARAMETER_EXTRA_BUFFERS, /**< @ref MMAL_PARAMETER_UINT32_T. */
/** @ref MMAL_PARAMETER_UINT32_T.
* Changing this parameter from the default can reduce frame rate
* because image buffers need to be re-pitched.
*/
MMAL_PARAMETER_VIDEO_ALIGN_HORIZ,
/** @ref MMAL_PARAMETER_UINT32_T.
* Changing this parameter from the default can reduce frame rate
* because image buffers need to be re-pitched.
*/
MMAL_PARAMETER_VIDEO_ALIGN_VERT,
/** @ref MMAL_PARAMETER_BOOLEAN_T. */
MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAMES,
/** @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_INITIAL_QUANT,
/**< @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_QP_P,
/**< @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_RC_SLICE_DQUANT,
/** @ref MMAL_PARAMETER_UINT32_T */
MMAL_PARAMETER_VIDEO_ENCODE_FRAME_LIMIT_BITS,
/** @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_PEAK_RATE,
/* H264 specific parameters */
/** @ref MMAL_PARAMETER_BOOLEAN_T. */
MMAL_PARAMETER_VIDEO_ENCODE_H264_DISABLE_CABAC,
/** @ref MMAL_PARAMETER_BOOLEAN_T. */
MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_LATENCY,
/** @ref MMAL_PARAMETER_BOOLEAN_T. */
MMAL_PARAMETER_VIDEO_ENCODE_H264_AU_DELIMITERS,
/** @ref MMAL_PARAMETER_UINT32_T. */
MMAL_PARAMETER_VIDEO_ENCODE_H264_DEBLOCK_IDC,
/** @ref MMAL_PARAMETER_VIDEO_ENCODER_H264_MB_INTRA_MODES_T. */
MMAL_PARAMETER_VIDEO_ENCODE_H264_MB_INTRA_MODE,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_ENCODE_HEADER_ON_OPEN,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_ENCODE_PRECODE_FOR_QP,
/** @ref MMAL_PARAMETER_VIDEO_DRM_INIT_INFO_T. */
MMAL_PARAMETER_VIDEO_DRM_INIT_INFO,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_TIMESTAMP_FIFO,
/** @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_DECODE_ERROR_CONCEALMENT,
/** @ref MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER_T. */
MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER,
/** @ref MMAL_PARAMETER_BYTES_T */
MMAL_PARAMETER_VIDEO_DECODE_CONFIG_VD3,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_ENCODE_H264_VCL_HRD_PARAMETERS,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG,
/**< @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER
};
/** Valid mirror modes */
enum mmal_parameter_mirror {
MMAL_PARAM_MIRROR_NONE,
MMAL_PARAM_MIRROR_VERTICAL,
MMAL_PARAM_MIRROR_HORIZONTAL,
MMAL_PARAM_MIRROR_BOTH,
};
enum mmal_parameter_displaytransform {
MMAL_DISPLAY_ROT0 = 0,
MMAL_DISPLAY_MIRROR_ROT0 = 1,
MMAL_DISPLAY_MIRROR_ROT180 = 2,
MMAL_DISPLAY_ROT180 = 3,
MMAL_DISPLAY_MIRROR_ROT90 = 4,
MMAL_DISPLAY_ROT270 = 5,
MMAL_DISPLAY_ROT90 = 6,
MMAL_DISPLAY_MIRROR_ROT270 = 7,
};
enum mmal_parameter_displaymode {
MMAL_DISPLAY_MODE_FILL = 0,
MMAL_DISPLAY_MODE_LETTERBOX = 1,
};
enum mmal_parameter_displayset {
MMAL_DISPLAY_SET_NONE = 0,
MMAL_DISPLAY_SET_NUM = 1,
MMAL_DISPLAY_SET_FULLSCREEN = 2,
MMAL_DISPLAY_SET_TRANSFORM = 4,
MMAL_DISPLAY_SET_DEST_RECT = 8,
MMAL_DISPLAY_SET_SRC_RECT = 0x10,
MMAL_DISPLAY_SET_MODE = 0x20,
MMAL_DISPLAY_SET_PIXEL = 0x40,
MMAL_DISPLAY_SET_NOASPECT = 0x80,
MMAL_DISPLAY_SET_LAYER = 0x100,
MMAL_DISPLAY_SET_COPYPROTECT = 0x200,
MMAL_DISPLAY_SET_ALPHA = 0x400,
};
/* rectangle, used lots so it gets its own struct */
struct vchiq_mmal_rect {
s32 x;
s32 y;
s32 width;
s32 height;
};
struct mmal_parameter_displayregion {
/** Bitfield that indicates which fields are set and should be
* used. All other fields will maintain their current value.
* \ref MMAL_DISPLAYSET_T defines the bits that can be
* combined.
*/
u32 set;
/** Describes the display output device, with 0 typically
* being a directly connected LCD display. The actual values
* will depend on the hardware. Code using hard-wired numbers
* (e.g. 2) is certain to fail.
*/
u32 display_num;
/** Indicates that we are using the full device screen area,
* rather than a window of the display. If zero, then
* dest_rect is used to specify a region of the display to
* use.
*/
s32 fullscreen;
/** Indicates any rotation or flipping used to map frames onto
* the natural display orientation.
*/
u32 transform; /* enum mmal_parameter_displaytransform */
/** Where to display the frame within the screen, if
* fullscreen is zero.
*/
struct vchiq_mmal_rect dest_rect;
/** Indicates which area of the frame to display. If all
* values are zero, the whole frame will be used.
*/
struct vchiq_mmal_rect src_rect;
/** If set to non-zero, indicates that any display scaling
* should disregard the aspect ratio of the frame region being
* displayed.
*/
s32 noaspect;
/** Indicates how the image should be scaled to fit the
* display. \code MMAL_DISPLAY_MODE_FILL \endcode indicates
* that the image should fill the screen by potentially
* cropping the frames. Setting \code mode \endcode to \code
* MMAL_DISPLAY_MODE_LETTERBOX \endcode indicates that all the
* source region should be displayed and black bars added if
* necessary.
*/
u32 mode; /* enum mmal_parameter_displaymode */
/** If non-zero, defines the width of a source pixel relative
* to \code pixel_y \endcode. If zero, then pixels default to
* being square.
*/
u32 pixel_x;
/** If non-zero, defines the height of a source pixel relative
* to \code pixel_x \endcode. If zero, then pixels default to
* being square.
*/
u32 pixel_y;
/** Sets the relative depth of the images, with greater values
* being in front of smaller values.
*/
u32 layer;
/** Set to non-zero to ensure copy protection is used on
* output.
*/
s32 copyprotect_required;
/** Level of opacity of the layer, where zero is fully
* transparent and 255 is fully opaque.
*/
u32 alpha;
};
#define MMAL_MAX_IMAGEFX_PARAMETERS 5
struct mmal_parameter_imagefx_parameters {
enum mmal_parameter_imagefx effect;
u32 num_effect_params;
u32 effect_parameter[MMAL_MAX_IMAGEFX_PARAMETERS];
};
#define MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS 4
#define MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES 2
#define MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN 16
struct mmal_parameter_camera_info_camera {
u32 port_id;
u32 max_width;
u32 max_height;
u32 lens_present;
u8 camera_name[MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN];
};
enum mmal_parameter_camera_info_flash_type {
/* Make values explicit to ensure they match values in config ini */
MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_XENON = 0,
MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_LED = 1,
MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_OTHER = 2,
MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_MAX = 0x7FFFFFFF
};
struct mmal_parameter_camera_info_flash {
enum mmal_parameter_camera_info_flash_type flash_type;
};
struct mmal_parameter_camera_info {
u32 num_cameras;
u32 num_flashes;
struct mmal_parameter_camera_info_camera
cameras[MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS];
struct mmal_parameter_camera_info_flash
flashes[MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES];
};
#endif
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,162 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom BCM2835 V4L2 driver
*
* Copyright © 2013 Raspberry Pi (Trading) Ltd.
*
* Authors: Vincent Sanders @ Collabora
* Dave Stevenson @ Broadcom
* (now dave.stevenson@raspberrypi.org)
* Simon Mellor @ Broadcom
* Luke Diamand @ Broadcom
*
* MMAL interface to VCHIQ message passing
*/
#ifndef MMAL_VCHIQ_H
#define MMAL_VCHIQ_H
#include "mmal-common.h"
#include "mmal-msg-format.h"
#define MAX_PORT_COUNT 4
/* Maximum size of the format extradata. */
#define MMAL_FORMAT_EXTRADATA_MAX_SIZE 128
struct vchiq_mmal_instance;
struct device;
enum vchiq_mmal_es_type {
MMAL_ES_TYPE_UNKNOWN, /**< Unknown elementary stream type */
MMAL_ES_TYPE_CONTROL, /**< Elementary stream of control commands */
MMAL_ES_TYPE_AUDIO, /**< Audio elementary stream */
MMAL_ES_TYPE_VIDEO, /**< Video elementary stream */
MMAL_ES_TYPE_SUBPICTURE /**< Sub-picture elementary stream */
};
struct vchiq_mmal_port_buffer {
unsigned int num; /* number of buffers */
u32 size; /* size of buffers */
u32 alignment; /* alignment of buffers */
};
struct vchiq_mmal_port;
typedef void (*vchiq_mmal_buffer_cb)(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port,
int status, struct mmal_buffer *buffer);
struct vchiq_mmal_port {
bool enabled;
u32 handle;
u32 type; /* port type, cached to use on port info set */
u32 index; /* port index, cached to use on port info set */
/* component port belongs to, allows simple deref */
struct vchiq_mmal_component *component;
struct vchiq_mmal_port *connected; /* port connected to */
/* buffer info */
struct vchiq_mmal_port_buffer minimum_buffer;
struct vchiq_mmal_port_buffer recommended_buffer;
struct vchiq_mmal_port_buffer current_buffer;
/* stream format */
struct mmal_es_format_local format;
/* elementary stream format */
union mmal_es_specific_format es;
/* data buffers to fill */
struct list_head buffers;
/* lock to serialise adding and removing buffers from list */
spinlock_t slock;
/* Count of buffers the VPU has yet to return */
atomic_t buffers_with_vpu;
/* callback on buffer completion */
vchiq_mmal_buffer_cb buffer_cb;
/* callback context */
void *cb_ctx;
};
struct vchiq_mmal_component {
bool in_use;
bool enabled;
u32 handle; /* VideoCore handle for component */
u32 inputs; /* Number of input ports */
u32 outputs; /* Number of output ports */
u32 clocks; /* Number of clock ports */
struct vchiq_mmal_port control; /* control port */
struct vchiq_mmal_port input[MAX_PORT_COUNT]; /* input ports */
struct vchiq_mmal_port output[MAX_PORT_COUNT]; /* output ports */
struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */
u32 client_component; /* Used to ref back to client struct */
};
int vchiq_mmal_init(struct device *dev, struct vchiq_mmal_instance **out_instance);
int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance);
/* Initialise a mmal component and its ports
*
*/
int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance,
const char *name, struct vchiq_mmal_component **component_out);
int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_component *component);
int vchiq_mmal_component_enable(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_component *component);
int vchiq_mmal_component_disable(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_component *component);
/* enable a mmal port
*
* enables a port and, if a buffer callback provided, enqueues buffer
* headers as appropriate for the port.
*/
int vchiq_mmal_port_enable(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port,
vchiq_mmal_buffer_cb buffer_cb);
/* disable a port
*
* disable a port will dequeue any pending buffers
*/
int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port);
int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port,
u32 parameter,
void *value,
u32 value_size);
int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port,
u32 parameter,
void *value,
u32 *value_size);
int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port);
int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *src,
struct vchiq_mmal_port *dst);
int vchiq_mmal_version(struct vchiq_mmal_instance *instance,
u32 *major_out,
u32 *minor_out);
int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_port *port,
struct mmal_buffer *buf);
int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance,
struct mmal_buffer *buf);
int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf);
#endif /* MMAL_VCHIQ_H */