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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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linux-7.2.3/drivers/video/fbdev/sis/300vtbl.h
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linux-7.2.3/drivers/video/fbdev/sis/310vtbl.h
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linux-7.2.3/drivers/video/fbdev/sis/Makefile
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# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for the SiS framebuffer device driver
#
obj-$(CONFIG_FB_SIS) += sisfb.o
sisfb-objs := sis_main.o sis_accel.o init.o init301.o initextlfb.o
linux-7.2.3/drivers/video/fbdev/sis/init.c
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linux-7.2.3/drivers/video/fbdev/sis/init.h
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linux-7.2.3/drivers/video/fbdev/sis/init301.c
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linux-7.2.3/drivers/video/fbdev/sis/init301.h
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/* $XFree86$ */
/* $XdotOrg$ */
/*
* Data and prototypes for init301.c
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
#ifndef _INIT301_H_
#define _INIT301_H_
#include "initdef.h"
#include "vgatypes.h"
#include "vstruct.h"
#ifdef SIS_CP
#undef SIS_CP
#endif
#include <linux/types.h>
#include <asm/io.h>
#include <linux/fb.h>
#include "sis.h"
#include <video/sisfb.h>
void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
void SiS_EnableCRT2(struct SiS_Private *SiS_Pr);
unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
bool SiS_IsDualEdge(struct SiS_Private *SiS_Pr);
bool SiS_IsVAMode(struct SiS_Private *SiS_Pr);
void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex, int checkcrt2mode);
void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex);
unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex);
void SiS_DisableBridge(struct SiS_Private *SiS_Pr);
bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax);
void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
unsigned char orval,unsigned short andval);
#ifdef CONFIG_FB_SIS_315
void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
#endif /* 315 */
#ifdef CONFIG_FB_SIS_300
void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
#endif
void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
unsigned short adaptnum, unsigned short DDCdatatype,
unsigned char *buffer, unsigned int VBFlags2);
extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *);
extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
extern unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
extern unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex);
extern void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
#ifdef CONFIG_FB_SIS_300
extern void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *tempbx,
unsigned short *tempcl);
extern unsigned short SiS_GetFIFOThresholdB300(unsigned short tempbx, unsigned short tempcl);
extern unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
extern unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
#endif
#endif
linux-7.2.3/drivers/video/fbdev/sis/initdef.h
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/* $XFree86$ */
/* $XdotOrg$ */
/*
* Global definitions for init.c and init301.c
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
#ifndef _INITDEF_
#define _INITDEF_
#define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
#define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
#define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
#define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
#define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
#define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
#define IS_SIS660 (SiS_Pr->ChipType == SIS_660)
#define IS_SIS760 (SiS_Pr->ChipType == SIS_760)
#define IS_SIS761 (SiS_Pr->ChipType == SIS_761)
#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760 || IS_SIS761)
#define IS_SIS650740 ((SiS_Pr->ChipType >= SIS_650) && (SiS_Pr->ChipType < SIS_330))
#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
#define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8))
/* SiS_VBType */
#define VB_SIS301 0x0001
#define VB_SIS301B 0x0002
#define VB_SIS302B 0x0004
#define VB_SIS301LV 0x0008
#define VB_SIS302LV 0x0010
#define VB_SIS302ELV 0x0020
#define VB_SIS301C 0x0040
#define VB_SIS307T 0x0080
#define VB_SIS307LV 0x0100
#define VB_UMC 0x4000
#define VB_NoLCD 0x8000
#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SISLVDS (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SIS30xBLV (VB_SIS30xB | VB_SISLVDS)
#define VB_SIS30xCLV (VB_SIS30xC | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISVB (VB_SIS301 | VB_SIS30xBLV)
#define VB_SISLCDA (VB_SIS302B | VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISTMDSLCDA (VB_SIS301C | VB_SIS307T)
#define VB_SISPART4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISHIVISION (VB_SIS301 | VB_SIS301B | VB_SIS302B)
#define VB_SISYPBPR (VB_SIS301C | VB_SIS307T | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISTAP4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPART4OVERFLOW (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPWD (VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISEMI (VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPOWER (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISDUALLINK (VB_SIS302LV | VB_SIS302ELV | VB_SIS307T | VB_SIS307LV)
#define VB_SISVGA2 VB_SISTMDS
#define VB_SISRAMDAC202 (VB_SIS301C | VB_SIS307T)
/* VBInfo */
#define SetSimuScanMode 0x0001 /* CR 30 */
#define SwitchCRT2 0x0002
#define SetCRT2ToAVIDEO 0x0004
#define SetCRT2ToSVIDEO 0x0008
#define SetCRT2ToSCART 0x0010
#define SetCRT2ToLCD 0x0020
#define SetCRT2ToRAMDAC 0x0040
#define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
#define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
#define SetNTSCTV 0x0000 /* CR 31 */
#define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
#define SetInSlaveMode 0x0200
#define SetNotSimuMode 0x0400
#define SetNotSimuTVMode SetNotSimuMode
#define SetDispDevSwitch 0x0800
#define SetCRT2ToYPbPr525750 0x0800
#define LoadDACFlag 0x1000
#define DisableCRT2Display 0x2000
#define DriverMode 0x4000
#define HotKeySwitch 0x8000
#define SetCRT2ToLCDA 0x8000
/* v-- Needs change in sis_vga.c if changed (GPIO) --v */
#define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)
#define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
#define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
/* SiS_ModeType */
#define ModeText 0x00
#define ModeCGA 0x01
#define ModeEGA 0x02
#define ModeVGA 0x03
#define Mode15Bpp 0x04
#define Mode16Bpp 0x05
#define Mode24Bpp 0x06
#define Mode32Bpp 0x07
#define ModeTypeMask 0x07
#define IsTextMode 0x07
#define DACInfoFlag 0x0018
#define MemoryInfoFlag 0x01E0
#define MemorySizeShift 5
/* modeflag */
#define Charx8Dot 0x0200
#define LineCompareOff 0x0400
#define CRT2Mode 0x0800
#define HalfDCLK 0x1000
#define NoSupportSimuTV 0x2000
#define NoSupportLCDScale 0x4000 /* SiS bridge: No scaling possible (no matter what panel) */
#define DoubleScanMode 0x8000
/* Infoflag */
#define SupportTV 0x0008
#define SupportTV1024 0x0800
#define SupportCHTV 0x0800
#define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
#define SupportHiVision 0x0010
#define SupportYPbPr750p 0x1000
#define SupportLCD 0x0020
#define SupportRAMDAC2 0x0040 /* All (<= 100Mhz) */
#define SupportRAMDAC2_135 0x0100 /* All except DH (<= 135Mhz) */
#define SupportRAMDAC2_162 0x0200 /* B, C (<= 162Mhz) */
#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
#define InterlaceMode 0x0080
#define SyncPP 0x0000
#define HaveWideTiming 0x2000 /* Have specific wide- and non-wide timing */
#define SyncPN 0x4000
#define SyncNP 0x8000
#define SyncNN 0xc000
/* SetFlag */
#define ProgrammingCRT2 0x0001
#define LowModeTests 0x0002
/* #define TVSimuMode 0x0002 - deprecated */
/* #define RPLLDIV2XO 0x0004 - deprecated */
#define LCDVESATiming 0x0008
#define EnableLVDSDDA 0x0010
#define SetDispDevSwitchFlag 0x0020
#define CheckWinDos 0x0040
#define SetDOSMode 0x0080
/* TVMode flag */
#define TVSetPAL 0x0001
#define TVSetNTSCJ 0x0002
#define TVSetPALM 0x0004
#define TVSetPALN 0x0008
#define TVSetCHOverScan 0x0010
#define TVSetYPbPr525i 0x0020 /* new 0x10 */
#define TVSetYPbPr525p 0x0040 /* new 0x20 */
#define TVSetYPbPr750p 0x0080 /* new 0x40 */
#define TVSetHiVision 0x0100 /* new 0x80; = 1080i, software-wise identical */
#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
#define TVSet525p1024 0x1000 /* TW */
#define TVAspect43 0x2000
#define TVAspect169 0x4000
#define TVAspect43LB 0x8000
/* YPbPr flag (>=315, <661; converted to TVMode) */
#define YPbPr525p 0x0001
#define YPbPr750p 0x0002
#define YPbPr525i 0x0004
#define YPbPrHiVision 0x0008
#define YPbPrModeMask (YPbPr750p | YPbPr525p | YPbPr525i | YPbPrHiVision)
/* SysFlags (to identify special versions) */
#define SF_Is651 0x0001
#define SF_IsM650 0x0002
#define SF_Is652 0x0004
#define SF_IsM652 0x0008
#define SF_IsM653 0x0010
#define SF_IsM661 0x0020
#define SF_IsM741 0x0040
#define SF_IsM760 0x0080
#define SF_760UMA 0x4000 /* 76x: We have UMA */
#define SF_760LFB 0x8000 /* 76x: We have LFB */
/* CR32 (Newer 630, and 315 series)
[0] VB connected with CVBS
[1] VB connected with SVHS
[2] VB connected with SCART
[3] VB connected with LCD
[4] VB connected with CRT2 (secondary VGA)
[5] CRT1 monitor is connected
[6] VB connected with Hi-Vision TV
[7] <= 330: VB connected with DVI combo connector
>= 661: VB connected to YPbPr
*/
/* CR35 (300 series only) */
#define TVOverScan 0x10
#define TVOverScanShift 4
/* CR35 (661 series only)
[0] 1 = PAL, 0 = NTSC
[1] 1 = NTSC-J (if D0 = 0)
[2] 1 = PALM (if D0 = 1)
[3] 1 = PALN (if D0 = 1)
[4] 1 = Overscan (Chrontel only)
[7:5] (only if D2 in CR38 is set)
000 525i
001 525p
010 750p
011 1080i (or HiVision on 301, 301B)
*/
/* CR37
[0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
[3:1] External chip
300 series:
001 SiS301 (never seen)
010 LVDS
011 LVDS + Tumpion Zurac
100 LVDS + Chrontel 7005
110 Chrontel 7005
315/330 series
001 SiS30x (never seen)
010 LVDS
011 LVDS + Chrontel 7019
660 series [2:1] only:
reserved (chip type now in CR38)
All other combinations reserved
[3] 661 only: Pass 1:1 data
[4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
30x: 0: Bridge scales / 1: Bridge does not scale = Panel scales (if possible)
[5] LCD polarity select
0: VESA DMT Standard
1: EDID 2.x defined
[6] LCD horizontal polarity select
0: High active
1: Low active
[7] LCD vertical polarity select
0: High active
1: Low active
*/
/* CR37: LCDInfo */
#define LCDRGB18Bit 0x0001
#define LCDNonExpanding 0x0010
#define LCDSync 0x0020
#define LCDPass11 0x0100 /* 0: center screen, 1: Pass 1:1 data */
#define LCDDualLink 0x0200
#define DontExpandLCD LCDNonExpanding
#define LCDNonExpandingShift 4
#define DontExpandLCDShift LCDNonExpandingShift
#define LCDSyncBit 0x00e0
#define LCDSyncShift 6
/* CR38 (315 series) */
#define EnableDualEdge 0x01
#define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
#define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
#define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */
#define EnableSiSYPbPr 0x08 /* Enable YPbPr mode (30xLV/301C only) */
#define EnableYPbPr525i 0x00 /* Enable 525i YPbPr mode (30xLV/301C only) (mask 0x30) */
#define EnableYPbPr525p 0x10 /* Enable 525p YPbPr mode (30xLV/301C only) (mask 0x30) */
#define EnableYPbPr750p 0x20 /* Enable 750p YPbPr mode (30xLV/301C only) (mask 0x30) */
#define EnableYPbPr1080i 0x30 /* Enable 1080i YPbPr mode (30xLV/301C only) (mask 0x30) */
#define EnablePALM 0x40 /* 1 = Set PALM */
#define EnablePALN 0x80 /* 1 = Set PALN */
#define EnableNTSCJ EnablePALM /* Not BIOS */
/* CR38 (661 and later)
D[7:5] 000 No VB
001 301 series VB
010 LVDS
011 Chrontel 7019
100 Conexant
D2 Enable YPbPr output (see CR35)
D[1:0] LCDA (like before)
*/
#define EnablePALMN 0x40 /* Romflag: 1 = Allow PALM/PALN */
/* CR39 (650 only) */
#define LCDPass1_1 0x01 /* 0: center screen, 1: pass 1:1 data output */
#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
/* CR39 (661 and later)
D[7] LVDS (SiS or third party)
D[1:0] YPbPr Aspect Ratio
00 4:3 letterbox
01 4:3
10 16:9
11 4:3
*/
/* CR3B (651+301C)
D[1:0] YPbPr Aspect Ratio
?
*/
/* CR79 (315/330 series only; not 661 and later)
[3-0] Notify driver
0001 Mode Switch event (set by BIOS)
0010 Epansion On/Off event
0011 TV UnderScan/OverScan event
0100 Set Brightness event
0101 Set Contrast event
0110 Set Mute event
0111 Set Volume Up/Down event
[4] Enable Backlight Control by BIOS/driver
(set by driver; set means that the BIOS should
not touch the backlight registers because eg.
the driver already switched off the backlight)
[5] PAL/NTSC (set by BIOS)
[6] Expansion On/Off (set by BIOS; copied to CR32[4])
[7] TV UnderScan/OverScan (set by BIOS)
*/
/* CR7C - 661 and later
[7] DualEdge enabled (or: to be enabled)
[6] CRT2 = TV/LCD/VGA enabled (or: to be enabled)
[5] Init done (set at end of SiS_Init)
{4] LVDS LCD capabilities
[3] LVDS LCD capabilities
[2] LVDS LCD capabilities (PWD)
[1] LVDS LCD capabilities (PWD)
[0] LVDS=1, TMDS=0 (SiS or third party)
*/
/* CR7E - 661 and later
VBType:
[7] LVDS (third party)
[3] 301C
[2] 302LV
[1] 301LV
[0] 301B
*/
/* LCDResInfo */
#define Panel300_800x600 0x01 /* CR36 */
#define Panel300_1024x768 0x02
#define Panel300_1280x1024 0x03
#define Panel300_1280x960 0x04
#define Panel300_640x480 0x05
#define Panel300_1024x600 0x06
#define Panel300_1152x768 0x07
#define Panel300_1280x768 0x0a
#define Panel300_Custom 0x0f
#define Panel300_Barco1366 0x10
#define Panel310_800x600 0x01
#define Panel310_1024x768 0x02
#define Panel310_1280x1024 0x03
#define Panel310_640x480 0x04
#define Panel310_1024x600 0x05
#define Panel310_1152x864 0x06
#define Panel310_1280x960 0x07
#define Panel310_1152x768 0x08 /* LVDS only */
#define Panel310_1400x1050 0x09
#define Panel310_1280x768 0x0a
#define Panel310_1600x1200 0x0b
#define Panel310_320x240_2 0x0c /* xSTN */
#define Panel310_320x240_3 0x0d /* xSTN */
#define Panel310_320x240_1 0x0e /* xSTN - This is fake, can be any */
#define Panel310_Custom 0x0f
#define Panel661_800x600 0x01
#define Panel661_1024x768 0x02
#define Panel661_1280x1024 0x03
#define Panel661_640x480 0x04
#define Panel661_1024x600 0x05
#define Panel661_1152x864 0x06
#define Panel661_1280x960 0x07
#define Panel661_1280x854 0x08
#define Panel661_1400x1050 0x09
#define Panel661_1280x768 0x0a
#define Panel661_1600x1200 0x0b
#define Panel661_1280x800 0x0c
#define Panel661_1680x1050 0x0d
#define Panel661_1280x720 0x0e
#define Panel661_Custom 0x0f
#define Panel_800x600 0x01 /* Unified values */
#define Panel_1024x768 0x02 /* MUST match BIOS values from 0-e */
#define Panel_1280x1024 0x03
#define Panel_640x480 0x04
#define Panel_1024x600 0x05
#define Panel_1152x864 0x06
#define Panel_1280x960 0x07
#define Panel_1152x768 0x08 /* LVDS only */
#define Panel_1400x1050 0x09
#define Panel_1280x768 0x0a /* 30xB/C and LVDS only (BIOS: all) */
#define Panel_1600x1200 0x0b
#define Panel_1280x800 0x0c /* 661etc (TMDS) */
#define Panel_1680x1050 0x0d /* 661etc */
#define Panel_1280x720 0x0e /* 661etc */
#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
#define Panel_320x240_1 0x10 /* SiS 550 xSTN */
#define Panel_Barco1366 0x11
#define Panel_848x480 0x12
#define Panel_320x240_2 0x13 /* SiS 550 xSTN */
#define Panel_320x240_3 0x14 /* SiS 550 xSTN */
#define Panel_1280x768_2 0x15 /* 30xLV */
#define Panel_1280x768_3 0x16 /* (unused) */
#define Panel_1280x800_2 0x17 /* 30xLV */
#define Panel_856x480 0x18
#define Panel_1280x854 0x19 /* 661etc */
/* Index in ModeResInfo table */
#define SIS_RI_320x200 0
#define SIS_RI_320x240 1
#define SIS_RI_320x400 2
#define SIS_RI_400x300 3
#define SIS_RI_512x384 4
#define SIS_RI_640x400 5
#define SIS_RI_640x480 6
#define SIS_RI_800x600 7
#define SIS_RI_1024x768 8
#define SIS_RI_1280x1024 9
#define SIS_RI_1600x1200 10
#define SIS_RI_1920x1440 11
#define SIS_RI_2048x1536 12
#define SIS_RI_720x480 13
#define SIS_RI_720x576 14
#define SIS_RI_1280x960 15
#define SIS_RI_800x480 16
#define SIS_RI_1024x576 17
#define SIS_RI_1280x720 18
#define SIS_RI_856x480 19
#define SIS_RI_1280x768 20
#define SIS_RI_1400x1050 21
#define SIS_RI_1152x864 22 /* Up to here SiS conforming */
#define SIS_RI_848x480 23
#define SIS_RI_1360x768 24
#define SIS_RI_1024x600 25
#define SIS_RI_1152x768 26
#define SIS_RI_768x576 27
#define SIS_RI_1360x1024 28
#define SIS_RI_1680x1050 29
#define SIS_RI_1280x800 30
#define SIS_RI_1920x1080 31
#define SIS_RI_960x540 32
#define SIS_RI_960x600 33
#define SIS_RI_1280x854 34
/* CR5F */
#define IsM650 0x80
/* Timing data */
#define NTSCHT 1716
#define NTSC2HT 1920
#define NTSCVT 525
#define PALHT 1728
#define PALVT 625
#define StHiTVHT 892
#define StHiTVVT 1126
#define StHiTextTVHT 1000
#define StHiTextTVVT 1126
#define ExtHiTVHT 2100
#define ExtHiTVVT 1125
/* Indices in (VB)VCLKData tables */
#define VCLK28 0x00 /* Index in VCLKData table (300 and 315) */
#define VCLK40 0x04 /* Index in VCLKData table (300 and 315) */
#define VCLK65_300 0x09 /* Index in VCLKData table (300) */
#define VCLK108_2_300 0x14 /* Index in VCLKData table (300) */
#define VCLK81_300 0x3f /* Index in VCLKData table (300) */
#define VCLK108_3_300 0x42 /* Index in VCLKData table (300) */
#define VCLK100_300 0x43 /* Index in VCLKData table (300) */
#define VCLK34_300 0x3d /* Index in VCLKData table (300) */
#define VCLK_CUSTOM_300 0x47
#define VCLK65_315 0x0b /* Indices in (VB)VCLKData table (315) */
#define VCLK108_2_315 0x19
#define VCLK81_315 0x5b
#define VCLK162_315 0x5e
#define VCLK108_3_315 0x45
#define VCLK100_315 0x46
#define VCLK34_315 0x55
#define VCLK68_315 0x0d
#define VCLK_1280x800_315_2 0x5c
#define VCLK121_315 0x5d
#define VCLK130_315 0x72
#define VCLK_1280x720 0x5f
#define VCLK_1280x768_2 0x60
#define VCLK_1280x768_3 0x61 /* (unused?) */
#define VCLK_CUSTOM_315 0x62
#define VCLK_1280x720_2 0x63
#define VCLK_720x480 0x67
#define VCLK_720x576 0x68
#define VCLK_768x576 0x68
#define VCLK_848x480 0x65
#define VCLK_856x480 0x66
#define VCLK_800x480 0x65
#define VCLK_1024x576 0x51
#define VCLK_1152x864 0x64
#define VCLK_1360x768 0x58
#define VCLK_1280x800_315 0x6c
#define VCLK_1280x854 0x76
#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */
#define TVVCLKDIV2 0x00 /* Index relative to TVCLKBASE */
#define TVVCLK 0x01 /* Index relative to TVCLKBASE */
#define HiTVVCLKDIV2 0x02 /* Index relative to TVCLKBASE */
#define HiTVVCLK 0x03 /* Index relative to TVCLKBASE */
#define HiTVSimuVCLK 0x04 /* Index relative to TVCLKBASE */
#define HiTVTextVCLK 0x05 /* Index relative to TVCLKBASE */
#define YPbPr750pVCLK 0x25 /* Index relative to TVCLKBASE; was 0x0f NOT relative */
/* ------------------------------ */
#define SetSCARTOutput 0x01
#define HotPlugFunction 0x08
#define StStructSize 0x06
#define SIS_VIDEO_CAPTURE 0x00 - 0x30
#define SIS_VIDEO_PLAYBACK 0x02 - 0x30
#define SIS_CRT2_PORT_04 0x04 - 0x30
#define SIS_CRT2_PORT_10 0x10 - 0x30
#define SIS_CRT2_PORT_12 0x12 - 0x30
#define SIS_CRT2_PORT_14 0x14 - 0x30
#define ADR_CRT2PtrData 0x20E
#define offset_Zurac 0x210 /* TW: Trumpion Zurac data pointer */
#define ADR_LVDSDesPtrData 0x212
#define ADR_LVDSCRT1DataPtr 0x214
#define ADR_CHTVVCLKPtr 0x216
#define ADR_CHTVRegDataPtr 0x218
#define LCDDataLen 8
#define HiTVDataLen 12
#define TVDataLen 16
#define LVDSDataLen 6
#define LVDSDesDataLen 3
#define ActiveNonExpanding 0x40
#define ActiveNonExpandingShift 6
#define ActivePAL 0x20
#define ActivePALShift 5
#define ModeSwitchStatus 0x0F
#define SoftTVType 0x40
#define SoftSettingAddr 0x52
#define ModeSettingAddr 0x53
#define _PanelType00 0x00
#define _PanelType01 0x08
#define _PanelType02 0x10
#define _PanelType03 0x18
#define _PanelType04 0x20
#define _PanelType05 0x28
#define _PanelType06 0x30
#define _PanelType07 0x38
#define _PanelType08 0x40
#define _PanelType09 0x48
#define _PanelType0A 0x50
#define _PanelType0B 0x58
#define _PanelType0C 0x60
#define _PanelType0D 0x68
#define _PanelType0E 0x70
#define _PanelType0F 0x78
#define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
#define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */
#define OEMUtilIDCodeAddr 0x237
#define VBModeIDTableAddr 0x239
#define OEMTVPtrAddr 0x241
#define PhaseTableAddr 0x243
#define NTSCFilterTableAddr 0x245
#define PALFilterTableAddr 0x247
#define OEMLCDPtr_1Addr 0x249
#define OEMLCDPtr_2Addr 0x24B
#define LCDHPosTable_1Addr 0x24D
#define LCDHPosTable_2Addr 0x24F
#define LCDVPosTable_1Addr 0x251
#define LCDVPosTable_2Addr 0x253
#define OEMLCDPIDTableAddr 0x255
#define VBModeStructSize 5
#define PhaseTableSize 4
#define FilterTableSize 4
#define LCDHPosTableSize 7
#define LCDVPosTableSize 5
#define OEMLVDSPIDTableSize 4
#define LVDSHPosTableSize 4
#define LVDSVPosTableSize 6
#define VB_ModeID 0
#define VB_TVTableIndex 1
#define VB_LCDTableIndex 2
#define VB_LCDHIndex 3
#define VB_LCDVIndex 4
#define OEMLCDEnable 0x0001
#define OEMLCDDelayEnable 0x0002
#define OEMLCDPOSEnable 0x0004
#define OEMTVEnable 0x0100
#define OEMTVDelayEnable 0x0200
#define OEMTVFlickerEnable 0x0400
#define OEMTVPhaseEnable 0x0800
#define OEMTVFilterEnable 0x1000
#define OEMLCDPanelIDSupport 0x0080
/*
=============================================================
for 315 series (old data layout)
=============================================================
*/
#define SoftDRAMType 0x80
#define SoftSetting_OFFSET 0x52
#define SR07_OFFSET 0x7C
#define SR15_OFFSET 0x7D
#define SR16_OFFSET 0x81
#define SR17_OFFSET 0x85
#define SR19_OFFSET 0x8D
#define SR1F_OFFSET 0x99
#define SR21_OFFSET 0x9A
#define SR22_OFFSET 0x9B
#define SR23_OFFSET 0x9C
#define SR24_OFFSET 0x9D
#define SR25_OFFSET 0x9E
#define SR31_OFFSET 0x9F
#define SR32_OFFSET 0xA0
#define SR33_OFFSET 0xA1
#define CR40_OFFSET 0xA2
#define SR25_1_OFFSET 0xF6
#define CR49_OFFSET 0xF7
#define VB310Data_1_2_Offset 0xB6
#define VB310Data_4_D_Offset 0xB7
#define VB310Data_4_E_Offset 0xB8
#define VB310Data_4_10_Offset 0xBB
#define RGBSenseDataOffset 0xBD
#define YCSenseDataOffset 0xBF
#define VideoSenseDataOffset 0xC1
#define OutputSelectOffset 0xF3
#define ECLK_MCLK_DISTANCE 0x14
#define VBIOSTablePointerStart 0x100
#define StandTablePtrOffset VBIOSTablePointerStart+0x02
#define EModeIDTablePtrOffset VBIOSTablePointerStart+0x04
#define CRT1TablePtrOffset VBIOSTablePointerStart+0x06
#define ScreenOffsetPtrOffset VBIOSTablePointerStart+0x08
#define VCLKDataPtrOffset VBIOSTablePointerStart+0x0A
#define MCLKDataPtrOffset VBIOSTablePointerStart+0x0E
#define CRT2PtrDataPtrOffset VBIOSTablePointerStart+0x10
#define TVAntiFlickPtrOffset VBIOSTablePointerStart+0x12
#define TVDelayPtr1Offset VBIOSTablePointerStart+0x14
#define TVPhaseIncrPtr1Offset VBIOSTablePointerStart+0x16
#define TVYFilterPtr1Offset VBIOSTablePointerStart+0x18
#define LCDDelayPtr1Offset VBIOSTablePointerStart+0x20
#define TVEdgePtr1Offset VBIOSTablePointerStart+0x24
#define CRT2Delay1Offset VBIOSTablePointerStart+0x28
#endif
linux-7.2.3/drivers/video/fbdev/sis/initextlfb.c
+218
View File
@@ -0,0 +1,218 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* SiS 300/540/630[S]/730[S]
* SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX]
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* Linux kernel specific extensions to init.c/init301.c
*
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*/
#include "initdef.h"
#include "vgatypes.h"
#include "vstruct.h"
#include <linux/types.h>
#include <linux/fb.h>
int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
unsigned char modeno, unsigned char rateindex);
int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var);
bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
int *htotal, int *vtotal, unsigned char rateindex);
extern bool SiSInitPtr(struct SiS_Private *SiS_Pr);
extern bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
unsigned short *ModeIdIndex);
extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
int xres, int yres, struct fb_var_screeninfo *var, bool writeres);
int
sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, ClockIndex = 0;
unsigned short RRTI = 0;
int Clock;
if(!SiSInitPtr(SiS_Pr)) return 65000;
if(rateindex > 0) rateindex--;
#ifdef CONFIG_FB_SIS_315
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {
printk(KERN_ERR "Could not find mode %x\n", ModeNo);
return 65000;
}
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_WIDE;
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_NORM;
}
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK;
}
Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
return Clock;
}
int
sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, index = 0, RRTI = 0;
int j;
if(!SiSInitPtr(SiS_Pr)) return 0;
if(rateindex > 0) rateindex--;
#ifdef CONFIG_FB_SIS_315
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
SiS_Generic_ConvertCRData(SiS_Pr,
(unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
SiS_Pr->SiS_RefIndex[RRTI].XRes,
SiS_Pr->SiS_RefIndex[RRTI].YRes,
var, false);
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000)
var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
else
var->sync |= FB_SYNC_VERT_HIGH_ACT;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x4000)
var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
else
var->sync |= FB_SYNC_HOR_HIGH_ACT;
var->vmode = FB_VMODE_NONINTERLACED;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x0080)
var->vmode = FB_VMODE_INTERLACED;
else {
j = 0;
while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
SiS_Pr->SiS_RefIndex[RRTI].ModeID) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
var->vmode = FB_VMODE_DOUBLE;
}
break;
}
j++;
}
}
if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
#if 0 /* Do this? */
var->upper_margin <<= 1;
var->lower_margin <<= 1;
var->vsync_len <<= 1;
#endif
} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
var->upper_margin >>= 1;
var->lower_margin >>= 1;
var->vsync_len >>= 1;
}
return 1;
}
bool
sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal,
int *vtotal, unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, CRT1Index = 0;
unsigned short RRTI = 0;
unsigned char sr_data, cr_data, cr_data2;
if(!SiSInitPtr(SiS_Pr)) return false;
if(rateindex > 0) rateindex--;
#ifdef CONFIG_FB_SIS_315
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
*htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
*vtotal = ((cr_data & 0xFF) |
((unsigned short)(cr_data2 & 0x01) << 8) |
((unsigned short)(cr_data2 & 0x20) << 4) |
((unsigned short)(sr_data & 0x01) << 10)) + 2;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode)
*vtotal *= 2;
return true;
}
linux-7.2.3/drivers/video/fbdev/sis/oem300.h
+840
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@@ -0,0 +1,840 @@
/* $XFree86$ */
/* $XdotOrg$ */
/*
* OEM Data for 300 series
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
static const unsigned char SiS300_OEMTVDelay301[8][4] =
{
{0x08,0x08,0x08,0x08},
{0x08,0x08,0x08,0x08},
{0x08,0x08,0x08,0x08},
{0x2c,0x2c,0x2c,0x2c},
{0x08,0x08,0x08,0x08},
{0x08,0x08,0x08,0x08},
{0x08,0x08,0x08,0x08},
{0x20,0x20,0x20,0x20}
};
static const unsigned char SiS300_OEMTVDelayLVDS[8][4] =
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20}
};
static const unsigned char SiS300_OEMTVFlicker[8][4] =
{
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00},
{0x00,0x00,0x00,0x00}
};
static const unsigned char SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302LV */
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20}
};
static const unsigned char SiS300_OEMLCDDelay4[12][4] =
{
{0x2c,0x2c,0x2c,0x2c},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x2c,0x2c,0x2c,0x2c},
{0x2c,0x2c,0x2c,0x2c},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x24,0x24,0x24,0x24},
{0x24,0x24,0x24,0x24},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x24,0x24,0x24,0x24}
};
static const unsigned char SiS300_OEMLCDDelay5[32][4] =
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
};
static const unsigned char SiS300_OEMLCDDelay3[64][4] = /* For LVDS */
{
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20},
{0x20,0x20,0x20,0x20}
};
static const unsigned char SiS300_Phase1[8][5][4] =
{
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
};
static const unsigned char SiS300_Phase2[8][5][4] =
{
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x21,0xed,0x00,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08},
{0x21,0xed,0x8a,0x08}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
};
static const unsigned char SiS300_Filter1[10][16][4] =
{
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x10,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xfc,0xfb,0x14,0x2a},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32},
{0xf1,0xf7,0x1f,0x32}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18}
},
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18}
},
};
static const unsigned char SiS300_Filter2[10][9][7] =
{
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
}
};
/* Custom data for Barco iQ Pro R300 */
static const unsigned char barco_p1[2][9][7][3] =
{
{
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x1e, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x16, 0x00 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xa0, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
},
{
{ 0x16, 0x00, 0x00 },
{ 0x17, 0xaa, 0x00 },
{ 0x1a, 0xa0, 0x00 },
{ 0x1b, 0x2a, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0, 0, 0 }
}
},
{
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 }
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x19, 0x00 },
},
{
{ 0, 0, 0 }
},
{
{ 0x16, 0xcf, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe7, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x1e, 0x00 }
},
{
{ 0x16, 0xd1, 0x00 },
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe6, 0x00 },
{ 0x1b, 0x11, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x26, 0x00 }
},
{
{ 0x18, 0x00, 0x00 },
{ 0x1a, 0xe0, 0x00 },
{ 0x1b, 0x26, 0x00 },
{ 0x1c, 0xff, 0x00 },
{ 0x1d, 0x1c, 0x00 },
{ 0x1e, 0x30, 0x00 },
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
},
{
{ 0, 0, 0 }
}
}
};
linux-7.2.3/drivers/video/fbdev/sis/oem310.h
+432
View File
@@ -0,0 +1,432 @@
/* $XFree86$ */
/* $XdotOrg$ */
/*
* OEM Data for 315/330/340 series
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
static const unsigned char SiS310_LCDDelayCompensation_301[] = /* 301 */
{
0x00,0x00,0x00, /* 800x600 */
0x0b,0x0b,0x0b, /* 1024x768 */
0x08,0x08,0x08, /* 1280x1024 */
0x00,0x00,0x00, /* 640x480 (unknown) */
0x00,0x00,0x00, /* 1024x600 (unknown) */
0x00,0x00,0x00, /* 1152x864 (unknown) */
0x08,0x08,0x08, /* 1280x960 (guessed) */
0x00,0x00,0x00, /* 1152x768 (unknown) */
0x08,0x08,0x08, /* 1400x1050 */
0x08,0x08,0x08, /* 1280x768 (guessed) */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00, /* 320x480 (unknown) */
0x00,0x00,0x00,
0x00,0x00,0x00,
0x00,0x00,0x00
};
/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */
static const unsigned char SiS310_LCDDelayCompensation_650301LV[] = /* 650 + 30xLV */
{
0x01,0x01,0x01, /* 800x600 */
0x01,0x01,0x01, /* 1024x768 */
0x01,0x01,0x01, /* 1280x1024 */
0x01,0x01,0x01, /* 640x480 (unknown) */
0x01,0x01,0x01, /* 1024x600 (unknown) */
0x01,0x01,0x01, /* 1152x864 (unknown) */
0x01,0x01,0x01, /* 1280x960 (guessed) */
0x01,0x01,0x01, /* 1152x768 (unknown) */
0x01,0x01,0x01, /* 1400x1050 */
0x01,0x01,0x01, /* 1280x768 (guessed) */
0x01,0x01,0x01, /* 1600x1200 */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const unsigned char SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */
{
0x33,0x33,0x33, /* 800x600 (guessed) - new: PanelType, not PanelRes ! */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
static const unsigned char SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */
{
0x33,0x33,0x33, /* 800x600 (guessed) */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
static const unsigned char SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB */
{
0x01,0x01,0x01, /* 800x600 */
0x0C,0x0C,0x0C, /* 1024x768 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const unsigned char SiS310_LCDDelayCompensation_3xx301LV[] = /* 315+30xLV */
{
0x01,0x01,0x01, /* 800x600 */
0x04,0x04,0x04, /* 1024x768 (A531/BIOS 1.14.05f: 4 - works with 6 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
static const unsigned char SiS310_TVDelayCompensation_301[] = /* 301 */
{
0x02,0x02, /* NTSC Enhanced, Standard */
0x02,0x02, /* PAL */
0x08,0x0b /* HiVision */
};
static const unsigned char SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */
{
0x03,0x03,
0x03,0x03,
0x03,0x03
};
static const unsigned char SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */
{
0x05,0x05,
0x05,0x05,
0x05,0x05
};
static const unsigned char SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */
{
0x33,0x33,
0x33,0x33,
0x33,0x33
};
static const unsigned char SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */
{
0x33,0x33,
0x33,0x33,
0x33,0x33
};
#if 0 /* Not used */
static const unsigned char SiS_TVDelay661_301[] = /* 661, 301 */
{
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
};
static const unsigned char SiS_TVDelay661_301B[] = /* 661, 301B et al */
{
0x44,0x44,
0x44,0x44,
0x00,0x00,
0x44,0x44,
0x44,0x44,
0x44,0x44
};
#endif
static const unsigned char SiS310_TVDelayCompensation_LVDS[] = /* LVDS */
{
0x0a,0x0a,
0x0a,0x0a,
0x0a,0x0a
};
static const unsigned char SiS310_TVAntiFlick1[6][2] =
{
{0x4,0x0},
{0x4,0x8},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
};
static const unsigned char SiS310_TVEdge1[6][2] =
{
{0x0,0x4},
{0x0,0x4},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0},
{0x0,0x0}
};
static const unsigned char SiS310_TVYFilter1[5][8][4] =
{
{
{0x00,0xf4,0x10,0x38}, /* NTSC */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xf1,0x04,0x1f,0x18},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xee,0x0c,0x22,0x08},
{0xeb,0x15,0x25,0xf6}
},
{
{0x00,0xf4,0x10,0x38}, /* PAL */
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf3,0x00,0x1d,0x20},
{0x00,0xf4,0x10,0x38},
{0xf1,0xf7,0x1f,0x32},
{0xf3,0x00,0x1d,0x20},
{0xfc,0xfb,0x14,0x2a}
},
{
{0x00,0x00,0x00,0x00}, /* HiVision */
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xee,0x0c,0x22,0x08}
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-M */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6}
},
{
{0x00,0xf4,0x10,0x38}, /* PAL-N */
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x10,0x18},
{0xf7,0x06,0x19,0x14},
{0x00,0xf4,0x10,0x38},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x15,0x25,0xf6}
}
};
static const unsigned char SiS310_TVYFilter2[5][9][7] =
{
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* NTSC */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, /* HiVision */
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-M */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-N */
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
}
};
static const unsigned char SiS310_TVPhaseIncr1[3][2][4] =
{
{
{0x21,0xed,0xba,0x08},
{0x21,0xed,0xba,0x08}
},
{
{0x2a,0x05,0xe3,0x00},
{0x2a,0x05,0xe3,0x00}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
};
static const unsigned char SiS310_TVPhaseIncr2[3][2][4] =
{
{
{0x21,0xf0,0x7b,0xd6},
{0x21,0xf0,0x7b,0xd6}
},
{
{0x2a,0x0a,0x41,0xe9},
{0x2a,0x0a,0x41,0xe9}
},
{
{0x2a,0x05,0xd3,0x00},
{0x2a,0x05,0xd3,0x00}
}
};
/**************************************************************/
/* CUSTOM TIMING DATA --------------------------------------- */
/**************************************************************/
/* Inventec / Compaq Presario 3045US, 3017 */
static const struct SiS_LCDData SiS310_ExtCompaq1280x1024Data[] =
{
{ 211, 60,1024, 501,1688,1066},
{ 211, 60,1024, 508,1688,1066},
{ 211, 60,1024, 501,1688,1066},
{ 211, 60,1024, 508,1688,1066},
{ 32, 15,1696, 501,1696,1066},
{ 212, 75,1024, 621,1696,1066},
{ 4, 3,1696, 810,1696,1066},
{ 1, 1,1696,1066,1696,1066}
};
/* Asus A2xxxH _2 */
static const struct SiS_Part2PortTbl SiS310_CRT2Part2_Asus1024x768_3[] =
{
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
{{0x38,0x13,0x16,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
};
linux-7.2.3/drivers/video/fbdev/sis/sis.h
+701
View File
@@ -0,0 +1,701 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
*
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*/
#ifndef _SIS_H_
#define _SIS_H_
#include <video/sisfb.h>
#include "vgatypes.h"
#include "vstruct.h"
#define VER_MAJOR 1
#define VER_MINOR 8
#define VER_LEVEL 9
#include <linux/spinlock.h>
#ifdef CONFIG_COMPAT
#define SIS_NEW_CONFIG_COMPAT
#endif /* CONFIG_COMPAT */
#undef SISFBDEBUG
#ifdef SISFBDEBUG
#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#define TWDEBUG(x) printk(KERN_INFO x "\n");
#else
#define DPRINTK(fmt, args...)
#define TWDEBUG(x)
#endif
#define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
/* To be included in pci_ids.h */
#ifndef PCI_DEVICE_ID_SI_650_VGA
#define PCI_DEVICE_ID_SI_650_VGA 0x6325
#endif
#ifndef PCI_DEVICE_ID_SI_650
#define PCI_DEVICE_ID_SI_650 0x0650
#endif
#ifndef PCI_DEVICE_ID_SI_651
#define PCI_DEVICE_ID_SI_651 0x0651
#endif
#ifndef PCI_DEVICE_ID_SI_740
#define PCI_DEVICE_ID_SI_740 0x0740
#endif
#ifndef PCI_DEVICE_ID_SI_330
#define PCI_DEVICE_ID_SI_330 0x0330
#endif
#ifndef PCI_DEVICE_ID_SI_660_VGA
#define PCI_DEVICE_ID_SI_660_VGA 0x6330
#endif
#ifndef PCI_DEVICE_ID_SI_661
#define PCI_DEVICE_ID_SI_661 0x0661
#endif
#ifndef PCI_DEVICE_ID_SI_741
#define PCI_DEVICE_ID_SI_741 0x0741
#endif
#ifndef PCI_DEVICE_ID_SI_660
#define PCI_DEVICE_ID_SI_660 0x0660
#endif
#ifndef PCI_DEVICE_ID_SI_760
#define PCI_DEVICE_ID_SI_760 0x0760
#endif
#ifndef PCI_DEVICE_ID_SI_761
#define PCI_DEVICE_ID_SI_761 0x0761
#endif
#ifndef PCI_VENDOR_ID_XGI
#define PCI_VENDOR_ID_XGI 0x18ca
#endif
#ifndef PCI_DEVICE_ID_XGI_20
#define PCI_DEVICE_ID_XGI_20 0x0020
#endif
#ifndef PCI_DEVICE_ID_XGI_40
#define PCI_DEVICE_ID_XGI_40 0x0040
#endif
/* To be included in fb.h */
#ifndef FB_ACCEL_SIS_GLAMOUR_2
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */
#endif
#ifndef FB_ACCEL_SIS_XABRE
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 76x */
#endif
#ifndef FB_ACCEL_XGI_VOLARI_V
#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari Vx (V3XT, V5, V8) */
#endif
#ifndef FB_ACCEL_XGI_VOLARI_Z
#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
#endif
/* ivideo->caps */
#define HW_CURSOR_CAP 0x80
#define TURBO_QUEUE_CAP 0x40
#define AGP_CMD_QUEUE_CAP 0x20
#define VM_CMD_QUEUE_CAP 0x10
#define MMIO_CMD_QUEUE_CAP 0x08
/* For 300 series */
#define TURBO_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
#define HW_CURSOR_AREA_SIZE_300 4096 /* 4K */
/* For 315/Xabre series */
#define COMMAND_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
#define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
#define HW_CURSOR_AREA_SIZE_315 16384 /* 16K */
#define COMMAND_QUEUE_THRESHOLD 0x1F
#define SIS_OH_ALLOC_SIZE 4000
#define SENTINEL 0x7fffffff
#define SEQ_ADR 0x14
#define SEQ_DATA 0x15
#define DAC_ADR 0x18
#define DAC_DATA 0x19
#define CRTC_ADR 0x24
#define CRTC_DATA 0x25
#define DAC2_ADR (0x16-0x30)
#define DAC2_DATA (0x17-0x30)
#define VB_PART1_ADR (0x04-0x30)
#define VB_PART1_DATA (0x05-0x30)
#define VB_PART2_ADR (0x10-0x30)
#define VB_PART2_DATA (0x11-0x30)
#define VB_PART3_ADR (0x12-0x30)
#define VB_PART3_DATA (0x13-0x30)
#define VB_PART4_ADR (0x14-0x30)
#define VB_PART4_DATA (0x15-0x30)
#define SISSR ivideo->SiS_Pr.SiS_P3c4
#define SISCR ivideo->SiS_Pr.SiS_P3d4
#define SISDACA ivideo->SiS_Pr.SiS_P3c8
#define SISDACD ivideo->SiS_Pr.SiS_P3c9
#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port
#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port
#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port
#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port
#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port
#define SISDAC2A SISPART5
#define SISDAC2D (SISPART5 + 1)
#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c)
#define SISMISCW ivideo->SiS_Pr.SiS_P3c2
#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a)
#define SISPEL ivideo->SiS_Pr.SiS_P3c6
#define SISVGAENABLE (ivideo->SiS_Pr.RelIO + 0x13)
#define SISVID (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
#define SISCAP (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
#define IND_SIS_PASSWORD 0x05 /* SRs */
#define IND_SIS_COLOR_MODE 0x06
#define IND_SIS_RAMDAC_CONTROL 0x07
#define IND_SIS_DRAM_SIZE 0x14
#define IND_SIS_MODULE_ENABLE 0x1E
#define IND_SIS_PCI_ADDRESS_SET 0x20
#define IND_SIS_TURBOQUEUE_ADR 0x26
#define IND_SIS_TURBOQUEUE_SET 0x27
#define IND_SIS_POWER_ON_TRAP 0x38
#define IND_SIS_POWER_ON_TRAP2 0x39
#define IND_SIS_CMDQUEUE_SET 0x26
#define IND_SIS_CMDQUEUE_THRESHOLD 0x27
#define IND_SIS_AGP_IO_PAD 0x48
#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */
#define SIS_CRT2_WENABLE_315 0x2F
#define SIS_PASSWORD 0x86 /* SR05 */
#define SIS_INTERLACED_MODE 0x20 /* SR06 */
#define SIS_8BPP_COLOR_MODE 0x0
#define SIS_15BPP_COLOR_MODE 0x1
#define SIS_16BPP_COLOR_MODE 0x2
#define SIS_32BPP_COLOR_MODE 0x4
#define SIS_ENABLE_2D 0x40 /* SR1E */
#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
#define SIS_PCI_ADDR_ENABLE 0x80
#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330/340 series SR26 */
#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
#define SIS_MMIO_CMD_ENABLE 0x20
#define SIS_CMD_QUEUE_SIZE_512k 0x00
#define SIS_CMD_QUEUE_SIZE_1M 0x04
#define SIS_CMD_QUEUE_SIZE_2M 0x08
#define SIS_CMD_QUEUE_SIZE_4M 0x0C
#define SIS_CMD_QUEUE_RESET 0x01
#define SIS_CMD_AUTO_CORR 0x02
#define SIS_CMD_QUEUE_SIZE_Z7_64k 0x00 /* XGI Z7 */
#define SIS_CMD_QUEUE_SIZE_Z7_128k 0x04
#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
#define SIS_MODE_SELECT_CRT2 0x02
#define SIS_VB_OUTPUT_COMPOSITE 0x04
#define SIS_VB_OUTPUT_SVIDEO 0x08
#define SIS_VB_OUTPUT_SCART 0x10
#define SIS_VB_OUTPUT_LCD 0x20
#define SIS_VB_OUTPUT_CRT2 0x40
#define SIS_VB_OUTPUT_HIVISION 0x80
#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
#define SIS_DRIVER_MODE 0x40
#define SIS_VB_COMPOSITE 0x01 /* CR32 */
#define SIS_VB_SVIDEO 0x02
#define SIS_VB_SCART 0x04
#define SIS_VB_LCD 0x08
#define SIS_VB_CRT2 0x10
#define SIS_CRT1 0x20
#define SIS_VB_HIVISION 0x40
#define SIS_VB_YPBPR 0x80
#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */
#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
#define SIS_EXTERNAL_CHIP_LVDS 0x02
#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
#define SIS310_EXTERNAL_CHIP_LVDS 0x02
#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03
#define SIS_AGP_2X 0x20 /* CR48 */
/* vbflags, private entries (others in sisfb.h) */
#define VB_CONEXANT 0x00000800 /* 661 series only */
#define VB_TRUMPION VB_CONEXANT /* 300 series only */
#define VB_302ELV 0x00004000
#define VB_301 0x00100000 /* Video bridge type */
#define VB_301B 0x00200000
#define VB_302B 0x00400000
#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */
#define VB_LVDS 0x01000000
#define VB_CHRONTEL 0x02000000
#define VB_301LV 0x04000000
#define VB_302LV 0x08000000
#define VB_301C 0x10000000
#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
/* vbflags2 (static stuff only!) */
#define VB2_SISUMC 0x00000001
#define VB2_301 0x00000002 /* Video bridge type */
#define VB2_301B 0x00000004
#define VB2_301C 0x00000008
#define VB2_307T 0x00000010
#define VB2_302B 0x00000800
#define VB2_301LV 0x00001000
#define VB2_302LV 0x00002000
#define VB2_302ELV 0x00004000
#define VB2_307LV 0x00008000
#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */
#define VB2_CONEXANT 0x10000000
#define VB2_TRUMPION 0x20000000
#define VB2_LVDS 0x40000000
#define VB2_CHRONTEL 0x80000000
#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T)
#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B)
#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV)
#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T)
#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE)
#define VB2_30xC (VB2_301C | VB2_307T)
#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV)
#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T)
#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV)
#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
/* I/O port access functions */
void SiS_SetReg(SISIOADDRESS, u8, u8);
void SiS_SetRegByte(SISIOADDRESS, u8);
void SiS_SetRegShort(SISIOADDRESS, u16);
void SiS_SetRegLong(SISIOADDRESS, u32);
void SiS_SetRegANDOR(SISIOADDRESS, u8, u8, u8);
void SiS_SetRegAND(SISIOADDRESS, u8, u8);
void SiS_SetRegOR(SISIOADDRESS, u8, u8);
u8 SiS_GetReg(SISIOADDRESS, u8);
u8 SiS_GetRegByte(SISIOADDRESS);
u16 SiS_GetRegShort(SISIOADDRESS);
u32 SiS_GetRegLong(SISIOADDRESS);
/* Chrontel TV, DDC and DPMS functions */
/* from init.c */
bool SiSInitPtr(struct SiS_Private *SiS_Pr);
unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, bool FSTN,
unsigned short CustomT, int LCDwith, int LCDheight,
unsigned int VBFlags2);
unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
unsigned short *ModeIdIndex);
unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
unsigned short ModeIdIndex, unsigned short RRTI);
#ifdef CONFIG_FB_SIS_300
void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
unsigned short *idx2);
unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
#endif
void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
int yres, struct fb_var_screeninfo *var, bool writeres);
/* From init301.c: */
extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex, int chkcrt2mode);
extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
extern void SiS_DisableBridge(struct SiS_Private *);
extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex);
extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
unsigned short ModeIdIndex, unsigned short RRTI);
extern bool SiS_IsVAMode(struct SiS_Private *);
extern bool SiS_IsDualEdge(struct SiS_Private *);
#ifdef CONFIG_FB_SIS_300
extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
unsigned int val);
#endif
#ifdef CONFIG_FB_SIS_315
extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
unsigned char val);
extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
#endif
/* MMIO access macros */
#define MMIO_IN8(base, offset) readb((base+offset))
#define MMIO_IN16(base, offset) readw((base+offset))
#define MMIO_IN32(base, offset) readl((base+offset))
#define MMIO_OUT8(base, offset, val) writeb(((u8)(val)), (base+offset))
#define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
#define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
/* Queue control MMIO registers */
#define Q_BASE_ADDR 0x85C0 /* Base address of software queue */
#define Q_WRITE_PTR 0x85C4 /* Current write pointer */
#define Q_READ_PTR 0x85C8 /* Current read pointer */
#define Q_STATUS 0x85CC /* queue status */
#define MMIO_QUEUE_PHYBASE Q_BASE_ADDR
#define MMIO_QUEUE_WRITEPORT Q_WRITE_PTR
#define MMIO_QUEUE_READPORT Q_READ_PTR
#ifndef FB_BLANK_UNBLANK
#define FB_BLANK_UNBLANK 0
#endif
#ifndef FB_BLANK_NORMAL
#define FB_BLANK_NORMAL 1
#endif
#ifndef FB_BLANK_VSYNC_SUSPEND
#define FB_BLANK_VSYNC_SUSPEND 2
#endif
#ifndef FB_BLANK_HSYNC_SUSPEND
#define FB_BLANK_HSYNC_SUSPEND 3
#endif
#ifndef FB_BLANK_POWERDOWN
#define FB_BLANK_POWERDOWN 4
#endif
enum _SIS_LCD_TYPE {
LCD_INVALID = 0,
LCD_800x600,
LCD_1024x768,
LCD_1280x1024,
LCD_1280x960,
LCD_640x480,
LCD_1600x1200,
LCD_1920x1440,
LCD_2048x1536,
LCD_320x240, /* FSTN */
LCD_1400x1050,
LCD_1152x864,
LCD_1152x768,
LCD_1280x768,
LCD_1024x600,
LCD_320x240_2, /* DSTN */
LCD_320x240_3, /* DSTN */
LCD_848x480,
LCD_1280x800,
LCD_1680x1050,
LCD_1280x720,
LCD_1280x854,
LCD_CUSTOM,
LCD_UNKNOWN
};
enum _SIS_CMDTYPE {
MMIO_CMD = 0,
AGP_CMD_QUEUE,
VM_CMD_QUEUE,
};
struct SIS_OH {
struct SIS_OH *poh_next;
struct SIS_OH *poh_prev;
u32 offset;
u32 size;
};
struct SIS_OHALLOC {
struct SIS_OHALLOC *poha_next;
struct SIS_OH aoh[1];
};
struct SIS_HEAP {
struct SIS_OH oh_free;
struct SIS_OH oh_used;
struct SIS_OH *poh_freelist;
struct SIS_OHALLOC *poha_chain;
u32 max_freesize;
struct sis_video_info *vinfo;
};
/* Our "par" */
struct sis_video_info {
int cardnumber;
struct fb_info *memyselfandi;
struct SiS_Private SiS_Pr;
struct sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */
struct fb_var_screeninfo default_var;
struct fb_fix_screeninfo sisfb_fix;
u32 pseudo_palette[16];
struct sisfb_monitor {
u16 hmin;
u16 hmax;
u16 vmin;
u16 vmax;
u32 dclockmax;
u8 feature;
bool datavalid;
} sisfb_thismonitor;
unsigned short chip_id; /* PCI ID of chip */
unsigned short chip_vendor; /* PCI ID of vendor */
char myid[40];
struct pci_dev *nbridge;
struct pci_dev *lpcdev;
int mni; /* Mode number index */
unsigned long video_size;
unsigned long video_base;
unsigned long mmio_size;
unsigned long mmio_base;
unsigned long vga_base;
unsigned long video_offset;
unsigned long UMAsize, LFBsize;
void __iomem *video_vbase;
void __iomem *mmio_vbase;
unsigned char *bios_abase;
int wc_cookie;
u32 sisfb_mem;
u32 sisfb_parm_mem;
int sisfb_accel;
int sisfb_ypan;
int sisfb_max;
int sisfb_userom;
int sisfb_useoem;
int sisfb_mode_idx;
int sisfb_parm_rate;
int sisfb_crt1off;
int sisfb_forcecrt1;
int sisfb_crt2type;
int sisfb_crt2flags;
int sisfb_dstn;
int sisfb_fstn;
int sisfb_tvplug;
int sisfb_tvstd;
int sisfb_nocrt2rate;
u32 heapstart; /* offset */
void __iomem *sisfb_heap_start; /* address */
void __iomem *sisfb_heap_end; /* address */
u32 sisfb_heap_size;
int havenoheap;
struct SIS_HEAP sisfb_heap; /* This card's vram heap */
int video_bpp;
int video_cmap_len;
int video_width;
int video_height;
unsigned int refresh_rate;
unsigned int chip;
unsigned int chip_real_id;
u8 revision_id;
int sisvga_enabled; /* PCI device was enabled */
int video_linelength; /* real pitch */
int scrnpitchCRT1; /* pitch regarding interlace */
u16 DstColor; /* For 2d acceleration */
u32 SiS310_AccelDepth;
u32 CommandReg;
int cmdqueuelength; /* Current (for accel) */
u32 cmdQueueSize; /* Total size in KB */
spinlock_t lockaccel; /* Do not use outside of kernel! */
unsigned int pcibus;
unsigned int pcislot;
unsigned int pcifunc;
int accel;
int engineok;
u16 subsysvendor;
u16 subsysdevice;
u32 vbflags; /* Replacing deprecated stuff from above */
u32 currentvbflags;
u32 vbflags2;
int lcdxres, lcdyres;
int lcddefmodeidx, tvdefmodeidx, defmodeidx;
u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */
u32 curFSTN, curDSTN;
int current_bpp;
int current_width;
int current_height;
int current_htotal;
int current_vtotal;
int current_linelength;
__u32 current_pixclock;
int current_refresh_rate;
unsigned int current_base;
u8 mode_no;
u8 rate_idx;
int modechanged;
unsigned char modeprechange;
u8 sisfb_lastrates[128];
int newrom;
int haveXGIROM;
int registered;
int warncount;
int sisvga_engine;
int hwcursor_size;
int CRT2_write_enable;
u8 caps;
u8 detectedpdc;
u8 detectedpdca;
u8 detectedlcda;
void __iomem *hwcursor_vbase;
int chronteltype;
int tvxpos, tvypos;
u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
int tvx, tvy;
u8 sisfblocked;
struct sisfb_info sisfb_infoblock;
struct sisfb_cmd sisfb_command;
u32 sisfb_id;
u8 sisfb_can_post;
u8 sisfb_card_posted;
u8 sisfb_was_boot_device;
struct sis_video_info *next;
};
/* from sis_accel.c */
extern void fbcon_sis_fillrect(struct fb_info *info,
const struct fb_fillrect *rect);
extern void fbcon_sis_copyarea(struct fb_info *info,
const struct fb_copyarea *area);
extern int fbcon_sis_sync(struct fb_info *info);
/* Internal 2D accelerator functions */
extern int sisfb_initaccel(struct sis_video_info *ivideo);
extern void sisfb_syncaccel(struct sis_video_info *ivideo);
/* Internal general routines */
#ifdef CONFIG_FB_SIS_300
unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
#endif
#ifdef CONFIG_FB_SIS_315
void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
#endif
/* SiS-specific exported functions */
void sis_malloc(struct sis_memreq *req);
void sis_free(u32 base);
/* Routines from init.c/init301.c */
extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
int LCDwith, int LCDheight, unsigned int VBFlags2);
extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
int *htotal, int *vtotal, unsigned char rateindex);
extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
unsigned char modeno, unsigned char rateindex);
extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var);
#endif
linux-7.2.3/drivers/video/fbdev/sis/sis_accel.c
+410
View File
@@ -0,0 +1,410 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* 2D acceleration part
*
* Based on the XFree86/X.org driver which is
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
* (see http://www.winischhofer.net/
* for more information and updates)
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/types.h>
#include <asm/io.h>
#include "sis.h"
#include "sis_accel.h"
static const u8 sisALUConv[] =
{
0x00, /* dest = 0; 0, GXclear, 0 */
0x88, /* dest &= src; DSa, GXand, 0x1 */
0x44, /* dest = src & ~dest; SDna, GXandReverse, 0x2 */
0xCC, /* dest = src; S, GXcopy, 0x3 */
0x22, /* dest &= ~src; DSna, GXandInverted, 0x4 */
0xAA, /* dest = dest; D, GXnoop, 0x5 */
0x66, /* dest = ^src; DSx, GXxor, 0x6 */
0xEE, /* dest |= src; DSo, GXor, 0x7 */
0x11, /* dest = ~src & ~dest; DSon, GXnor, 0x8 */
0x99, /* dest ^= ~src ; DSxn, GXequiv, 0x9 */
0x55, /* dest = ~dest; Dn, GXInvert, 0xA */
0xDD, /* dest = src|~dest ; SDno, GXorReverse, 0xB */
0x33, /* dest = ~src; Sn, GXcopyInverted, 0xC */
0xBB, /* dest |= ~src; DSno, GXorInverted, 0xD */
0x77, /* dest = ~src|~dest; DSan, GXnand, 0xE */
0xFF, /* dest = 0xFF; 1, GXset, 0xF */
};
/* same ROP but with Pattern as Source */
static const u8 sisPatALUConv[] =
{
0x00, /* dest = 0; 0, GXclear, 0 */
0xA0, /* dest &= src; DPa, GXand, 0x1 */
0x50, /* dest = src & ~dest; PDna, GXandReverse, 0x2 */
0xF0, /* dest = src; P, GXcopy, 0x3 */
0x0A, /* dest &= ~src; DPna, GXandInverted, 0x4 */
0xAA, /* dest = dest; D, GXnoop, 0x5 */
0x5A, /* dest = ^src; DPx, GXxor, 0x6 */
0xFA, /* dest |= src; DPo, GXor, 0x7 */
0x05, /* dest = ~src & ~dest; DPon, GXnor, 0x8 */
0xA5, /* dest ^= ~src ; DPxn, GXequiv, 0x9 */
0x55, /* dest = ~dest; Dn, GXInvert, 0xA */
0xF5, /* dest = src|~dest ; PDno, GXorReverse, 0xB */
0x0F, /* dest = ~src; Pn, GXcopyInverted, 0xC */
0xAF, /* dest |= ~src; DPno, GXorInverted, 0xD */
0x5F, /* dest = ~src|~dest; DPan, GXnand, 0xE */
0xFF, /* dest = 0xFF; 1, GXset, 0xF */
};
static const int myrops[] = {
3, 10, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
};
/* 300 series ----------------------------------------------------- */
#ifdef CONFIG_FB_SIS_300
static void
SiS300Sync(struct sis_video_info *ivideo)
{
SiS300Idle
}
static void
SiS300SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int xdir, int ydir,
int rop, int trans_color)
{
SiS300SetupDSTColorDepth(ivideo->DstColor);
SiS300SetupSRCPitch(ivideo->video_linelength)
SiS300SetupDSTRect(ivideo->video_linelength, 0xffff)
if(trans_color != -1) {
SiS300SetupROP(0x0A)
SiS300SetupSRCTrans(trans_color)
SiS300SetupCMDFlag(TRANSPARENT_BITBLT)
} else {
SiS300SetupROP(sisALUConv[rop])
}
if(xdir > 0) {
SiS300SetupCMDFlag(X_INC)
}
if(ydir > 0) {
SiS300SetupCMDFlag(Y_INC)
}
}
static void
SiS300SubsequentScreenToScreenCopy(struct sis_video_info *ivideo, int src_x,
int src_y, int dst_x, int dst_y, int width, int height)
{
u32 srcbase = 0, dstbase = 0;
if(src_y >= 2048) {
srcbase = ivideo->video_linelength * src_y;
src_y = 0;
}
if(dst_y >= 2048) {
dstbase = ivideo->video_linelength * dst_y;
dst_y = 0;
}
SiS300SetupSRCBase(srcbase);
SiS300SetupDSTBase(dstbase);
if(!(ivideo->CommandReg & X_INC)) {
src_x += width-1;
dst_x += width-1;
}
if(!(ivideo->CommandReg & Y_INC)) {
src_y += height-1;
dst_y += height-1;
}
SiS300SetupRect(width, height)
SiS300SetupSRCXY(src_x, src_y)
SiS300SetupDSTXY(dst_x, dst_y)
SiS300DoCMD
}
static void
SiS300SetupForSolidFill(struct sis_video_info *ivideo, u32 color, int rop)
{
SiS300SetupPATFG(color)
SiS300SetupDSTRect(ivideo->video_linelength, 0xffff)
SiS300SetupDSTColorDepth(ivideo->DstColor);
SiS300SetupROP(sisPatALUConv[rop])
SiS300SetupCMDFlag(PATFG)
}
static void
SiS300SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w, int h)
{
u32 dstbase = 0;
if(y >= 2048) {
dstbase = ivideo->video_linelength * y;
y = 0;
}
SiS300SetupDSTBase(dstbase)
SiS300SetupDSTXY(x,y)
SiS300SetupRect(w,h)
SiS300SetupCMDFlag(X_INC | Y_INC | BITBLT)
SiS300DoCMD
}
#endif
/* 315/330/340 series ---------------------------------------------- */
#ifdef CONFIG_FB_SIS_315
static void
SiS310Sync(struct sis_video_info *ivideo)
{
SiS310Idle
}
static void
SiS310SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int rop, int trans_color)
{
SiS310SetupDSTColorDepth(ivideo->DstColor);
SiS310SetupSRCPitch(ivideo->video_linelength)
SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
if(trans_color != -1) {
SiS310SetupROP(0x0A)
SiS310SetupSRCTrans(trans_color)
SiS310SetupCMDFlag(TRANSPARENT_BITBLT)
} else {
SiS310SetupROP(sisALUConv[rop])
/* Set command - not needed, both 0 */
/* SiSSetupCMDFlag(BITBLT | SRCVIDEO) */
}
SiS310SetupCMDFlag(ivideo->SiS310_AccelDepth)
/* The chip is smart enough to know the direction */
}
static void
SiS310SubsequentScreenToScreenCopy(struct sis_video_info *ivideo, int src_x, int src_y,
int dst_x, int dst_y, int width, int height)
{
u32 srcbase = 0, dstbase = 0;
int mymin = min(src_y, dst_y);
int mymax = max(src_y, dst_y);
/* Although the chip knows the direction to use
* if the source and destination areas overlap,
* that logic fails if we fiddle with the bitmap
* addresses. Therefore, we check if the source
* and destination blitting areas overlap and
* adapt the bitmap addresses synchronously
* if the coordinates exceed the valid range.
* The areas do not overlap, we do our
* normal check.
*/
if((mymax - mymin) < height) {
if((src_y >= 2048) || (dst_y >= 2048)) {
srcbase = ivideo->video_linelength * mymin;
dstbase = ivideo->video_linelength * mymin;
src_y -= mymin;
dst_y -= mymin;
}
} else {
if(src_y >= 2048) {
srcbase = ivideo->video_linelength * src_y;
src_y = 0;
}
if(dst_y >= 2048) {
dstbase = ivideo->video_linelength * dst_y;
dst_y = 0;
}
}
srcbase += ivideo->video_offset;
dstbase += ivideo->video_offset;
SiS310SetupSRCBase(srcbase);
SiS310SetupDSTBase(dstbase);
SiS310SetupRect(width, height)
SiS310SetupSRCXY(src_x, src_y)
SiS310SetupDSTXY(dst_x, dst_y)
SiS310DoCMD
}
static void
SiS310SetupForSolidFill(struct sis_video_info *ivideo, u32 color, int rop)
{
SiS310SetupPATFG(color)
SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
SiS310SetupDSTColorDepth(ivideo->DstColor);
SiS310SetupROP(sisPatALUConv[rop])
SiS310SetupCMDFlag(PATFG | ivideo->SiS310_AccelDepth)
}
static void
SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w, int h)
{
u32 dstbase = 0;
if(y >= 2048) {
dstbase = ivideo->video_linelength * y;
y = 0;
}
dstbase += ivideo->video_offset;
SiS310SetupDSTBase(dstbase)
SiS310SetupDSTXY(x,y)
SiS310SetupRect(w,h)
SiS310SetupCMDFlag(BITBLT)
SiS310DoCMD
}
#endif
/* --------------------------------------------------------------------- */
/* The exported routines */
int sisfb_initaccel(struct sis_video_info *ivideo)
{
#ifdef SISFB_USE_SPINLOCKS
spin_lock_init(&ivideo->lockaccel);
#endif
return 0;
}
void sisfb_syncaccel(struct sis_video_info *ivideo)
{
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
SiS300Sync(ivideo);
#endif
} else {
#ifdef CONFIG_FB_SIS_315
SiS310Sync(ivideo);
#endif
}
}
int fbcon_sis_sync(struct fb_info *info)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
CRITFLAGS
if((!ivideo->accel) || (!ivideo->engineok))
return 0;
CRITBEGIN
sisfb_syncaccel(ivideo);
CRITEND
return 0;
}
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 col = 0;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width, height;
CRITFLAGS
if(info->state != FBINFO_STATE_RUNNING)
return;
if((!ivideo->accel) || (!ivideo->engineok)) {
cfb_fillrect(info, rect);
return;
}
if(!rect->width || !rect->height || rect->dx >= vxres || rect->dy >= vyres)
return;
/* Clipping */
width = ((rect->dx + rect->width) > vxres) ? (vxres - rect->dx) : rect->width;
height = ((rect->dy + rect->height) > vyres) ? (vyres - rect->dy) : rect->height;
switch(info->var.bits_per_pixel) {
case 8: col = rect->color;
break;
case 16:
case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
break;
}
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
CRITBEGIN
SiS300SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS300SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
#endif
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForSolidFill(ivideo, col, myrops[rect->rop]);
SiS310SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
CRITEND
#endif
}
sisfb_syncaccel(ivideo);
}
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
u32 vxres = info->var.xres_virtual;
u32 vyres = info->var.yres_virtual;
int width = area->width;
int height = area->height;
CRITFLAGS
if(info->state != FBINFO_STATE_RUNNING)
return;
if((!ivideo->accel) || (!ivideo->engineok)) {
cfb_copyarea(info, area);
return;
}
if(!width || !height ||
area->sx >= vxres || area->sy >= vyres ||
area->dx >= vxres || area->dy >= vyres)
return;
/* Clipping */
if((area->sx + width) > vxres) width = vxres - area->sx;
if((area->dx + width) > vxres) width = vxres - area->dx;
if((area->sy + height) > vyres) height = vyres - area->sy;
if((area->dy + height) > vyres) height = vyres - area->dy;
if(ivideo->sisvga_engine == SIS_300_VGA) {
#ifdef CONFIG_FB_SIS_300
int xdir, ydir;
if(area->sx < area->dx) xdir = 0;
else xdir = 1;
if(area->sy < area->dy) ydir = 0;
else ydir = 1;
CRITBEGIN
SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
SiS300SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
area->dx, area->dy, width, height);
CRITEND
#endif
} else {
#ifdef CONFIG_FB_SIS_315
CRITBEGIN
SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
SiS310SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
area->dx, area->dy, width, height);
CRITEND
#endif
}
sisfb_syncaccel(ivideo);
}
linux-7.2.3/drivers/video/fbdev/sis/sis_accel.h
+387
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@@ -0,0 +1,387 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* 2D acceleration part
*
* Based on the X driver's sis300_accel.h which is
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* and sis310_accel.h which is
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>:
* (see http://www.winischhofer.net/
* for more information and updates)
*/
#ifndef _SISFB_ACCEL_H
#define _SISFB_ACCEL_H
/* Guard accelerator accesses with spin_lock_irqsave? Works well without. */
#undef SISFB_USE_SPINLOCKS
#ifdef SISFB_USE_SPINLOCKS
#include <linux/spinlock.h>
#define CRITBEGIN spin_lock_irqsave(&ivideo->lockaccel, critflags);
#define CRITEND spin_unlock_irqrestore(&ivideo->lockaccel, critflags);
#define CRITFLAGS unsigned long critflags;
#else
#define CRITBEGIN
#define CRITEND
#define CRITFLAGS
#endif
/* Definitions for the SIS engine communication. */
#define PATREGSIZE 384 /* Pattern register size. 384 bytes @ 0x8300 */
#define BR(x) (0x8200 | (x) << 2)
#define PBR(x) (0x8300 | (x) << 2)
/* SiS300 engine commands */
#define BITBLT 0x00000000 /* Blit */
#define COLOREXP 0x00000001 /* Color expand */
#define ENCOLOREXP 0x00000002 /* Enhanced color expand */
#define MULTIPLE_SCANLINE 0x00000003 /* ? */
#define LINE 0x00000004 /* Draw line */
#define TRAPAZOID_FILL 0x00000005 /* Fill trapezoid */
#define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
/* Additional engine commands for 315 */
#define ALPHA_BLEND 0x00000007 /* Alpha blend ? */
#define A3D_FUNCTION 0x00000008 /* 3D command ? */
#define CLEAR_Z_BUFFER 0x00000009 /* ? */
#define GRADIENT_FILL 0x0000000A /* Gradient fill */
/* source select */
#define SRCVIDEO 0x00000000 /* source is video RAM */
#define SRCSYSTEM 0x00000010 /* source is system memory */
#define SRCCPUBLITBUF SRCSYSTEM /* source is CPU-driven BitBuffer (for color expand) */
#define SRCAGP 0x00000020 /* source is AGP memory (?) */
/* Pattern flags */
#define PATFG 0x00000000 /* foreground color */
#define PATPATREG 0x00000040 /* pattern in pattern buffer (0x8300) */
#define PATMONO 0x00000080 /* mono pattern */
/* blitting direction (300 series only) */
#define X_INC 0x00010000
#define X_DEC 0x00000000
#define Y_INC 0x00020000
#define Y_DEC 0x00000000
/* Clipping flags */
#define NOCLIP 0x00000000
#define NOMERGECLIP 0x04000000
#define CLIPENABLE 0x00040000
#define CLIPWITHOUTMERGE 0x04040000
/* Transparency */
#define OPAQUE 0x00000000
#define TRANSPARENT 0x00100000
/* ? */
#define DSTAGP 0x02000000
#define DSTVIDEO 0x02000000
/* Subfunctions for Color/Enhanced Color Expansion (315 only) */
#define COLOR_TO_MONO 0x00100000
#define AA_TEXT 0x00200000
/* Some general registers for 315 series */
#define SRC_ADDR 0x8200
#define SRC_PITCH 0x8204
#define AGP_BASE 0x8206 /* color-depth dependent value */
#define SRC_Y 0x8208
#define SRC_X 0x820A
#define DST_Y 0x820C
#define DST_X 0x820E
#define DST_ADDR 0x8210
#define DST_PITCH 0x8214
#define DST_HEIGHT 0x8216
#define RECT_WIDTH 0x8218
#define RECT_HEIGHT 0x821A
#define PAT_FGCOLOR 0x821C
#define PAT_BGCOLOR 0x8220
#define SRC_FGCOLOR 0x8224
#define SRC_BGCOLOR 0x8228
#define MONO_MASK 0x822C
#define LEFT_CLIP 0x8234
#define TOP_CLIP 0x8236
#define RIGHT_CLIP 0x8238
#define BOTTOM_CLIP 0x823A
#define COMMAND_READY 0x823C
#define FIRE_TRIGGER 0x8240
#define PATTERN_REG 0x8300 /* 384 bytes pattern buffer */
/* Transparent bitblit registers */
#define TRANS_DST_KEY_HIGH PAT_FGCOLOR
#define TRANS_DST_KEY_LOW PAT_BGCOLOR
#define TRANS_SRC_KEY_HIGH SRC_FGCOLOR
#define TRANS_SRC_KEY_LOW SRC_BGCOLOR
/* Store queue length in par */
#define CmdQueLen ivideo->cmdqueuelength
/* ------------- SiS 300 series -------------- */
/* BR(16) (0x8240):
bit 31 2D engine: 1 is idle,
bit 30 3D engine: 1 is idle,
bit 29 Command queue: 1 is empty
bits 28:24: Current CPU driven BitBlt buffer stage bit[4:0]
bits 15:0: Current command queue length
*/
#define SiS300Idle \
{ \
while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){} \
while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){} \
while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){} \
CmdQueLen = MMIO_IN16(ivideo->mmio_vbase, 0x8240); \
}
/* (do three times, because 2D engine seems quite unsure about whether or not it's idle) */
#define SiS300SetupSRCBase(base) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(0), base);\
CmdQueLen--;
#define SiS300SetupSRCPitch(pitch) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT16(ivideo->mmio_vbase, BR(1), pitch);\
CmdQueLen--;
#define SiS300SetupSRCXY(x,y) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(2), (x)<<16 | (y) );\
CmdQueLen--;
#define SiS300SetupDSTBase(base) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(4), base);\
CmdQueLen--;
#define SiS300SetupDSTXY(x,y) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(3), (x)<<16 | (y) );\
CmdQueLen--;
#define SiS300SetupDSTRect(x,y) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(5), (y)<<16 | (x) );\
CmdQueLen--;
#define SiS300SetupDSTColorDepth(bpp) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT16(ivideo->mmio_vbase, BR(1)+2, bpp);\
CmdQueLen--;
#define SiS300SetupRect(w,h) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(6), (h)<<16 | (w) );\
CmdQueLen--;
#define SiS300SetupPATFG(color) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(7), color);\
CmdQueLen--;
#define SiS300SetupPATBG(color) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(8), color);\
CmdQueLen--;
#define SiS300SetupSRCFG(color) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(9), color);\
CmdQueLen--;
#define SiS300SetupSRCBG(color) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(10), color);\
CmdQueLen--;
/* 0x8224 src colorkey high */
/* 0x8228 src colorkey low */
/* 0x821c dest colorkey high */
/* 0x8220 dest colorkey low */
#define SiS300SetupSRCTrans(color) \
if(CmdQueLen <= 1) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, 0x8224, color);\
MMIO_OUT32(ivideo->mmio_vbase, 0x8228, color);\
CmdQueLen -= 2;
#define SiS300SetupDSTTrans(color) \
if(CmdQueLen <= 1) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, 0x821C, color); \
MMIO_OUT32(ivideo->mmio_vbase, 0x8220, color); \
CmdQueLen -= 2;
#define SiS300SetupMONOPAT(p0,p1) \
if(CmdQueLen <= 1) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(11), p0);\
MMIO_OUT32(ivideo->mmio_vbase, BR(12), p1);\
CmdQueLen -= 2;
#define SiS300SetupClipLT(left,top) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(13), ((left) & 0xFFFF) | (top)<<16 );\
CmdQueLen--;
#define SiS300SetupClipRB(right,bottom) \
if(CmdQueLen <= 0) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\
CmdQueLen--;
/* General */
#define SiS300SetupROP(rop) \
ivideo->CommandReg = (rop) << 8;
#define SiS300SetupCMDFlag(flags) \
ivideo->CommandReg |= (flags);
#define SiS300DoCMD \
if(CmdQueLen <= 1) SiS300Idle;\
MMIO_OUT32(ivideo->mmio_vbase, BR(15), ivideo->CommandReg); \
MMIO_OUT32(ivideo->mmio_vbase, BR(16), 0);\
CmdQueLen -= 2;
/* -------------- SiS 315/330 series --------------- */
/* Q_STATUS:
bit 31 = 1: All engines idle and all queues empty
bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
bit 29 = 1: 2D engine is idle
bit 28 = 1: 3D engine is idle
bit 27 = 1: HW command queue empty
bit 26 = 1: 2D queue empty
bit 25 = 1: 3D queue empty
bit 24 = 1: SW command queue empty
bits 23:16: 2D counter 3
bits 15:8: 2D counter 2
bits 7:0: 2D counter 1
*/
#define SiS310Idle \
{ \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){} \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){} \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){} \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){} \
CmdQueLen = 0; \
}
#define SiS310SetupSRCBase(base) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, SRC_ADDR, base);\
CmdQueLen--;
#define SiS310SetupSRCPitch(pitch) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT16(ivideo->mmio_vbase, SRC_PITCH, pitch);\
CmdQueLen--;
#define SiS310SetupSRCXY(x,y) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, SRC_Y, (x)<<16 | (y) );\
CmdQueLen--;
#define SiS310SetupDSTBase(base) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, DST_ADDR, base);\
CmdQueLen--;
#define SiS310SetupDSTXY(x,y) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, DST_Y, (x)<<16 | (y) );\
CmdQueLen--;
#define SiS310SetupDSTRect(x,y) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, DST_PITCH, (y)<<16 | (x) );\
CmdQueLen--;
#define SiS310SetupDSTColorDepth(bpp) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT16(ivideo->mmio_vbase, AGP_BASE, bpp);\
CmdQueLen--;
#define SiS310SetupRect(w,h) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, RECT_WIDTH, (h)<<16 | (w) );\
CmdQueLen--;
#define SiS310SetupPATFG(color) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, PAT_FGCOLOR, color);\
CmdQueLen--;
#define SiS310SetupPATBG(color) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, PAT_BGCOLOR, color);\
CmdQueLen--;
#define SiS310SetupSRCFG(color) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, SRC_FGCOLOR, color);\
CmdQueLen--;
#define SiS310SetupSRCBG(color) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, SRC_BGCOLOR, color);\
CmdQueLen--;
#define SiS310SetupSRCTrans(color) \
if(CmdQueLen <= 1) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, TRANS_SRC_KEY_HIGH, color);\
MMIO_OUT32(ivideo->mmio_vbase, TRANS_SRC_KEY_LOW, color);\
CmdQueLen -= 2;
#define SiS310SetupDSTTrans(color) \
if(CmdQueLen <= 1) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, TRANS_DST_KEY_HIGH, color); \
MMIO_OUT32(ivideo->mmio_vbase, TRANS_DST_KEY_LOW, color); \
CmdQueLen -= 2;
#define SiS310SetupMONOPAT(p0,p1) \
if(CmdQueLen <= 1) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK, p0);\
MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK+4, p1);\
CmdQueLen -= 2;
#define SiS310SetupClipLT(left,top) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16 );\
CmdQueLen--;
#define SiS310SetupClipRB(right,bottom) \
if(CmdQueLen <= 0) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16 );\
CmdQueLen--;
#define SiS310SetupROP(rop) \
ivideo->CommandReg = (rop) << 8;
#define SiS310SetupCMDFlag(flags) \
ivideo->CommandReg |= (flags);
#define SiS310DoCMD \
if(CmdQueLen <= 1) SiS310Idle;\
MMIO_OUT32(ivideo->mmio_vbase, COMMAND_READY, ivideo->CommandReg); \
MMIO_OUT32(ivideo->mmio_vbase, FIRE_TRIGGER, 0); \
CmdQueLen -= 2;
int sisfb_initaccel(struct sis_video_info *ivideo);
void sisfb_syncaccel(struct sis_video_info *ivideo);
int fbcon_sis_sync(struct fb_info *info);
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
#endif
linux-7.2.3/drivers/video/fbdev/sis/sis_main.c
+6817
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File diff suppressed because it is too large Load Diff
linux-7.2.3/drivers/video/fbdev/sis/sis_main.h
+651
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@@ -0,0 +1,651 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* SiS 300/305/540/630(S)/730(S),
* SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
*
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*/
#ifndef _SISFB_MAIN
#define _SISFB_MAIN
#include "vstruct.h"
#include "sis.h"
/* Fbcon stuff */
static struct fb_var_screeninfo my_default_var = {
.xres = 0,
.yres = 0,
.xres_virtual = 0,
.yres_virtual = 0,
.xoffset = 0,
.yoffset = 0,
.bits_per_pixel = 0,
.grayscale = 0,
.red = {0, 8, 0},
.green = {0, 8, 0},
.blue = {0, 8, 0},
.transp = {0, 0, 0},
.nonstd = 0,
.activate = FB_ACTIVATE_NOW,
.height = -1,
.width = -1,
.accel_flags = 0,
.pixclock = 0,
.left_margin = 0,
.right_margin = 0,
.upper_margin = 0,
.lower_margin = 0,
.hsync_len = 0,
.vsync_len = 0,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
};
#define MODE_INDEX_NONE 0 /* index for mode=none */
/* Boot-time parameters */
static int sisfb_off = 0;
static int sisfb_parm_mem = 0;
static int sisfb_accel = -1;
static int sisfb_ypan = -1;
static int sisfb_max = -1;
static int sisfb_userom = 1;
static int sisfb_useoem = -1;
static int sisfb_mode_idx = -1; /* Use a default mode if we are inside the kernel */
static int sisfb_parm_rate = -1;
static int sisfb_crt1off = 0;
static int sisfb_forcecrt1 = -1;
static int sisfb_crt2type = -1; /* CRT2 type (for overriding autodetection) */
static int sisfb_crt2flags = 0;
static int sisfb_pdc = 0xff;
static int sisfb_pdca = 0xff;
static int sisfb_scalelcd = -1;
static int sisfb_specialtiming = CUT_NONE;
static int sisfb_lvdshl = -1;
static int sisfb_dstn = 0;
static int sisfb_fstn = 0;
static int sisfb_tvplug = -1; /* Tv plug type (for overriding autodetection) */
static int sisfb_tvstd = -1;
static int sisfb_tvxposoffset = 0;
static int sisfb_tvyposoffset = 0;
static int sisfb_nocrt2rate = 0;
#if !defined(__i386__) && !defined(__x86_64__)
static int sisfb_resetcard = 0;
static int sisfb_videoram = 0;
#endif
/* List of supported chips */
static struct sisfb_chip_info {
int chip;
int vgaengine;
int mni;
int hwcursor_size;
int CRT2_write_enable;
const char *chip_name;
} sisfb_chip_info[] = {
{ SIS_300, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 300/305" },
{ SIS_540, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 540" },
{ SIS_630, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 630" },
{ SIS_315H, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 315H" },
{ SIS_315, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 315" },
{ SIS_315PRO, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 315PRO" },
{ SIS_550, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 55x" },
{ SIS_650, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 650" },
{ SIS_330, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 330" },
{ SIS_660, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 660" },
{ XGI_20, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI Z7" },
{ XGI_40, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI V3XT/V5/V8" },
};
static struct pci_device_id sisfb_pci_table[] = {
#ifdef CONFIG_FB_SIS_300
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_300), .driver_data = 0 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_540_VGA), .driver_data = 1 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_630_VGA), .driver_data = 2 },
#endif
#ifdef CONFIG_FB_SIS_315
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_315H), .driver_data = 3 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_315), .driver_data = 4 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_315PRO), .driver_data = 5 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_550_VGA), .driver_data = 6 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_650_VGA), .driver_data = 7 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_330), .driver_data = 8 },
{ PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_660_VGA), .driver_data = 9 },
{ PCI_VDEVICE(XGI, PCI_DEVICE_ID_XGI_20), .driver_data = 10 },
{ PCI_VDEVICE(XGI, PCI_DEVICE_ID_XGI_40), .driver_data = 11 },
#endif
{ }
};
MODULE_DEVICE_TABLE(pci, sisfb_pci_table);
static struct sis_video_info *card_list = NULL;
/* The memory heap is now handled card-wise, by using
sis_malloc_new/sis_free_new. However, the DRM does
not do this yet. Until it does, we keep a "global"
heap which is actually the first card's one.
*/
static struct SIS_HEAP *sisfb_heap;
#define MD_SIS300 1
#define MD_SIS315 2
/* Mode table */
static const struct _sisbios_mode {
char name[15];
u8 mode_no[2];
u16 vesa_mode_no_1; /* "SiS defined" VESA mode number */
u16 vesa_mode_no_2; /* Real VESA mode numbers */
u16 xres;
u16 yres;
u16 bpp;
u16 rate_idx;
u16 cols;
u16 rows;
u8 chipset;
} sisbios_mode[] = {
/*0*/ {"none", {0xff,0xff}, 0x0000, 0x0000, 0, 0, 0, 0, 0, 0, MD_SIS300|MD_SIS315},
{"320x200x8", {0x59,0x59}, 0x0138, 0x0000, 320, 200, 8, 1, 40, 12, MD_SIS300|MD_SIS315},
{"320x200x16", {0x41,0x41}, 0x010e, 0x0000, 320, 200, 16, 1, 40, 12, MD_SIS300|MD_SIS315},
{"320x200x24", {0x4f,0x4f}, 0x0000, 0x0000, 320, 200, 32, 1, 40, 12, MD_SIS300|MD_SIS315}, /* That's for people who mix up color- and fb depth */
{"320x200x32", {0x4f,0x4f}, 0x0000, 0x0000, 320, 200, 32, 1, 40, 12, MD_SIS300|MD_SIS315},
{"320x240x8", {0x50,0x50}, 0x0132, 0x0000, 320, 240, 8, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x16", {0x56,0x56}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x24", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
{"320x240x32", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
#define MODE_FSTN_8 9
#define MODE_FSTN_16 10
{"320x240x8", {0x5a,0x5a}, 0x0132, 0x0000, 320, 240, 8, 1, 40, 15, MD_SIS315}, /* FSTN */
/*10*/ {"320x240x16", {0x5b,0x5b}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS315}, /* FSTN */
{"400x300x8", {0x51,0x51}, 0x0133, 0x0000, 400, 300, 8, 1, 50, 18, MD_SIS300|MD_SIS315},
{"400x300x16", {0x57,0x57}, 0x0136, 0x0000, 400, 300, 16, 1, 50, 18, MD_SIS300|MD_SIS315},
{"400x300x24", {0x54,0x54}, 0x0000, 0x0000, 400, 300, 32, 1, 50, 18, MD_SIS300|MD_SIS315},
{"400x300x32", {0x54,0x54}, 0x0000, 0x0000, 400, 300, 32, 1, 50, 18, MD_SIS300|MD_SIS315},
{"512x384x8", {0x52,0x52}, 0x0000, 0x0000, 512, 384, 8, 1, 64, 24, MD_SIS300|MD_SIS315},
{"512x384x16", {0x58,0x58}, 0x0000, 0x0000, 512, 384, 16, 1, 64, 24, MD_SIS300|MD_SIS315},
{"512x384x24", {0x5c,0x5c}, 0x0000, 0x0000, 512, 384, 32, 1, 64, 24, MD_SIS300|MD_SIS315},
{"512x384x32", {0x5c,0x5c}, 0x0000, 0x0000, 512, 384, 32, 1, 64, 24, MD_SIS300|MD_SIS315},
{"640x400x8", {0x2f,0x2f}, 0x0000, 0x0000, 640, 400, 8, 1, 80, 25, MD_SIS300|MD_SIS315},
/*20*/ {"640x400x16", {0x5d,0x5d}, 0x0000, 0x0000, 640, 400, 16, 1, 80, 25, MD_SIS300|MD_SIS315},
{"640x400x24", {0x5e,0x5e}, 0x0000, 0x0000, 640, 400, 32, 1, 80, 25, MD_SIS300|MD_SIS315},
{"640x400x32", {0x5e,0x5e}, 0x0000, 0x0000, 640, 400, 32, 1, 80, 25, MD_SIS300|MD_SIS315},
{"640x480x8", {0x2e,0x2e}, 0x0101, 0x0101, 640, 480, 8, 1, 80, 30, MD_SIS300|MD_SIS315},
{"640x480x16", {0x44,0x44}, 0x0111, 0x0111, 640, 480, 16, 1, 80, 30, MD_SIS300|MD_SIS315},
{"640x480x24", {0x62,0x62}, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_SIS300|MD_SIS315},
{"640x480x32", {0x62,0x62}, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_SIS300|MD_SIS315},
{"720x480x8", {0x31,0x31}, 0x0000, 0x0000, 720, 480, 8, 1, 90, 30, MD_SIS300|MD_SIS315},
{"720x480x16", {0x33,0x33}, 0x0000, 0x0000, 720, 480, 16, 1, 90, 30, MD_SIS300|MD_SIS315},
{"720x480x24", {0x35,0x35}, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_SIS300|MD_SIS315},
/*30*/ {"720x480x32", {0x35,0x35}, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_SIS300|MD_SIS315},
{"720x576x8", {0x32,0x32}, 0x0000, 0x0000, 720, 576, 8, 1, 90, 36, MD_SIS300|MD_SIS315},
{"720x576x16", {0x34,0x34}, 0x0000, 0x0000, 720, 576, 16, 1, 90, 36, MD_SIS300|MD_SIS315},
{"720x576x24", {0x36,0x36}, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_SIS300|MD_SIS315},
{"720x576x32", {0x36,0x36}, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_SIS300|MD_SIS315},
{"768x576x8", {0x5f,0x5f}, 0x0000, 0x0000, 768, 576, 8, 1, 96, 36, MD_SIS300|MD_SIS315},
{"768x576x16", {0x60,0x60}, 0x0000, 0x0000, 768, 576, 16, 1, 96, 36, MD_SIS300|MD_SIS315},
{"768x576x24", {0x61,0x61}, 0x0000, 0x0000, 768, 576, 32, 1, 96, 36, MD_SIS300|MD_SIS315},
{"768x576x32", {0x61,0x61}, 0x0000, 0x0000, 768, 576, 32, 1, 96, 36, MD_SIS300|MD_SIS315},
{"800x480x8", {0x70,0x70}, 0x0000, 0x0000, 800, 480, 8, 1, 100, 30, MD_SIS300|MD_SIS315},
/*40*/ {"800x480x16", {0x7a,0x7a}, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_SIS300|MD_SIS315},
{"800x480x24", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
{"800x480x32", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE 43 /* index for 800x600x8 */
#define DEFAULT_LCDMODE 43 /* index for 800x600x8 */
#define DEFAULT_TVMODE 43 /* index for 800x600x8 */
{"800x600x8", {0x30,0x30}, 0x0103, 0x0103, 800, 600, 8, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x16", {0x47,0x47}, 0x0114, 0x0114, 800, 600, 16, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x24", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
{"800x600x32", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
{"848x480x8", {0x39,0x39}, 0x0000, 0x0000, 848, 480, 8, 2, 106, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE_848 48
{"848x480x16", {0x3b,0x3b}, 0x0000, 0x0000, 848, 480, 16, 2, 106, 30, MD_SIS300|MD_SIS315},
{"848x480x24", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
/*50*/ {"848x480x32", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
{"856x480x8", {0x3f,0x3f}, 0x0000, 0x0000, 856, 480, 8, 2, 107, 30, MD_SIS300|MD_SIS315},
#define DEFAULT_MODE_856 52
{"856x480x16", {0x42,0x42}, 0x0000, 0x0000, 856, 480, 16, 2, 107, 30, MD_SIS300|MD_SIS315},
{"856x480x24", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
{"856x480x32", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
{"960x540x8", {0x1d,0x1d}, 0x0000, 0x0000, 960, 540, 8, 1, 120, 33, MD_SIS315},
{"960x540x16", {0x1e,0x1e}, 0x0000, 0x0000, 960, 540, 16, 1, 120, 33, MD_SIS315},
{"960x540x24", {0x1f,0x1f}, 0x0000, 0x0000, 960, 540, 32, 1, 120, 33, MD_SIS315},
{"960x540x32", {0x1f,0x1f}, 0x0000, 0x0000, 960, 540, 32, 1, 120, 33, MD_SIS315},
{"960x600x8", {0x20,0x20}, 0x0000, 0x0000, 960, 600, 8, 1, 120, 37, MD_SIS315},
/*60*/ {"960x600x16", {0x21,0x21}, 0x0000, 0x0000, 960, 600, 16, 1, 120, 37, MD_SIS315},
{"960x600x24", {0x22,0x22}, 0x0000, 0x0000, 960, 600, 32, 1, 120, 37, MD_SIS315},
{"960x600x32", {0x22,0x22}, 0x0000, 0x0000, 960, 600, 32, 1, 120, 37, MD_SIS315},
{"1024x576x8", {0x71,0x71}, 0x0000, 0x0000, 1024, 576, 8, 1, 128, 36, MD_SIS300|MD_SIS315},
{"1024x576x16", {0x74,0x74}, 0x0000, 0x0000, 1024, 576, 16, 1, 128, 36, MD_SIS300|MD_SIS315},
{"1024x576x24", {0x77,0x77}, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_SIS300|MD_SIS315},
{"1024x576x32", {0x77,0x77}, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_SIS300|MD_SIS315},
{"1024x600x8", {0x20,0x20}, 0x0000, 0x0000, 1024, 600, 8, 1, 128, 37, MD_SIS300 },
{"1024x600x16", {0x21,0x21}, 0x0000, 0x0000, 1024, 600, 16, 1, 128, 37, MD_SIS300 },
{"1024x600x24", {0x22,0x22}, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_SIS300 },
/*70*/ {"1024x600x32", {0x22,0x22}, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_SIS300 },
{"1024x768x8", {0x38,0x38}, 0x0105, 0x0105, 1024, 768, 8, 2, 128, 48, MD_SIS300|MD_SIS315},
{"1024x768x16", {0x4a,0x4a}, 0x0117, 0x0117, 1024, 768, 16, 2, 128, 48, MD_SIS300|MD_SIS315},
{"1024x768x24", {0x64,0x64}, 0x013c, 0x0118, 1024, 768, 32, 2, 128, 48, MD_SIS300|MD_SIS315},
{"1024x768x32", {0x64,0x64}, 0x013c, 0x0118, 1024, 768, 32, 2, 128, 48, MD_SIS300|MD_SIS315},
{"1152x768x8", {0x23,0x23}, 0x0000, 0x0000, 1152, 768, 8, 1, 144, 48, MD_SIS300 },
{"1152x768x16", {0x24,0x24}, 0x0000, 0x0000, 1152, 768, 16, 1, 144, 48, MD_SIS300 },
{"1152x768x24", {0x25,0x25}, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_SIS300 },
{"1152x768x32", {0x25,0x25}, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_SIS300 },
{"1152x864x8", {0x29,0x29}, 0x0000, 0x0000, 1152, 864, 8, 1, 144, 54, MD_SIS300|MD_SIS315},
/*80*/ {"1152x864x16", {0x2a,0x2a}, 0x0000, 0x0000, 1152, 864, 16, 1, 144, 54, MD_SIS300|MD_SIS315},
{"1152x864x24", {0x2b,0x2b}, 0x0000, 0x0000, 1152, 864, 32, 1, 144, 54, MD_SIS300|MD_SIS315},
{"1152x864x32", {0x2b,0x2b}, 0x0000, 0x0000, 1152, 864, 32, 1, 144, 54, MD_SIS300|MD_SIS315},
{"1280x720x8", {0x79,0x79}, 0x0000, 0x0000, 1280, 720, 8, 1, 160, 45, MD_SIS300|MD_SIS315},
{"1280x720x16", {0x75,0x75}, 0x0000, 0x0000, 1280, 720, 16, 1, 160, 45, MD_SIS300|MD_SIS315},
{"1280x720x24", {0x78,0x78}, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_SIS300|MD_SIS315},
{"1280x720x32", {0x78,0x78}, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_SIS300|MD_SIS315},
{"1280x768x8", {0x55,0x23}, 0x0000, 0x0000, 1280, 768, 8, 1, 160, 48, MD_SIS300|MD_SIS315},
{"1280x768x16", {0x5a,0x24}, 0x0000, 0x0000, 1280, 768, 16, 1, 160, 48, MD_SIS300|MD_SIS315},
{"1280x768x24", {0x5b,0x25}, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_SIS300|MD_SIS315},
/*90*/ {"1280x768x32", {0x5b,0x25}, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_SIS300|MD_SIS315},
{"1280x800x8", {0x14,0x14}, 0x0000, 0x0000, 1280, 800, 8, 1, 160, 50, MD_SIS315},
{"1280x800x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 800, 16, 1, 160, 50, MD_SIS315},
{"1280x800x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
{"1280x800x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
{"1280x854x8", {0x14,0x14}, 0x0000, 0x0000, 1280, 854, 8, 1, 160, 53, MD_SIS315},
{"1280x854x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 854, 16, 1, 160, 53, MD_SIS315},
{"1280x854x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
{"1280x854x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
{"1280x960x8", {0x7c,0x7c}, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_SIS300|MD_SIS315},
/*100*/ {"1280x960x16", {0x7d,0x7d}, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x960x24", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x960x32", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
{"1280x1024x8", {0x3a,0x3a}, 0x0107, 0x0107, 1280, 1024, 8, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x16", {0x4d,0x4d}, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x24", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1280x1024x32", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
{"1360x768x8", {0x48,0x48}, 0x0000, 0x0000, 1360, 768, 8, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x768x16", {0x4b,0x4b}, 0x0000, 0x0000, 1360, 768, 16, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x768x24", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
/*110*/ {"1360x768x32", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
{"1360x1024x8", {0x67,0x67}, 0x0000, 0x0000, 1360, 1024, 8, 1, 170, 64, MD_SIS300 },
#define DEFAULT_MODE_1360 112
{"1360x1024x16", {0x6f,0x6f}, 0x0000, 0x0000, 1360, 1024, 16, 1, 170, 64, MD_SIS300 },
{"1360x1024x24", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
{"1360x1024x32", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
{"1400x1050x8", {0x26,0x26}, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_SIS315},
{"1400x1050x16", {0x27,0x27}, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_SIS315},
{"1400x1050x24", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
{"1400x1050x32", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
{"1600x1200x8", {0x3c,0x3c}, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_SIS300|MD_SIS315},
/*120*/ {"1600x1200x16", {0x3d,0x3d}, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1600x1200x24", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1600x1200x32", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
{"1680x1050x8", {0x17,0x17}, 0x0000, 0x0000, 1680, 1050, 8, 1, 210, 65, MD_SIS315},
{"1680x1050x16", {0x18,0x18}, 0x0000, 0x0000, 1680, 1050, 16, 1, 210, 65, MD_SIS315},
{"1680x1050x24", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
{"1680x1050x32", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
{"1920x1080x8", {0x2c,0x2c}, 0x0000, 0x0000, 1920, 1080, 8, 1, 240, 67, MD_SIS315},
{"1920x1080x16", {0x2d,0x2d}, 0x0000, 0x0000, 1920, 1080, 16, 1, 240, 67, MD_SIS315},
{"1920x1080x24", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
/*130*/ {"1920x1080x32", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
{"1920x1440x8", {0x68,0x68}, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x16", {0x69,0x69}, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x24", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
{"1920x1440x32", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
{"2048x1536x8", {0x6c,0x6c}, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_SIS315},
{"2048x1536x16", {0x6d,0x6d}, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_SIS315},
{"2048x1536x24", {0x6e,0x6e}, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
{"2048x1536x32", {0x6e,0x6e}, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
{"\0", {0x00,0x00}, 0, 0, 0, 0, 0, 0, 0}
};
#define SIS_LCD_NUMBER 18
static struct _sis_lcd_data {
u32 lcdtype;
u16 xres;
u16 yres;
u8 default_mode_idx;
} sis_lcd_data[] = {
{ LCD_640x480, 640, 480, 23 },
{ LCD_800x600, 800, 600, 43 },
{ LCD_1024x600, 1024, 600, 67 },
{ LCD_1024x768, 1024, 768, 71 },
{ LCD_1152x768, 1152, 768, 75 },
{ LCD_1152x864, 1152, 864, 79 },
{ LCD_1280x720, 1280, 720, 83 },
{ LCD_1280x768, 1280, 768, 87 },
{ LCD_1280x800, 1280, 800, 91 },
{ LCD_1280x854, 1280, 854, 95 },
{ LCD_1280x960, 1280, 960, 99 },
{ LCD_1280x1024, 1280, 1024, 103 },
{ LCD_1400x1050, 1400, 1050, 115 },
{ LCD_1680x1050, 1680, 1050, 123 },
{ LCD_1600x1200, 1600, 1200, 119 },
{ LCD_320x240_2, 320, 240, 9 },
{ LCD_320x240_3, 320, 240, 9 },
{ LCD_320x240, 320, 240, 9 },
};
/* CR36 evaluation */
static unsigned short sis300paneltype[] = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN,
LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN
};
static unsigned short sis310paneltype[] = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_320x240_2, LCD_320x240_3, LCD_UNKNOWN, LCD_UNKNOWN
};
static unsigned short sis661paneltype[] = {
LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
LCD_1280x854, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
LCD_1280x800, LCD_1680x1050, LCD_1280x720, LCD_UNKNOWN
};
#define FL_550_DSTN 0x01
#define FL_550_FSTN 0x02
#define FL_300 0x04
#define FL_315 0x08
static struct _sis_crt2type {
char name[32];
u32 type_no;
u32 tvplug_no;
u16 flags;
} sis_crt2type[] __initdata = {
{"NONE", 0, -1, FL_300|FL_315},
{"LCD", CRT2_LCD, -1, FL_300|FL_315},
{"TV", CRT2_TV, -1, FL_300|FL_315},
{"VGA", CRT2_VGA, -1, FL_300|FL_315},
{"SVIDEO", CRT2_TV, TV_SVIDEO, FL_300|FL_315},
{"COMPOSITE", CRT2_TV, TV_AVIDEO, FL_300|FL_315},
{"CVBS", CRT2_TV, TV_AVIDEO, FL_300|FL_315},
{"SVIDEO+COMPOSITE", CRT2_TV, TV_AVIDEO|TV_SVIDEO, FL_300|FL_315},
{"COMPOSITE+SVIDEO", CRT2_TV, TV_AVIDEO|TV_SVIDEO, FL_300|FL_315},
{"SVIDEO+CVBS", CRT2_TV, TV_AVIDEO|TV_SVIDEO, FL_300|FL_315},
{"CVBS+SVIDEO", CRT2_TV, TV_AVIDEO|TV_SVIDEO, FL_300|FL_315},
{"SCART", CRT2_TV, TV_SCART, FL_300|FL_315},
{"HIVISION", CRT2_TV, TV_HIVISION, FL_315},
{"YPBPR480I", CRT2_TV, TV_YPBPR|TV_YPBPR525I, FL_315},
{"YPBPR480P", CRT2_TV, TV_YPBPR|TV_YPBPR525P, FL_315},
{"YPBPR720P", CRT2_TV, TV_YPBPR|TV_YPBPR750P, FL_315},
{"YPBPR1080I", CRT2_TV, TV_YPBPR|TV_YPBPR1080I, FL_315},
{"DSTN", CRT2_LCD, -1, FL_315|FL_550_DSTN},
{"FSTN", CRT2_LCD, -1, FL_315|FL_550_FSTN},
{"\0", -1, -1, 0}
};
/* TV standard */
static struct _sis_tvtype {
char name[6];
u32 type_no;
} sis_tvtype[] __initdata = {
{"PAL", TV_PAL},
{"NTSC", TV_NTSC},
{"PALM", TV_PAL|TV_PALM},
{"PALN", TV_PAL|TV_PALN},
{"NTSCJ", TV_NTSC|TV_NTSCJ},
{"\0", -1}
};
static const struct _sis_vrate {
u16 idx;
u16 xres;
u16 yres;
u16 refresh;
bool SiS730valid32bpp;
} sisfb_vrate[] = {
{1, 320, 200, 70, true},
{1, 320, 240, 60, true},
{1, 400, 300, 60, true},
{1, 512, 384, 60, true},
{1, 640, 400, 72, true},
{1, 640, 480, 60, true}, {2, 640, 480, 72, true}, {3, 640, 480, 75, true},
{4, 640, 480, 85, true}, {5, 640, 480, 100, true}, {6, 640, 480, 120, true},
{7, 640, 480, 160, true}, {8, 640, 480, 200, true},
{1, 720, 480, 60, true},
{1, 720, 576, 58, true},
{1, 768, 576, 58, true},
{1, 800, 480, 60, true}, {2, 800, 480, 75, true}, {3, 800, 480, 85, true},
{1, 800, 600, 56, true}, {2, 800, 600, 60, true}, {3, 800, 600, 72, true},
{4, 800, 600, 75, true}, {5, 800, 600, 85, true}, {6, 800, 600, 105, true},
{7, 800, 600, 120, true}, {8, 800, 600, 160, true},
{1, 848, 480, 39, true}, {2, 848, 480, 60, true},
{1, 856, 480, 39, true}, {2, 856, 480, 60, true},
{1, 960, 540, 60, true},
{1, 960, 600, 60, true},
{1, 1024, 576, 60, true}, {2, 1024, 576, 75, true}, {3, 1024, 576, 85, true},
{1, 1024, 600, 60, true},
{1, 1024, 768, 43, true}, {2, 1024, 768, 60, true}, {3, 1024, 768, 70, false},
{4, 1024, 768, 75, false}, {5, 1024, 768, 85, true}, {6, 1024, 768, 100, true},
{7, 1024, 768, 120, true},
{1, 1152, 768, 60, true},
{1, 1152, 864, 60, true}, {2, 1152, 864, 75, true}, {3, 1152, 864, 84, true},
{1, 1280, 720, 60, true}, {2, 1280, 720, 75, true}, {3, 1280, 720, 85, true},
{1, 1280, 768, 60, true},
{1, 1280, 800, 60, true},
{1, 1280, 854, 60, true},
{1, 1280, 960, 60, true}, {2, 1280, 960, 85, true},
{1, 1280, 1024, 43, true}, {2, 1280, 1024, 60, true}, {3, 1280, 1024, 75, true},
{4, 1280, 1024, 85, true},
{1, 1360, 768, 60, true},
{1, 1360, 1024, 59, true},
{1, 1400, 1050, 60, true}, {2, 1400, 1050, 75, true},
{1, 1600, 1200, 60, true}, {2, 1600, 1200, 65, true}, {3, 1600, 1200, 70, true},
{4, 1600, 1200, 75, true}, {5, 1600, 1200, 85, true}, {6, 1600, 1200, 100, true},
{7, 1600, 1200, 120, true},
{1, 1680, 1050, 60, true},
{1, 1920, 1080, 30, true},
{1, 1920, 1440, 60, true}, {2, 1920, 1440, 65, true}, {3, 1920, 1440, 70, true},
{4, 1920, 1440, 75, true}, {5, 1920, 1440, 85, true}, {6, 1920, 1440, 100, true},
{1, 2048, 1536, 60, true}, {2, 2048, 1536, 65, true}, {3, 2048, 1536, 70, true},
{4, 2048, 1536, 75, true}, {5, 2048, 1536, 85, true},
{0, 0, 0, 0, false}
};
static struct _sisfbddcsmodes {
u32 mask;
u16 h;
u16 v;
u32 d;
} sisfb_ddcsmodes[] = {
{ 0x10000, 67, 75, 108000},
{ 0x08000, 48, 72, 50000},
{ 0x04000, 46, 75, 49500},
{ 0x01000, 35, 43, 44900},
{ 0x00800, 48, 60, 65000},
{ 0x00400, 56, 70, 75000},
{ 0x00200, 60, 75, 78800},
{ 0x00100, 80, 75, 135000},
{ 0x00020, 31, 60, 25200},
{ 0x00008, 38, 72, 31500},
{ 0x00004, 37, 75, 31500},
{ 0x00002, 35, 56, 36000},
{ 0x00001, 38, 60, 40000}
};
static struct _sisfbddcfmodes {
u16 x;
u16 y;
u16 v;
u16 h;
u32 d;
} sisfb_ddcfmodes[] = {
{ 1280, 1024, 85, 92, 157500},
{ 1600, 1200, 60, 75, 162000},
{ 1600, 1200, 65, 82, 175500},
{ 1600, 1200, 70, 88, 189000},
{ 1600, 1200, 75, 94, 202500},
{ 1600, 1200, 85, 107,229500},
{ 1920, 1440, 60, 90, 234000},
{ 1920, 1440, 75, 113,297000}
};
#ifdef CONFIG_FB_SIS_300
static struct _chswtable {
u16 subsysVendor;
u16 subsysCard;
char *vendorName;
char *cardName;
} mychswtable[] = {
{ 0x1631, 0x1002, "Mitachi", "0x1002" },
{ 0x1071, 0x7521, "Mitac" , "7521P" },
{ 0, 0, "" , "" }
};
#endif
static struct _customttable {
u16 chipID;
char *biosversion;
char *biosdate;
u32 bioschksum;
u16 biosFootprintAddr[5];
u8 biosFootprintData[5];
u16 pcisubsysvendor;
u16 pcisubsyscard;
char *vendorName;
char *cardName;
u32 SpecialID;
char *optionName;
} mycustomttable[] = {
{ SIS_630, "2.00.07", "09/27/2002-13:38:25",
0x3240A8,
{ 0x220, 0x227, 0x228, 0x229, 0x0ee },
{ 0x01, 0xe3, 0x9a, 0x6a, 0xef },
0x1039, 0x6300,
"Barco", "iQ R200L/300/400", CUT_BARCO1366, "BARCO_1366"
},
{ SIS_630, "2.00.07", "09/27/2002-13:38:25",
0x323FBD,
{ 0x220, 0x227, 0x228, 0x229, 0x0ee },
{ 0x00, 0x5a, 0x64, 0x41, 0xef },
0x1039, 0x6300,
"Barco", "iQ G200L/300/400/500", CUT_BARCO1024, "BARCO_1024"
},
{ SIS_650, "", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x0e11, 0x083c,
"Inventec (Compaq)", "3017cl/3045US", CUT_COMPAQ12802, "COMPAQ_1280"
},
{ SIS_650, "", "",
0,
{ 0x00c, 0, 0, 0, 0 },
{ 'e' , 0, 0, 0, 0 },
0x1558, 0x0287,
"Clevo", "L285/L287 (Version 1)", CUT_CLEVO1024, "CLEVO_L28X_1"
},
{ SIS_650, "", "",
0,
{ 0x00c, 0, 0, 0, 0 },
{ 'y' , 0, 0, 0, 0 },
0x1558, 0x0287,
"Clevo", "L285/L287 (Version 2)", CUT_CLEVO10242, "CLEVO_L28X_2"
},
{ SIS_650, "", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1558, 0x0400, /* possibly 401 and 402 as well; not panelsize specific (?) */
"Clevo", "D400S/D410S/D400H/D410H", CUT_CLEVO1400, "CLEVO_D4X0"
},
{ SIS_650, "", "",
0, /* Shift LCD in LCD-via-CRT1 mode */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1558, 0x2263,
"Clevo", "D22ES/D27ES", CUT_UNIWILL1024, "CLEVO_D2X0ES"
},
{ SIS_650, "", "",
0, /* Shift LCD in LCD-via-CRT1 mode */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1734, 0x101f,
"Uniwill", "N243S9", CUT_UNIWILL1024, "UNIWILL_N243S9"
},
{ SIS_650, "", "",
0, /* Shift LCD in LCD-via-CRT1 mode */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1584, 0x5103,
"Uniwill", "N35BS1", CUT_UNIWILL10242, "UNIWILL_N35BS1"
},
{ SIS_650, "1.09.2c", "", /* Other versions, too? */
0, /* Shift LCD in LCD-via-CRT1 mode */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1019, 0x0f05,
"ECS", "A928", CUT_UNIWILL1024, "ECS_A928"
},
{ SIS_740, "1.11.27a", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1043, 0x1612,
"Asus", "L3000D/L3500D", CUT_ASUSL3000D, "ASUS_L3X00"
},
{ SIS_650, "1.10.9k", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1025, 0x0028,
"Acer", "Aspire 1700", CUT_ACER1280, "ACER_ASPIRE1700"
},
{ SIS_650, "1.10.7w", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x14c0, 0x0012,
"Compal", "??? (V1)", CUT_COMPAL1400_1, "COMPAL_1400_1"
},
{ SIS_650, "1.10.7x", "",
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x14c0, 0x0012,
"Compal", "??? (V2)", CUT_COMPAL1400_2, "COMPAL_1400_2"
},
{ SIS_650, "1.10.8o", "",
0, /* For EMI (unknown) */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1043, 0x1612,
"Asus", "A2H (V1)", CUT_ASUSA2H_1, "ASUS_A2H_1"
},
{ SIS_650, "1.10.8q", "",
0, /* For EMI */
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0x1043, 0x1612,
"Asus", "A2H (V2)", CUT_ASUSA2H_2, "ASUS_A2H_2"
},
{ 4321, "", "", /* never autodetected */
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0, 0,
"Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480"
},
{ 4322, "", "", /* never autodetected */
0,
{ 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0 },
0, 0,
"Generic", "LVDS/Parallel 856x480", CUT_PANEL856, "PANEL856x480"
},
{ 0, "", "",
0,
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
0, 0,
"", "", CUT_NONE, ""
}
};
#endif
linux-7.2.3/drivers/video/fbdev/sis/vgatypes.h
+97
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@@ -0,0 +1,97 @@
/* $XFree86$ */
/* $XdotOrg$ */
/*
* General type definitions for universal mode switching modules
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
#ifndef _VGATYPES_H_
#define _VGATYPES_H_
#define SISIOMEMTYPE
typedef unsigned long SISIOADDRESS;
#include <linux/types.h> /* Need __iomem */
#undef SISIOMEMTYPE
#define SISIOMEMTYPE __iomem
typedef enum _SIS_CHIP_TYPE {
SIS_VGALegacy = 0,
SIS_530,
SIS_OLD,
SIS_300,
SIS_630,
SIS_730,
SIS_540,
SIS_315H, /* SiS 310 */
SIS_315,
SIS_315PRO, /* SiS 325 */
SIS_550,
SIS_650,
SIS_740,
SIS_330,
SIS_661,
SIS_741,
SIS_670,
SIS_660 = 35,
SIS_760,
SIS_761,
SIS_762,
SIS_770,
SIS_340 = 55,
SIS_341,
SIS_342,
XGI_20 = 75,
XGI_21,
XGI_40,
MAX_SIS_CHIP
} SIS_CHIP_TYPE;
#endif
linux-7.2.3/drivers/video/fbdev/sis/vstruct.h
+551
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@@ -0,0 +1,551 @@
/* $XFree86$ */
/* $XdotOrg$ */
/*
* General structure definitions for universal mode switching modules
*
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
*
* * This program is free software; you can redistribute it and/or modify
* * it under the terms of the GNU General Public License as published by
* * the Free Software Foundation; either version 2 of the named License,
* * or any later version.
* *
* * This program is distributed in the hope that it will be useful,
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* * GNU General Public License for more details.
* *
* * You should have received a copy of the GNU General Public License
* * along with this program; if not, write to the Free Software
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Otherwise, the following license terms apply:
*
* * Redistribution and use in source and binary forms, with or without
* * modification, are permitted provided that the following conditions
* * are met:
* * 1) Redistributions of source code must retain the above copyright
* * notice, this list of conditions and the following disclaimer.
* * 2) Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in the
* * documentation and/or other materials provided with the distribution.
* * 3) The name of the author may not be used to endorse or promote products
* * derived from this software without specific prior written permission.
* *
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*
*/
#ifndef _VSTRUCT_H_
#define _VSTRUCT_H_
struct SiS_PanelDelayTbl {
unsigned char timer[2];
};
struct SiS_LCDData {
unsigned short RVBHCMAX;
unsigned short RVBHCFACT;
unsigned short VGAHT;
unsigned short VGAVT;
unsigned short LCDHT;
unsigned short LCDVT;
};
struct SiS_TVData {
unsigned short RVBHCMAX;
unsigned short RVBHCFACT;
unsigned short VGAHT;
unsigned short VGAVT;
unsigned short TVHDE;
unsigned short TVVDE;
unsigned short RVBHRS;
unsigned char FlickerMode;
unsigned short HALFRVBHRS;
unsigned short RVBHRS2;
unsigned char RY1COE;
unsigned char RY2COE;
unsigned char RY3COE;
unsigned char RY4COE;
};
struct SiS_LVDSData {
unsigned short VGAHT;
unsigned short VGAVT;
unsigned short LCDHT;
unsigned short LCDVT;
};
struct SiS_LVDSDes {
unsigned short LCDHDES;
unsigned short LCDVDES;
};
struct SiS_LVDSCRT1Data {
unsigned char CR[15];
};
struct SiS_CHTVRegData {
unsigned char Reg[16];
};
struct SiS_St {
unsigned char St_ModeID;
unsigned short St_ModeFlag;
unsigned char St_StTableIndex;
unsigned char St_CRT2CRTC;
unsigned char St_ResInfo;
unsigned char VB_StTVFlickerIndex;
unsigned char VB_StTVEdgeIndex;
unsigned char VB_StTVYFilterIndex;
unsigned char St_PDC;
};
struct SiS_VBMode {
unsigned char ModeID;
unsigned char VB_TVDelayIndex;
unsigned char VB_TVFlickerIndex;
unsigned char VB_TVPhaseIndex;
unsigned char VB_TVYFilterIndex;
unsigned char VB_LCDDelayIndex;
unsigned char _VB_LCDHIndex;
unsigned char _VB_LCDVIndex;
};
struct SiS_StandTable_S {
unsigned char CRT_COLS;
unsigned char ROWS;
unsigned char CHAR_HEIGHT;
unsigned short CRT_LEN;
unsigned char SR[4];
unsigned char MISC;
unsigned char CRTC[0x19];
unsigned char ATTR[0x14];
unsigned char GRC[9];
};
struct SiS_Ext {
unsigned char Ext_ModeID;
unsigned short Ext_ModeFlag;
unsigned short Ext_VESAID;
unsigned char Ext_RESINFO;
unsigned char VB_ExtTVFlickerIndex;
unsigned char VB_ExtTVEdgeIndex;
unsigned char VB_ExtTVYFilterIndex;
unsigned char VB_ExtTVYFilterIndexROM661;
unsigned char REFindex;
signed char ROMMODEIDX661;
};
struct SiS_Ext2 {
unsigned short Ext_InfoFlag;
unsigned char Ext_CRT1CRTC;
unsigned char Ext_CRTVCLK;
unsigned char Ext_CRT2CRTC;
unsigned char Ext_CRT2CRTC_NS;
unsigned char ModeID;
unsigned short XRes;
unsigned short YRes;
unsigned char Ext_PDC;
unsigned char Ext_FakeCRT2CRTC;
unsigned char Ext_FakeCRT2Clk;
unsigned char Ext_CRT1CRTC_NORM;
unsigned char Ext_CRTVCLK_NORM;
unsigned char Ext_CRT1CRTC_WIDE;
unsigned char Ext_CRTVCLK_WIDE;
};
struct SiS_Part2PortTbl {
unsigned char CR[12];
};
struct SiS_CRT1Table {
unsigned char CR[17];
};
struct SiS_MCLKData {
unsigned char SR28,SR29,SR2A;
unsigned short CLOCK;
};
struct SiS_VCLKData {
unsigned char SR2B,SR2C;
unsigned short CLOCK;
};
struct SiS_VBVCLKData {
unsigned char Part4_A,Part4_B;
unsigned short CLOCK;
};
struct SiS_StResInfo_S {
unsigned short HTotal;
unsigned short VTotal;
};
struct SiS_ModeResInfo_S {
unsigned short HTotal;
unsigned short VTotal;
unsigned char XChar;
unsigned char YChar;
};
/* Defines for SiS_CustomT */
/* Never change these for sisfb compatibility */
#define CUT_NONE 0
#define CUT_FORCENONE 1
#define CUT_BARCO1366 2
#define CUT_BARCO1024 3
#define CUT_COMPAQ1280 4
#define CUT_COMPAQ12802 5
#define CUT_PANEL848 6
#define CUT_CLEVO1024 7
#define CUT_CLEVO10242 8
#define CUT_CLEVO1400 9
#define CUT_CLEVO14002 10
#define CUT_UNIWILL1024 11
#define CUT_ASUSL3000D 12
#define CUT_UNIWILL10242 13
#define CUT_ACER1280 14
#define CUT_COMPAL1400_1 15
#define CUT_COMPAL1400_2 16
#define CUT_ASUSA2H_1 17
#define CUT_ASUSA2H_2 18
#define CUT_UNKNOWNLCD 19
#define CUT_AOP8060 20
#define CUT_PANEL856 21
struct SiS_Private
{
unsigned char ChipType;
unsigned char ChipRevision;
void *ivideo;
unsigned char *VirtualRomBase;
bool UseROM;
unsigned char SISIOMEMTYPE *VideoMemoryAddress;
unsigned int VideoMemorySize;
SISIOADDRESS IOAddress;
SISIOADDRESS IOAddress2; /* For dual chip XGI volari */
SISIOADDRESS RelIO;
SISIOADDRESS SiS_P3c4;
SISIOADDRESS SiS_P3d4;
SISIOADDRESS SiS_P3c0;
SISIOADDRESS SiS_P3ce;
SISIOADDRESS SiS_P3c2;
SISIOADDRESS SiS_P3ca;
SISIOADDRESS SiS_P3c6;
SISIOADDRESS SiS_P3c7;
SISIOADDRESS SiS_P3c8;
SISIOADDRESS SiS_P3c9;
SISIOADDRESS SiS_P3cb;
SISIOADDRESS SiS_P3cc;
SISIOADDRESS SiS_P3cd;
SISIOADDRESS SiS_P3da;
SISIOADDRESS SiS_Part1Port;
SISIOADDRESS SiS_Part2Port;
SISIOADDRESS SiS_Part3Port;
SISIOADDRESS SiS_Part4Port;
SISIOADDRESS SiS_Part5Port;
SISIOADDRESS SiS_VidCapt;
SISIOADDRESS SiS_VidPlay;
unsigned short SiS_IF_DEF_LVDS;
unsigned short SiS_IF_DEF_CH70xx;
unsigned short SiS_IF_DEF_CONEX;
unsigned short SiS_IF_DEF_TRUMPION;
unsigned short SiS_IF_DEF_DSTN;
unsigned short SiS_IF_DEF_FSTN;
unsigned short SiS_SysFlags;
unsigned char SiS_VGAINFO;
bool SiS_UseROM;
bool SiS_ROMNew;
bool SiS_XGIROM;
bool SiS_NeedRomModeData;
bool PanelSelfDetected;
bool DDCPortMixup;
int SiS_CHOverScan;
bool SiS_CHSOverScan;
bool SiS_ChSW;
bool SiS_UseLCDA;
int SiS_UseOEM;
unsigned int SiS_CustomT;
int SiS_UseWide, SiS_UseWideCRT2;
int SiS_TVBlue;
unsigned short SiS_Backup70xx;
bool HaveEMI;
bool HaveEMILCD;
bool OverruleEMI;
unsigned char EMI_30,EMI_31,EMI_32,EMI_33;
unsigned short SiS_EMIOffset;
unsigned short SiS_PWDOffset;
short PDC, PDCA;
unsigned char SiS_MyCR63;
unsigned short SiS_CRT1Mode;
unsigned short SiS_flag_clearbuffer;
int SiS_RAMType;
unsigned char SiS_ChannelAB;
unsigned char SiS_DataBusWidth;
unsigned short SiS_ModeType;
unsigned short SiS_VBInfo;
unsigned short SiS_TVMode;
unsigned short SiS_LCDResInfo;
unsigned short SiS_LCDTypeInfo;
unsigned short SiS_LCDInfo;
unsigned short SiS_LCDInfo661;
unsigned short SiS_VBType;
unsigned short SiS_VBExtInfo;
unsigned short SiS_YPbPr;
unsigned short SiS_SelectCRT2Rate;
unsigned short SiS_SetFlag;
unsigned short SiS_RVBHCFACT;
unsigned short SiS_RVBHCMAX;
unsigned short SiS_RVBHRS;
unsigned short SiS_RVBHRS2;
unsigned short SiS_VGAVT;
unsigned short SiS_VGAHT;
unsigned short SiS_VT;
unsigned short SiS_HT;
unsigned short SiS_VGAVDE;
unsigned short SiS_VGAHDE;
unsigned short SiS_VDE;
unsigned short SiS_HDE;
unsigned short SiS_NewFlickerMode;
unsigned short SiS_RY1COE;
unsigned short SiS_RY2COE;
unsigned short SiS_RY3COE;
unsigned short SiS_RY4COE;
unsigned short SiS_LCDHDES;
unsigned short SiS_LCDVDES;
SISIOADDRESS SiS_DDC_Port;
unsigned short SiS_DDC_Index;
unsigned short SiS_DDC_Data;
unsigned short SiS_DDC_NData;
unsigned short SiS_DDC_Clk;
unsigned short SiS_DDC_NClk;
unsigned short SiS_DDC_DeviceAddr;
unsigned short SiS_DDC_ReadAddr;
unsigned short SiS_DDC_SecAddr;
unsigned short SiS_ChrontelInit;
bool SiS_SensibleSR11;
unsigned short SiS661LCD2TableSize;
unsigned short SiS_PanelMinLVDS;
unsigned short SiS_PanelMin301;
const struct SiS_St *SiS_SModeIDTable;
const struct SiS_StandTable_S *SiS_StandTable;
const struct SiS_Ext *SiS_EModeIDTable;
const struct SiS_Ext2 *SiS_RefIndex;
const struct SiS_VBMode *SiS_VBModeIDTable;
const struct SiS_CRT1Table *SiS_CRT1Table;
const struct SiS_MCLKData *SiS_MCLKData_0;
const struct SiS_MCLKData *SiS_MCLKData_1;
struct SiS_VCLKData *SiS_VCLKData;
struct SiS_VBVCLKData *SiS_VBVCLKData;
const struct SiS_StResInfo_S *SiS_StResInfo;
const struct SiS_ModeResInfo_S *SiS_ModeResInfo;
const unsigned char *pSiS_OutputSelect;
const unsigned char *pSiS_SoftSetting;
const unsigned char *SiS_SR15;
const struct SiS_PanelDelayTbl *SiS_PanelDelayTbl;
const struct SiS_PanelDelayTbl *SiS_PanelDelayTblLVDS;
/* SiS bridge */
const struct SiS_LCDData *SiS_ExtLCD1024x768Data;
const struct SiS_LCDData *SiS_St2LCD1024x768Data;
const struct SiS_LCDData *SiS_LCD1280x720Data;
const struct SiS_LCDData *SiS_StLCD1280x768_2Data;
const struct SiS_LCDData *SiS_ExtLCD1280x768_2Data;
const struct SiS_LCDData *SiS_LCD1280x800Data;
const struct SiS_LCDData *SiS_LCD1280x800_2Data;
const struct SiS_LCDData *SiS_LCD1280x854Data;
const struct SiS_LCDData *SiS_LCD1280x960Data;
const struct SiS_LCDData *SiS_ExtLCD1280x1024Data;
const struct SiS_LCDData *SiS_St2LCD1280x1024Data;
const struct SiS_LCDData *SiS_StLCD1400x1050Data;
const struct SiS_LCDData *SiS_ExtLCD1400x1050Data;
const struct SiS_LCDData *SiS_StLCD1600x1200Data;
const struct SiS_LCDData *SiS_ExtLCD1600x1200Data;
const struct SiS_LCDData *SiS_LCD1680x1050Data;
const struct SiS_LCDData *SiS_NoScaleData;
const struct SiS_TVData *SiS_StPALData;
const struct SiS_TVData *SiS_ExtPALData;
const struct SiS_TVData *SiS_StNTSCData;
const struct SiS_TVData *SiS_ExtNTSCData;
const struct SiS_TVData *SiS_St1HiTVData;
const struct SiS_TVData *SiS_St2HiTVData;
const struct SiS_TVData *SiS_ExtHiTVData;
const struct SiS_TVData *SiS_St525iData;
const struct SiS_TVData *SiS_St525pData;
const struct SiS_TVData *SiS_St750pData;
const struct SiS_TVData *SiS_Ext525iData;
const struct SiS_TVData *SiS_Ext525pData;
const struct SiS_TVData *SiS_Ext750pData;
const unsigned char *SiS_NTSCTiming;
const unsigned char *SiS_PALTiming;
const unsigned char *SiS_HiTVExtTiming;
const unsigned char *SiS_HiTVSt1Timing;
const unsigned char *SiS_HiTVSt2Timing;
const unsigned char *SiS_HiTVGroup3Data;
const unsigned char *SiS_HiTVGroup3Simu;
#if 0
const unsigned char *SiS_HiTVTextTiming;
const unsigned char *SiS_HiTVGroup3Text;
#endif
const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_1;
const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_2;
const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_3;
/* LVDS, Chrontel */
const struct SiS_LVDSData *SiS_LVDS320x240Data_1;
const struct SiS_LVDSData *SiS_LVDS320x240Data_2;
const struct SiS_LVDSData *SiS_LVDS640x480Data_1;
const struct SiS_LVDSData *SiS_LVDS800x600Data_1;
const struct SiS_LVDSData *SiS_LVDS1024x600Data_1;
const struct SiS_LVDSData *SiS_LVDS1024x768Data_1;
const struct SiS_LVDSData *SiS_LVDSBARCO1366Data_1;
const struct SiS_LVDSData *SiS_LVDSBARCO1366Data_2;
const struct SiS_LVDSData *SiS_LVDSBARCO1024Data_1;
const struct SiS_LVDSData *SiS_LVDS848x480Data_1;
const struct SiS_LVDSData *SiS_LVDS848x480Data_2;
const struct SiS_LVDSData *SiS_CHTVUNTSCData;
const struct SiS_LVDSData *SiS_CHTVONTSCData;
const struct SiS_LVDSData *SiS_CHTVUPALData;
const struct SiS_LVDSData *SiS_CHTVOPALData;
const struct SiS_LVDSData *SiS_CHTVUPALMData;
const struct SiS_LVDSData *SiS_CHTVOPALMData;
const struct SiS_LVDSData *SiS_CHTVUPALNData;
const struct SiS_LVDSData *SiS_CHTVOPALNData;
const struct SiS_LVDSData *SiS_CHTVSOPALData;
const struct SiS_LVDSDes *SiS_PanelType04_1a;
const struct SiS_LVDSDes *SiS_PanelType04_2a;
const struct SiS_LVDSDes *SiS_PanelType04_1b;
const struct SiS_LVDSDes *SiS_PanelType04_2b;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_1;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_2;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_2_H;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_3;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_3_H;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1640x480_1;
const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1640x480_1_H;
const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1UNTSC;
const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1ONTSC;
const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1UPAL;
const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1OPAL;
const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1SOPAL;
const struct SiS_CHTVRegData *SiS_CHTVReg_UNTSC;
const struct SiS_CHTVRegData *SiS_CHTVReg_ONTSC;
const struct SiS_CHTVRegData *SiS_CHTVReg_UPAL;
const struct SiS_CHTVRegData *SiS_CHTVReg_OPAL;
const struct SiS_CHTVRegData *SiS_CHTVReg_UPALM;
const struct SiS_CHTVRegData *SiS_CHTVReg_OPALM;
const struct SiS_CHTVRegData *SiS_CHTVReg_UPALN;
const struct SiS_CHTVRegData *SiS_CHTVReg_OPALN;
const struct SiS_CHTVRegData *SiS_CHTVReg_SOPAL;
const unsigned char *SiS_CHTVVCLKUNTSC;
const unsigned char *SiS_CHTVVCLKONTSC;
const unsigned char *SiS_CHTVVCLKUPAL;
const unsigned char *SiS_CHTVVCLKOPAL;
const unsigned char *SiS_CHTVVCLKUPALM;
const unsigned char *SiS_CHTVVCLKOPALM;
const unsigned char *SiS_CHTVVCLKUPALN;
const unsigned char *SiS_CHTVVCLKOPALN;
const unsigned char *SiS_CHTVVCLKSOPAL;
unsigned short PanelXRes, PanelHT;
unsigned short PanelYRes, PanelVT;
unsigned short PanelHRS, PanelHRE;
unsigned short PanelVRS, PanelVRE;
unsigned short PanelVCLKIdx300;
unsigned short PanelVCLKIdx315;
bool Alternate1600x1200;
bool UseCustomMode;
bool CRT1UsesCustomMode;
unsigned short CHDisplay;
unsigned short CHSyncStart;
unsigned short CHSyncEnd;
unsigned short CHTotal;
unsigned short CHBlankStart;
unsigned short CHBlankEnd;
unsigned short CVDisplay;
unsigned short CVSyncStart;
unsigned short CVSyncEnd;
unsigned short CVTotal;
unsigned short CVBlankStart;
unsigned short CVBlankEnd;
unsigned int CDClock;
unsigned int CFlags;
unsigned char CCRT1CRTC[17];
unsigned char CSR2B;
unsigned char CSR2C;
unsigned short CSRClock;
unsigned short CSRClock_CRT1;
unsigned short CModeFlag;
unsigned short CModeFlag_CRT1;
unsigned short CInfoFlag;
int LVDSHL;
bool Backup;
unsigned char Backup_Mode;
unsigned char Backup_14;
unsigned char Backup_15;
unsigned char Backup_16;
unsigned char Backup_17;
unsigned char Backup_18;
unsigned char Backup_19;
unsigned char Backup_1a;
unsigned char Backup_1b;
unsigned char Backup_1c;
unsigned char Backup_1d;
unsigned char Init_P4_0E;
int UsePanelScaler;
int CenterScreen;
unsigned short CP_Vendor, CP_Product;
bool CP_HaveCustomData;
int CP_PreferredX, CP_PreferredY, CP_PreferredIndex;
int CP_MaxX, CP_MaxY, CP_MaxClock;
unsigned char CP_PrefSR2B, CP_PrefSR2C;
unsigned short CP_PrefClock;
bool CP_Supports64048075;
int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */
int CP_HTotal[7], CP_VTotal[7];
int CP_HSyncStart[7], CP_VSyncStart[7];
int CP_HSyncEnd[7], CP_VSyncEnd[7];
int CP_HBlankStart[7], CP_VBlankStart[7];
int CP_HBlankEnd[7], CP_VBlankEnd[7];
int CP_Clock[7];
bool CP_DataValid[7];
bool CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7];
};
#endif