Resguardo inicial

This commit is contained in:
lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Device Tree binding constants for the ACT8865 PMIC regulators
*/
#ifndef _DT_BINDINGS_REGULATOR_ACT8865_H
#define _DT_BINDINGS_REGULATOR_ACT8865_H
/*
* These constants should be used to specify regulator modes in device tree for
* ACT8865 regulators as follows:
* ACT8865_REGULATOR_MODE_FIXED: It is specific to DCDC regulators and it
* specifies the usage of fixed-frequency
* PWM.
*
* ACT8865_REGULATOR_MODE_NORMAL: It is specific to LDO regulators and it
* specifies the usage of normal mode.
*
* ACT8865_REGULATOR_MODE_LOWPOWER: For DCDC and LDO regulators; it specify
* the usage of proprietary power-saving
* mode.
*/
#define ACT8865_REGULATOR_MODE_FIXED 1
#define ACT8865_REGULATOR_MODE_NORMAL 2
#define ACT8865_REGULATOR_MODE_LOWPOWER 3
#endif
@@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2018 Microchip Technology, Inc. All rights reserved.
*
* Device Tree binding constants for the ACT8945A PMIC regulators
*/
#ifndef _DT_BINDINGS_REGULATOR_ACT8945A_H
#define _DT_BINDINGS_REGULATOR_ACT8945A_H
/*
* These constants should be used to specify regulator modes in device tree for
* ACT8945A regulators as follows:
* ACT8945A_REGULATOR_MODE_FIXED: It is specific to DCDC regulators and it
* specifies the usage of fixed-frequency
* PWM.
*
* ACT8945A_REGULATOR_MODE_NORMAL: It is specific to LDO regulators and it
* specifies the usage of normal mode.
*
* ACT8945A_REGULATOR_MODE_LOWPOWER: For DCDC and LDO regulators; it specify
* the usage of proprietary power-saving
* mode.
*/
#define ACT8945A_REGULATOR_MODE_FIXED 1
#define ACT8945A_REGULATOR_MODE_NORMAL 2
#define ACT8945A_REGULATOR_MODE_LOWPOWER 3
#endif
@@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_REGULATOR_DLG_DA9063_H
#define _DT_BINDINGS_REGULATOR_DLG_DA9063_H
/*
* These buck mode constants may be used to specify values in device tree
* properties (e.g. regulator-initial-mode).
* A description of the following modes is in the manufacturers datasheet.
*/
#define DA9063_BUCK_MODE_SLEEP 1
#define DA9063_BUCK_MODE_SYNC 2
#define DA9063_BUCK_MODE_AUTO 3
#endif
@@ -0,0 +1,22 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef _DT_BINDINGS_REGULATOR_DLG_DA9121_H
#define _DT_BINDINGS_REGULATOR_DLG_DA9121_H
/*
* These buck mode constants may be used to specify values in device tree
* properties (e.g. regulator-initial-mode).
* A description of the following modes is in the manufacturers datasheet.
*/
#define DA9121_BUCK_MODE_FORCE_PFM 0
#define DA9121_BUCK_MODE_FORCE_PWM 1
#define DA9121_BUCK_MODE_FORCE_PWM_SHEDDING 2
#define DA9121_BUCK_MODE_AUTO 3
#define DA9121_BUCK_RIPPLE_CANCEL_NONE 0
#define DA9121_BUCK_RIPPLE_CANCEL_SMALL 1
#define DA9121_BUCK_RIPPLE_CANCEL_MID 2
#define DA9121_BUCK_RIPPLE_CANCEL_LARGE 3
#endif
@@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_REGULATOR_DLG_DA9211_H
#define _DT_BINDINGS_REGULATOR_DLG_DA9211_H
/*
* These buck mode constants may be used to specify values in device tree
* properties (e.g. regulator-initial-mode, regulator-allowed-modes).
* A description of the following modes is in the manufacturers datasheet.
*/
#define DA9211_BUCK_MODE_SLEEP 1
#define DA9211_BUCK_MODE_SYNC 2
#define DA9211_BUCK_MODE_AUTO 3
#endif
@@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2014 Google, Inc
*
* Device Tree binding constants for the Maxim 77802 PMIC regulators
*/
#ifndef _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
/* Regulator operating modes */
#define MAX77802_OPMODE_LP 1
#define MAX77802_OPMODE_NORMAL 3
#endif /* _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H */
@@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_MEDIATEK_MT6360_REGULATOR_H__
#define __DT_BINDINGS_MEDIATEK_MT6360_REGULATOR_H__
/*
* BUCK/LDO mode constants which may be used in devicetree properties
* (eg. regulator-allowed-modes).
* See the manufacturer's datasheet for more information on these modes.
*/
#define MT6360_OPMODE_LP 2
#define MT6360_OPMODE_ULP 3
#define MT6360_OPMODE_NORMAL 0
#endif
@@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_REGULATOR_MEDIATEK_MT6397_H_
#define _DT_BINDINGS_REGULATOR_MEDIATEK_MT6397_H_
/*
* Buck mode constants which may be used in devicetree properties (eg.
* regulator-initial-mode, regulator-allowed-modes).
* See the manufacturer's datasheet for more information on these modes.
*/
#define MT6397_BUCK_MODE_AUTO 0
#define MT6397_BUCK_MODE_FORCE_PWM 1
#endif
@@ -0,0 +1,18 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Device Tree binding constants for the NXP PCA9450A/B/C PMIC regulators
*/
#ifndef _DT_BINDINGS_REGULATORS_NXP_PCA9450_H
#define _DT_BINDINGS_REGULATORS_NXP_PCA9450_H
/*
* Buck mode constants which may be used in devicetree properties (eg.
* regulator-initial-mode, regulator-allowed-modes).
* See the manufacturer's datasheet for more information on these modes.
*/
#define PCA9450_BUCK_MODE_AUTO 0
#define PCA9450_BUCK_MODE_FORCE_PWM 1
#endif
@@ -0,0 +1,36 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
#ifndef __QCOM_RPMH_REGULATOR_H
#define __QCOM_RPMH_REGULATOR_H
/*
* These mode constants may be used to specify modes for various RPMh regulator
* device tree properties (e.g. regulator-initial-mode). Each type of regulator
* supports a subset of the possible modes.
*
* %RPMH_REGULATOR_MODE_RET: Retention mode in which only an extremely small
* load current is allowed. This mode is supported
* by LDO and SMPS type regulators.
* %RPMH_REGULATOR_MODE_LPM: Low power mode in which a small load current is
* allowed. This mode corresponds to PFM for SMPS
* and BOB type regulators. This mode is supported
* by LDO, HFSMPS, BOB, and PMIC4 FTSMPS type
* regulators.
* %RPMH_REGULATOR_MODE_AUTO: Auto mode in which the regulator hardware
* automatically switches between LPM and HPM based
* upon the real-time load current. This mode is
* supported by HFSMPS, BOB, and PMIC4 FTSMPS type
* regulators.
* %RPMH_REGULATOR_MODE_HPM: High power mode in which the full rated current
* of the regulator is allowed. This mode
* corresponds to PWM for SMPS and BOB type
* regulators. This mode is supported by all types
* of regulators.
*/
#define RPMH_REGULATOR_MODE_RET 0
#define RPMH_REGULATOR_MODE_LPM 1
#define RPMH_REGULATOR_MODE_AUTO 2
#define RPMH_REGULATOR_MODE_HPM 3
#endif
@@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_RICHTEK_RT5190A_REGULATOR_H__
#define __DT_BINDINGS_RICHTEK_RT5190A_REGULATOR_H__
/*
* BUCK/LDO mode constants which may be used in devicetree properties
* (eg. regulator-allowed-modes).
* See the manufacturer's datasheet for more information on these modes.
*/
#define RT5190A_OPMODE_AUTO 0
#define RT5190A_OPMODE_FPWM 1
#endif
@@ -0,0 +1,53 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright 2021 Google LLC
* Copyright 2025 Linaro Ltd.
*
* Device Tree binding constants for the Samsung S2MPG1x PMIC regulators
*/
#ifndef _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
#define _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
/*
* Several regulators may be controlled via external signals instead of via
* software. These constants describe the possible signals for such regulators
* and generally correspond to the respecitve on-chip pins.
*
* S2MPG10 regulators supporting these are:
* - buck1m .. buck7m buck10m
* - ldo3m .. ldo19m
*
* ldo20m supports external control, but using a different set of control
* signals.
*
* S2MPG11 regulators supporting these are:
* - buck1s .. buck3s buck5s buck8s buck9s bucka buckd
* - ldo1s ldo2s ldo8s ldo13s
*/
#define S2MPG10_EXTCTRL_PWREN 0 /* PWREN pin */
#define S2MPG10_EXTCTRL_PWREN_MIF 1 /* PWREN_MIF pin */
#define S2MPG10_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
#define S2MPG10_EXTCTRL_CPUCL1_EN 3 /* CPUCL1_EN pin */
#define S2MPG10_EXTCTRL_CPUCL1_EN2 4 /* CPUCL1_EN & PWREN pins */
#define S2MPG10_EXTCTRL_CPUCL2_EN 5 /* CPUCL2_EN pin */
#define S2MPG10_EXTCTRL_CPUCL2_EN2 6 /* CPUCL2_E2 & PWREN pins */
#define S2MPG10_EXTCTRL_TPU_EN 7 /* TPU_EN pin */
#define S2MPG10_EXTCTRL_TPU_EN2 8 /* TPU_EN & ~AP_ACTIVE_N pins */
#define S2MPG10_EXTCTRL_TCXO_ON 9 /* TCXO_ON pin */
#define S2MPG10_EXTCTRL_TCXO_ON2 10 /* TCXO_ON & ~AP_ACTIVE_N pins */
#define S2MPG10_EXTCTRL_LDO20M_EN2 11 /* VLDO20M_EN & LDO20M_SFR */
#define S2MPG10_EXTCTRL_LDO20M_EN 12 /* VLDO20M_EN pin */
#define S2MPG11_EXTCTRL_PWREN 0 /* PWREN pin */
#define S2MPG11_EXTCTRL_PWREN_MIF 1 /* PWREN_MIF pin */
#define S2MPG11_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
#define S2MPG11_EXTCTRL_G3D_EN 3 /* G3D_EN pin */
#define S2MPG11_EXTCTRL_G3D_EN2 4 /* G3D_EN & ~AP_ACTIVE_N pins */
#define S2MPG11_EXTCTRL_AOC_VDD 5 /* AOC_VDD pin */
#define S2MPG11_EXTCTRL_AOC_RET 6 /* AOC_RET pin */
#define S2MPG11_EXTCTRL_UFS_EN 7 /* UFS_EN pin */
#define S2MPG11_EXTCTRL_LDO13S_EN 8 /* VLDO13S_EN pin */
#endif /* _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H */
@@ -0,0 +1,42 @@
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
*/
#ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H
#define __DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H
/* SCMI voltage domains identifiers */
/* SOC Internal regulators */
#define VOLTD_SCMI_REG11 0
#define VOLTD_SCMI_REG18 1
#define VOLTD_SCMI_USB33 2
#define VOLTD_SCMI_SDMMC1_IO 3
#define VOLTD_SCMI_SDMMC2_IO 4
#define VOLTD_SCMI_VREFBUF 5
/* STPMIC1 regulators */
#define VOLTD_SCMI_STPMIC1_BUCK1 6
#define VOLTD_SCMI_STPMIC1_BUCK2 7
#define VOLTD_SCMI_STPMIC1_BUCK3 8
#define VOLTD_SCMI_STPMIC1_BUCK4 9
#define VOLTD_SCMI_STPMIC1_LDO1 10
#define VOLTD_SCMI_STPMIC1_LDO2 11
#define VOLTD_SCMI_STPMIC1_LDO3 12
#define VOLTD_SCMI_STPMIC1_LDO4 13
#define VOLTD_SCMI_STPMIC1_LDO5 14
#define VOLTD_SCMI_STPMIC1_LDO6 15
#define VOLTD_SCMI_STPMIC1_VREFDDR 16
#define VOLTD_SCMI_STPMIC1_BOOST 17
#define VOLTD_SCMI_STPMIC1_PWR_SW1 18
#define VOLTD_SCMI_STPMIC1_PWR_SW2 19
/* External regulators */
#define VOLTD_SCMI_REGU0 20
#define VOLTD_SCMI_REGU1 21
#define VOLTD_SCMI_REGU2 22
#define VOLTD_SCMI_REGU3 23
#define VOLTD_SCMI_REGU4 24
#endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H */
@@ -0,0 +1,40 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (C) 2025, STMicroelectronics - All Rights Reserved
*/
#ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H
#define __DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H
/* SCMI voltage domain identifiers */
/* SOC Internal regulators */
#define VOLTD_SCMI_REG11 0
#define VOLTD_SCMI_REG18 1
#define VOLTD_SCMI_USB33 2
/* STPMIC1 regulators */
#define VOLTD_SCMI_STPMIC1_BUCK1 3
#define VOLTD_SCMI_STPMIC1_BUCK2 4
#define VOLTD_SCMI_STPMIC1_BUCK3 5
#define VOLTD_SCMI_STPMIC1_BUCK4 6
#define VOLTD_SCMI_STPMIC1_LDO1 7
#define VOLTD_SCMI_STPMIC1_LDO2 8
#define VOLTD_SCMI_STPMIC1_LDO3 9
#define VOLTD_SCMI_STPMIC1_LDO4 10
#define VOLTD_SCMI_STPMIC1_LDO5 11
#define VOLTD_SCMI_STPMIC1_LDO6 12
#define VOLTD_SCMI_STPMIC1_VREFDDR 13
#define VOLTD_SCMI_STPMIC1_BOOST 14
#define VOLTD_SCMI_STPMIC1_PWR_SW1 15
#define VOLTD_SCMI_STPMIC1_PWR_SW2 16
#define VOLTD_SCMI_VREFBUF 17
/* External regulators */
#define VOLTD_SCMI_REGU0 18
#define VOLTD_SCMI_REGU1 19
#define VOLTD_SCMI_REGU2 20
#define VOLTD_SCMI_REGU3 21
#define VOLTD_SCMI_REGU4 22
#endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H */
@@ -0,0 +1,48 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (C) 2024, STMicroelectronics - All Rights Reserved
*/
#ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H
#define __DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H
/* SCMI voltage domains identifiers */
/* SOC Internal regulators */
#define VOLTD_SCMI_VDDIO1 0
#define VOLTD_SCMI_VDDIO2 1
#define VOLTD_SCMI_VDDIO3 2
#define VOLTD_SCMI_VDDIO4 3
#define VOLTD_SCMI_VDDIO 4
#define VOLTD_SCMI_UCPD 5
#define VOLTD_SCMI_USB33 6
#define VOLTD_SCMI_ADC 7
#define VOLTD_SCMI_GPU 8
#define VOLTD_SCMI_VREFBUF 9
/* STPMIC2 regulators */
#define VOLTD_SCMI_STPMIC2_BUCK1 10
#define VOLTD_SCMI_STPMIC2_BUCK2 11
#define VOLTD_SCMI_STPMIC2_BUCK3 12
#define VOLTD_SCMI_STPMIC2_BUCK4 13
#define VOLTD_SCMI_STPMIC2_BUCK5 14
#define VOLTD_SCMI_STPMIC2_BUCK6 15
#define VOLTD_SCMI_STPMIC2_BUCK7 16
#define VOLTD_SCMI_STPMIC2_LDO1 17
#define VOLTD_SCMI_STPMIC2_LDO2 18
#define VOLTD_SCMI_STPMIC2_LDO3 19
#define VOLTD_SCMI_STPMIC2_LDO4 20
#define VOLTD_SCMI_STPMIC2_LDO5 21
#define VOLTD_SCMI_STPMIC2_LDO6 22
#define VOLTD_SCMI_STPMIC2_LDO7 23
#define VOLTD_SCMI_STPMIC2_LDO8 24
#define VOLTD_SCMI_STPMIC2_REFDDR 25
/* External regulators */
#define VOLTD_SCMI_REGU0 26
#define VOLTD_SCMI_REGU1 27
#define VOLTD_SCMI_REGU2 28
#define VOLTD_SCMI_REGU3 29
#define VOLTD_SCMI_REGU4 30
#endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H */
@@ -0,0 +1,9 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
#ifndef _DT_BINDINGS_REGULATOR_TI_TPS62864_H
#define _DT_BINDINGS_REGULATOR_TI_TPS62864_H
#define TPS62864_MODE_NORMAL 0
#define TPS62864_MODE_FPWM 1
#endif