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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
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linux-7.2.3/include/linux/mfd/arizona/core.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Arizona MFD internals
*
* Copyright 2012 Wolfson Microelectronics plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*/
#ifndef _WM_ARIZONA_CORE_H
#define _WM_ARIZONA_CORE_H
#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/arizona/pdata.h>
#define ARIZONA_MAX_CORE_SUPPLIES 2
enum {
ARIZONA_MCLK1,
ARIZONA_MCLK2,
ARIZONA_NUM_MCLK
};
enum arizona_type {
WM5102 = 1,
WM5110 = 2,
WM8997 = 3,
WM8280 = 4,
WM8998 = 5,
WM1814 = 6,
WM1831 = 7,
CS47L24 = 8,
};
#define ARIZONA_IRQ_GP1 0
#define ARIZONA_IRQ_GP2 1
#define ARIZONA_IRQ_GP3 2
#define ARIZONA_IRQ_GP4 3
#define ARIZONA_IRQ_GP5_FALL 4
#define ARIZONA_IRQ_GP5_RISE 5
#define ARIZONA_IRQ_JD_FALL 6
#define ARIZONA_IRQ_JD_RISE 7
#define ARIZONA_IRQ_DSP1_RAM_RDY 8
#define ARIZONA_IRQ_DSP2_RAM_RDY 9
#define ARIZONA_IRQ_DSP3_RAM_RDY 10
#define ARIZONA_IRQ_DSP4_RAM_RDY 11
#define ARIZONA_IRQ_DSP_IRQ1 12
#define ARIZONA_IRQ_DSP_IRQ2 13
#define ARIZONA_IRQ_DSP_IRQ3 14
#define ARIZONA_IRQ_DSP_IRQ4 15
#define ARIZONA_IRQ_DSP_IRQ5 16
#define ARIZONA_IRQ_DSP_IRQ6 17
#define ARIZONA_IRQ_DSP_IRQ7 18
#define ARIZONA_IRQ_DSP_IRQ8 19
#define ARIZONA_IRQ_SPK_OVERHEAT_WARN 20
#define ARIZONA_IRQ_SPK_OVERHEAT 21
#define ARIZONA_IRQ_MICDET 22
#define ARIZONA_IRQ_HPDET 23
#define ARIZONA_IRQ_WSEQ_DONE 24
#define ARIZONA_IRQ_DRC2_SIG_DET 25
#define ARIZONA_IRQ_DRC1_SIG_DET 26
#define ARIZONA_IRQ_ASRC2_LOCK 27
#define ARIZONA_IRQ_ASRC1_LOCK 28
#define ARIZONA_IRQ_UNDERCLOCKED 29
#define ARIZONA_IRQ_OVERCLOCKED 30
#define ARIZONA_IRQ_FLL2_LOCK 31
#define ARIZONA_IRQ_FLL1_LOCK 32
#define ARIZONA_IRQ_CLKGEN_ERR 33
#define ARIZONA_IRQ_CLKGEN_ERR_ASYNC 34
#define ARIZONA_IRQ_ASRC_CFG_ERR 35
#define ARIZONA_IRQ_AIF3_ERR 36
#define ARIZONA_IRQ_AIF2_ERR 37
#define ARIZONA_IRQ_AIF1_ERR 38
#define ARIZONA_IRQ_CTRLIF_ERR 39
#define ARIZONA_IRQ_MIXER_DROPPED_SAMPLES 40
#define ARIZONA_IRQ_ASYNC_CLK_ENA_LOW 41
#define ARIZONA_IRQ_SYSCLK_ENA_LOW 42
#define ARIZONA_IRQ_ISRC1_CFG_ERR 43
#define ARIZONA_IRQ_ISRC2_CFG_ERR 44
#define ARIZONA_IRQ_BOOT_DONE 45
#define ARIZONA_IRQ_DCS_DAC_DONE 46
#define ARIZONA_IRQ_DCS_HP_DONE 47
#define ARIZONA_IRQ_FLL2_CLOCK_OK 48
#define ARIZONA_IRQ_FLL1_CLOCK_OK 49
#define ARIZONA_IRQ_MICD_CLAMP_RISE 50
#define ARIZONA_IRQ_MICD_CLAMP_FALL 51
#define ARIZONA_IRQ_HP3R_DONE 52
#define ARIZONA_IRQ_HP3L_DONE 53
#define ARIZONA_IRQ_HP2R_DONE 54
#define ARIZONA_IRQ_HP2L_DONE 55
#define ARIZONA_IRQ_HP1R_DONE 56
#define ARIZONA_IRQ_HP1L_DONE 57
#define ARIZONA_IRQ_ISRC3_CFG_ERR 58
#define ARIZONA_IRQ_DSP_SHARED_WR_COLL 59
#define ARIZONA_IRQ_SPK_SHUTDOWN 60
#define ARIZONA_IRQ_SPK1R_SHORT 61
#define ARIZONA_IRQ_SPK1L_SHORT 62
#define ARIZONA_IRQ_HP3R_SC_NEG 63
#define ARIZONA_IRQ_HP3R_SC_POS 64
#define ARIZONA_IRQ_HP3L_SC_NEG 65
#define ARIZONA_IRQ_HP3L_SC_POS 66
#define ARIZONA_IRQ_HP2R_SC_NEG 67
#define ARIZONA_IRQ_HP2R_SC_POS 68
#define ARIZONA_IRQ_HP2L_SC_NEG 69
#define ARIZONA_IRQ_HP2L_SC_POS 70
#define ARIZONA_IRQ_HP1R_SC_NEG 71
#define ARIZONA_IRQ_HP1R_SC_POS 72
#define ARIZONA_IRQ_HP1L_SC_NEG 73
#define ARIZONA_IRQ_HP1L_SC_POS 74
#define ARIZONA_NUM_IRQ 75
struct snd_soc_dapm_context;
struct arizona {
struct regmap *regmap;
struct device *dev;
enum arizona_type type;
unsigned int rev;
int num_core_supplies;
struct regulator_bulk_data core_supplies[ARIZONA_MAX_CORE_SUPPLIES];
struct regulator *dcvdd;
bool has_fully_powered_off;
struct arizona_pdata pdata;
unsigned int external_dcvdd:1;
int irq;
struct irq_domain *virq;
struct regmap_irq_chip_data *aod_irq_chip;
struct regmap_irq_chip_data *irq_chip;
bool hpdet_clamp;
unsigned int hp_ena;
struct mutex clk_lock;
int clk32k_ref;
struct clk *mclk[ARIZONA_NUM_MCLK];
bool ctrlif_error;
struct snd_soc_dapm_context *dapm;
int tdm_width[ARIZONA_MAX_AIF];
int tdm_slots[ARIZONA_MAX_AIF];
uint16_t dac_comp_coeff;
uint8_t dac_comp_enabled;
struct mutex dac_comp_lock;
struct blocking_notifier_head notifier;
};
static inline int arizona_call_notifiers(struct arizona *arizona,
unsigned long event,
void *data)
{
return blocking_notifier_call_chain(&arizona->notifier, event, data);
}
int arizona_clk32k_enable(struct arizona *arizona);
int arizona_clk32k_disable(struct arizona *arizona);
int arizona_request_irq(struct arizona *arizona, int irq, char *name,
irq_handler_t handler, void *data);
void arizona_free_irq(struct arizona *arizona, int irq, void *data);
int arizona_set_irq_wake(struct arizona *arizona, int irq, int on);
#ifdef CONFIG_MFD_WM5102
int wm5102_patch(struct arizona *arizona);
#else
static inline int wm5102_patch(struct arizona *arizona)
{
return 0;
}
#endif
int wm5110_patch(struct arizona *arizona);
int cs47l24_patch(struct arizona *arizona);
int wm8997_patch(struct arizona *arizona);
int wm8998_patch(struct arizona *arizona);
#endif
linux-7.2.3/include/linux/mfd/arizona/pdata.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Platform data for Arizona devices
*
* Copyright 2012 Wolfson Microelectronics. PLC.
*/
#ifndef _ARIZONA_PDATA_H
#define _ARIZONA_PDATA_H
#include <dt-bindings/mfd/arizona.h>
#include <linux/regulator/arizona-ldo1.h>
#include <linux/regulator/arizona-micsupp.h>
#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */
#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */
#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */
#define ARIZONA_MAX_GPIO 5
#define ARIZONA_MAX_INPUT 4
#define ARIZONA_MAX_MICBIAS 3
#define ARIZONA_MAX_OUTPUT 6
#define ARIZONA_MAX_AIF 3
#define ARIZONA_HAP_ACT_ERM 0
#define ARIZONA_HAP_ACT_LRA 2
#define ARIZONA_MAX_PDM_SPK 2
struct regulator_init_data;
struct gpio_desc;
struct arizona_micbias {
int mV; /** Regulated voltage */
unsigned int ext_cap:1; /** External capacitor fitted */
unsigned int discharge:1; /** Actively discharge */
unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
unsigned int bypass:1; /** Use bypass mode */
};
struct arizona_micd_config {
unsigned int src;
unsigned int bias;
bool gpio;
};
struct arizona_micd_range {
int max; /** Ohms */
int key; /** Key to report to input layer */
};
struct arizona_pdata {
struct gpio_desc *reset; /** GPIO controlling /RESET, if any */
/** Regulator configuration for MICVDD */
struct arizona_micsupp_pdata micvdd;
/** Regulator configuration for LDO1 */
struct arizona_ldo1_pdata ldo1;
/** If a direct 32kHz clock is provided on an MCLK specify it here */
int clk32k_src;
/** Mode for primary IRQ (defaults to active low) */
unsigned int irq_flags;
/* Base GPIO */
int gpio_base;
/** Pin state for GPIO pins */
unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
/**
* Maximum number of channels clocks will be generated for,
* useful for systems where and I2S bus with multiple data
* lines is mastered.
*/
unsigned int max_channels_clocked[ARIZONA_MAX_AIF];
/** GPIO5 is used for jack detection */
bool jd_gpio5;
/** Internal pull on GPIO5 is disabled when used for jack detection */
bool jd_gpio5_nopull;
/** set to true if jackdet contact opens on insert */
bool jd_invert;
/** Use the headphone detect circuit to identify the accessory */
bool hpdet_acc_id;
/** Check for line output with HPDET method */
bool hpdet_acc_id_line;
/** Channel to use for headphone detection */
unsigned int hpdet_channel;
/** Use software comparison to determine mic presence */
bool micd_software_compare;
/** Extra debounce timeout used during initial mic detection (ms) */
unsigned int micd_detect_debounce;
/** Mic detect ramp rate */
unsigned int micd_bias_start_time;
/** Mic detect sample rate */
unsigned int micd_rate;
/** Mic detect debounce level */
unsigned int micd_dbtime;
/** Mic detect timeout (ms) */
unsigned int micd_timeout;
/** Force MICBIAS on for mic detect */
bool micd_force_micbias;
/** Mic detect level parameters */
const struct arizona_micd_range *micd_ranges;
int num_micd_ranges;
/** Headset polarity configurations */
struct arizona_micd_config *micd_configs;
int num_micd_configs;
/** Reference voltage for DMIC inputs */
int dmic_ref[ARIZONA_MAX_INPUT];
/** MICBIAS configurations */
struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
/**
* Mode of input structures
* One of the ARIZONA_INMODE_xxx values
* wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4
* wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B
*/
int inmode[ARIZONA_MAX_INPUT];
/** Mode for outputs */
int out_mono[ARIZONA_MAX_OUTPUT];
/** Limit output volumes */
unsigned int out_vol_limit[2 * ARIZONA_MAX_OUTPUT];
/** PDM speaker mute setting */
unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
/** PDM speaker format */
unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
/** Haptic actuator type */
unsigned int hap_act;
#ifdef CONFIG_GPIOLIB_LEGACY
/** GPIO for primary IRQ (used for edge triggered emulation) */
int irq_gpio;
#endif
/** General purpose switch control */
unsigned int gpsw;
};
#endif
linux-7.2.3/include/linux/mfd/arizona/registers.h
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