Resguardo inicial

This commit is contained in:
lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
94853 changed files with 43200404 additions and 0 deletions
+11
View File
@@ -0,0 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for ALSA
# Copyright (c) 2001 by Jaroslav Kysela <perex@perex.cz>
#
snd-cs46xx-y := cs46xx.o cs46xx_lib.o
snd-cs46xx-$(CONFIG_SND_CS46XX_NEW_DSP) += dsp_spos.o dsp_spos_scb_lib.o
# Toplevel Module Dependency
obj-$(CONFIG_SND_CS46XX) += snd-cs46xx.o
+142
View File
@@ -0,0 +1,142 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*/
/*
NOTES:
- sometimes the sound is metallic and sibilant, unloading and
reloading the module may solve this.
*/
#include <linux/pci.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/module.h>
#include <sound/core.h>
#include "cs46xx.h"
#include <sound/initval.h>
MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
MODULE_DESCRIPTION("Cirrus Logic Sound Fusion CS46XX");
MODULE_LICENSE("GPL");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
static bool external_amp[SNDRV_CARDS];
static bool thinkpad[SNDRV_CARDS];
static bool mmap_valid[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for the CS46xx soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the CS46xx soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable CS46xx soundcard.");
module_param_array(external_amp, bool, NULL, 0444);
MODULE_PARM_DESC(external_amp, "Force to enable external amplifier.");
module_param_array(thinkpad, bool, NULL, 0444);
MODULE_PARM_DESC(thinkpad, "Force to enable Thinkpad's CLKRUN control.");
module_param_array(mmap_valid, bool, NULL, 0444);
MODULE_PARM_DESC(mmap_valid, "Support OSS mmap.");
static const struct pci_device_id snd_cs46xx_ids[] = {
{ PCI_VDEVICE(CIRRUS, 0x6001) }, /* CS4280 */
{ PCI_VDEVICE(CIRRUS, 0x6003) }, /* CS4612 */
{ PCI_VDEVICE(CIRRUS, 0x6004) }, /* CS4615 */
{ }
};
MODULE_DEVICE_TABLE(pci, snd_cs46xx_ids);
static int snd_card_cs46xx_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct snd_cs46xx *chip;
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
sizeof(*chip), &card);
if (err < 0)
return err;
chip = card->private_data;
err = snd_cs46xx_create(card, pci,
external_amp[dev], thinkpad[dev]);
if (err < 0)
goto error;
card->private_data = chip;
chip->accept_valid = mmap_valid[dev];
err = snd_cs46xx_pcm(chip, 0);
if (err < 0)
goto error;
#ifdef CONFIG_SND_CS46XX_NEW_DSP
err = snd_cs46xx_pcm_rear(chip, 1);
if (err < 0)
goto error;
err = snd_cs46xx_pcm_iec958(chip, 2);
if (err < 0)
goto error;
#endif
err = snd_cs46xx_mixer(chip, 2);
if (err < 0)
goto error;
#ifdef CONFIG_SND_CS46XX_NEW_DSP
if (chip->nr_ac97_codecs ==2) {
err = snd_cs46xx_pcm_center_lfe(chip, 3);
if (err < 0)
goto error;
}
#endif
err = snd_cs46xx_midi(chip, 0);
if (err < 0)
goto error;
err = snd_cs46xx_start_dsp(chip);
if (err < 0)
goto error;
snd_cs46xx_gameport(chip);
strscpy(card->driver, "CS46xx");
strscpy(card->shortname, "Sound Fusion CS46xx");
sprintf(card->longname, "%s at 0x%lx/0x%lx, irq %i",
card->shortname,
chip->ba0_addr,
chip->ba1_addr,
chip->irq);
err = snd_card_register(card);
if (err < 0)
goto error;
pci_set_drvdata(pci, card);
dev++;
return 0;
error:
snd_card_free(card);
return err;
}
static struct pci_driver cs46xx_driver = {
.name = KBUILD_MODNAME,
.id_table = snd_cs46xx_ids,
.probe = snd_card_cs46xx_probe,
#ifdef CONFIG_PM_SLEEP
.driver = {
.pm = &snd_cs46xx_pm,
},
#endif
};
module_pci_driver(cs46xx_driver);
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,213 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*/
#ifndef __CS46XX_DSP_SPOS_H__
#define __CS46XX_DSP_SPOS_H__
#include "cs46xx_dsp_scb_types.h"
#include "cs46xx_dsp_task_types.h"
#define SYMBOL_CONSTANT 0x0
#define SYMBOL_SAMPLE 0x1
#define SYMBOL_PARAMETER 0x2
#define SYMBOL_CODE 0x3
#define SEGTYPE_SP_PROGRAM 0x00000001
#define SEGTYPE_SP_PARAMETER 0x00000002
#define SEGTYPE_SP_SAMPLE 0x00000003
#define SEGTYPE_SP_COEFFICIENT 0x00000004
#define DSP_SPOS_UU 0x0deadul /* unused */
#define DSP_SPOS_DC 0x0badul /* don't care */
#define DSP_SPOS_DC_DC 0x0bad0badul /* don't care */
#define DSP_SPOS_UUUU 0xdeadc0edul /* unused */
#define DSP_SPOS_UUHI 0xdeadul
#define DSP_SPOS_UULO 0xc0edul
#define DSP_SPOS_DCDC 0x0badf1d0ul /* don't care */
#define DSP_SPOS_DCDCHI 0x0badul
#define DSP_SPOS_DCDCLO 0xf1d0ul
#define DSP_MAX_TASK_NAME 60
#define DSP_MAX_SYMBOL_NAME 100
#define DSP_MAX_SCB_NAME 60
#define DSP_MAX_SCB_DESC 200
#define DSP_MAX_TASK_DESC 50
#define DSP_MAX_PCM_CHANNELS 32
#define DSP_MAX_SRC_NR 14
#define DSP_PCM_MAIN_CHANNEL 1
#define DSP_PCM_REAR_CHANNEL 2
#define DSP_PCM_CENTER_LFE_CHANNEL 3
#define DSP_PCM_S71_CHANNEL 4 /* surround 7.1 */
#define DSP_IEC958_CHANNEL 5
#define DSP_SPDIF_STATUS_OUTPUT_ENABLED 1
#define DSP_SPDIF_STATUS_PLAYBACK_OPEN 2
#define DSP_SPDIF_STATUS_HW_ENABLED 4
#define DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED 8
struct dsp_symbol_entry {
u32 address;
char symbol_name[DSP_MAX_SYMBOL_NAME];
int symbol_type;
/* initialized by driver */
struct dsp_module_desc * module;
int deleted;
};
struct dsp_symbol_desc {
int nsymbols;
struct dsp_symbol_entry *symbols;
/* initialized by driver */
int highest_frag_index;
};
struct dsp_segment_desc {
int segment_type;
u32 offset;
u32 size;
u32 * data;
};
struct dsp_module_desc {
char * module_name;
struct dsp_symbol_desc symbol_table;
int nsegments;
struct dsp_segment_desc * segments;
/* initialized by driver */
u32 overlay_begin_address;
u32 load_address;
int nfixups;
};
struct dsp_scb_descriptor {
char scb_name[DSP_MAX_SCB_NAME];
u32 address;
int index;
u32 *data;
struct dsp_scb_descriptor * sub_list_ptr;
struct dsp_scb_descriptor * next_scb_ptr;
struct dsp_scb_descriptor * parent_scb_ptr;
struct dsp_symbol_entry * task_entry;
struct dsp_symbol_entry * scb_symbol;
struct snd_info_entry *proc_info;
int ref_count;
u16 volume[2];
unsigned int deleted :1;
unsigned int updated :1;
unsigned int volume_set :1;
};
struct dsp_task_descriptor {
char task_name[DSP_MAX_TASK_NAME];
int size;
u32 address;
int index;
u32 *data;
};
struct dsp_pcm_channel_descriptor {
int active;
int src_slot;
int pcm_slot;
u32 sample_rate;
u32 unlinked;
struct dsp_scb_descriptor * pcm_reader_scb;
struct dsp_scb_descriptor * src_scb;
struct dsp_scb_descriptor * mixer_scb;
void * private_data;
};
struct dsp_spos_instance {
struct dsp_symbol_desc symbol_table; /* currently available loaded symbols in SP */
int nmodules;
struct dsp_module_desc * modules; /* modules loaded into SP */
struct dsp_segment_desc code;
/* Main PCM playback mixer */
struct dsp_scb_descriptor * master_mix_scb;
u16 dac_volume_right;
u16 dac_volume_left;
/* Rear/surround PCM playback mixer */
struct dsp_scb_descriptor * rear_mix_scb;
/* Center/LFE mixer */
struct dsp_scb_descriptor * center_lfe_mix_scb;
int npcm_channels;
int nsrc_scb;
struct dsp_pcm_channel_descriptor pcm_channels[DSP_MAX_PCM_CHANNELS];
int src_scb_slots[DSP_MAX_SRC_NR];
/* cache this symbols */
struct dsp_symbol_entry * null_algorithm; /* used by PCMreaderSCB's */
struct dsp_symbol_entry * s16_up; /* used by SRCtaskSCB's */
/* proc fs */
struct snd_card *snd_card;
struct snd_info_entry * proc_dsp_dir;
/* SCB's descriptors */
int nscb;
int scb_highest_frag_index;
struct dsp_scb_descriptor scbs[DSP_MAX_SCB_DESC];
struct dsp_scb_descriptor * the_null_scb;
/* Task's descriptors */
int ntask;
struct dsp_task_descriptor tasks[DSP_MAX_TASK_DESC];
/* SPDIF status */
int spdif_status_out;
int spdif_status_in;
u16 spdif_input_volume_right;
u16 spdif_input_volume_left;
/* spdif channel status,
left right and user validity bits */
unsigned int spdif_csuv_default;
unsigned int spdif_csuv_stream;
/* SPDIF input sample rate converter */
struct dsp_scb_descriptor * spdif_in_src;
/* SPDIF input asynch. receiver */
struct dsp_scb_descriptor * asynch_rx_scb;
/* Capture record mixer SCB */
struct dsp_scb_descriptor * record_mixer_scb;
/* CODEC input SCB */
struct dsp_scb_descriptor * codec_in_scb;
/* reference snooper */
struct dsp_scb_descriptor * ref_snoop_scb;
/* SPDIF output PCM reference */
struct dsp_scb_descriptor * spdif_pcm_input_scb;
/* asynch TX task */
struct dsp_scb_descriptor * asynch_tx_scb;
/* record sources */
struct dsp_scb_descriptor * pcm_input;
struct dsp_scb_descriptor * adc_input;
int spdif_in_sample_rate;
};
#endif /* __DSP_SPOS_H__ */
@@ -0,0 +1,237 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*
* NOTE: comments are copy/paste from cwcemb80.lst
* provided by Tom Woller at Cirrus (my only
* documentation about the SP OS running inside
* the DSP)
*/
#ifndef __CS46XX_DSP_TASK_TYPES_H__
#define __CS46XX_DSP_TASK_TYPES_H__
#include "cs46xx_dsp_scb_types.h"
/*********************************************************************************************
Example hierarchy of stream control blocks in the SP
hfgTree
Ptr____Call (c)
\
-------+------ ------------- ------------- ------------- -----
| SBlaster IF |______\| Foreground |___\| Middlegr'nd |___\| Background |___\| Nul |
| |Goto /| tree header |g /| tree header |g /| tree header |g /| SCB |r
-------------- (g) ------------- ------------- ------------- -----
|c |c |c |c
| | | |
\/ ------------- ------------- -------------
| Foreground |_\ | Middlegr'nd |_\ | Background |_\
| tree |g/ | tree |g/ | tree |g/
------------- ------------- -------------
|c |c |c
| | |
\/ \/ \/
*********************************************************************************************/
#define HFG_FIRST_EXECUTE_MODE 0x0001
#define HFG_FIRST_EXECUTE_MODE_BIT 0
#define HFG_CONTEXT_SWITCH_MODE 0x0002
#define HFG_CONTEXT_SWITCH_MODE_BIT 1
#define MAX_FG_STACK_SIZE 32 /* THESE NEED TO BE COMPUTED PROPERLY */
#define MAX_MG_STACK_SIZE 16
#define MAX_BG_STACK_SIZE 9
#define MAX_HFG_STACK_SIZE 4
#define SLEEP_ACTIVE_INCREMENT 0 /* Enable task tree thread to go to sleep
This should only ever be used on the Background thread */
#define STANDARD_ACTIVE_INCREMENT 1 /* Task tree thread normal operation */
#define SUSPEND_ACTIVE_INCREMENT 2 /* Cause execution to suspend in the task tree thread
This should only ever be used on the Background thread */
#define HOSTFLAGS_DISABLE_BG_SLEEP 0 /* Host-controlled flag that determines whether we go to sleep
at the end of BG */
/* Minimal context save area for Hyper Forground */
struct dsp_hf_save_area {
u32 r10_save;
u32 r54_save;
u32 r98_save;
___DSP_DUAL_16BIT_ALLOC(
status_save,
ind_save
)
___DSP_DUAL_16BIT_ALLOC(
rci1_save,
rci0_save
)
u32 r32_save;
u32 r76_save;
u32 rsd2_save;
___DSP_DUAL_16BIT_ALLOC(
rsi2_save, /* See TaskTreeParameterBlock for
remainder of registers */
rsa2Save
)
/* saved as part of HFG context */
};
/* Task link data structure */
struct dsp_tree_link {
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to sibling task control block */
next_scb,
/* Pointer to child task control block */
sub_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to code entry point */
entry_point,
/* Pointer to local data */
this_spb
)
};
struct dsp_task_tree_data {
___DSP_DUAL_16BIT_ALLOC(
/* Initial tock count; controls task tree execution rate */
tock_count_limit,
/* Tock down counter */
tock_count
)
/* Add to ActiveCount when TockCountLimit reached:
Subtract on task tree termination */
___DSP_DUAL_16BIT_ALLOC(
active_tncrement,
/* Number of pending activations for task tree */
active_count
)
___DSP_DUAL_16BIT_ALLOC(
/* BitNumber to enable modification of correct bit in ActiveTaskFlags */
active_bit,
/* Pointer to OS location for indicating current activity on task level */
active_task_flags_ptr
)
/* Data structure for controlling movement of memory blocks:-
currently unused */
___DSP_DUAL_16BIT_ALLOC(
mem_upd_ptr,
/* Data structure for controlling synchronous link update */
link_upd_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Save area for remainder of full context. */
save_area,
/* Address of start of local stack for data storage */
data_stack_base_ptr
)
};
struct dsp_interval_timer_data
{
/* These data items have the same relative locations to those */
___DSP_DUAL_16BIT_ALLOC(
interval_timer_period,
itd_unused
)
/* used for this data in the SPOS control block for SPOS 1.0 */
___DSP_DUAL_16BIT_ALLOC(
num_FG_ticks_this_interval,
num_intervals
)
};
/* This structure contains extra storage for the task tree
Currently, this additional data is related only to a full context save */
struct dsp_task_tree_context_block {
/* Up to 10 values are saved onto the stack. 8 for the task tree, 1 for
The access to the context switch (call or interrupt), and 1 spare that
users should never use. This last may be required by the system */
___DSP_DUAL_16BIT_ALLOC(
stack1,
stack0
)
___DSP_DUAL_16BIT_ALLOC(
stack3,
stack2
)
___DSP_DUAL_16BIT_ALLOC(
stack5,
stack4
)
___DSP_DUAL_16BIT_ALLOC(
stack7,
stack6
)
___DSP_DUAL_16BIT_ALLOC(
stack9,
stack8
)
u32 saverfe;
/* Value may be overwritten by stack save algorithm.
Retain the size of the stack data saved here if used */
___DSP_DUAL_16BIT_ALLOC(
reserved1,
stack_size
)
u32 saverba; /* (HFG) */
u32 saverdc;
u32 savers_config_23; /* (HFG) */
u32 savers_DMA23; /* (HFG) */
u32 saversa0;
u32 saversi0;
u32 saversa1;
u32 saversi1;
u32 saversa3;
u32 saversd0;
u32 saversd1;
u32 saversd3;
u32 savers_config01;
u32 savers_DMA01;
u32 saveacc0hl;
u32 saveacc1hl;
u32 saveacc0xacc1x;
u32 saveacc2hl;
u32 saveacc3hl;
u32 saveacc2xacc3x;
u32 saveaux0hl;
u32 saveaux1hl;
u32 saveaux0xaux1x;
u32 saveaux2hl;
u32 saveaux3hl;
u32 saveaux2xaux3x;
u32 savershouthl;
u32 savershoutxmacmode;
};
struct dsp_task_tree_control_block {
struct dsp_hf_save_area context;
struct dsp_tree_link links;
struct dsp_task_tree_data data;
struct dsp_task_tree_context_block context_blk;
struct dsp_interval_timer_data int_timer;
};
#endif /* __DSP_TASK_TYPES_H__ */
File diff suppressed because it is too large Load Diff
+195
View File
@@ -0,0 +1,195 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*/
#ifndef __CS46XX_LIB_H__
#define __CS46XX_LIB_H__
/*
* constants
*/
#define CS46XX_BA0_SIZE 0x1000
#define CS46XX_BA1_DATA0_SIZE 0x3000
#define CS46XX_BA1_DATA1_SIZE 0x3800
#define CS46XX_BA1_PRG_SIZE 0x7000
#define CS46XX_BA1_REG_SIZE 0x0100
#ifdef CONFIG_SND_CS46XX_NEW_DSP
#define CS46XX_MIN_PERIOD_SIZE 64
#define CS46XX_MAX_PERIOD_SIZE 1024*1024
#else
#define CS46XX_MIN_PERIOD_SIZE 2048
#define CS46XX_MAX_PERIOD_SIZE 2048
#endif
#define CS46XX_FRAGS 2
/* #define CS46XX_BUFFER_SIZE CS46XX_MAX_PERIOD_SIZE * CS46XX_FRAGS */
#define SCB_NO_PARENT 0
#define SCB_ON_PARENT_NEXT_SCB 1
#define SCB_ON_PARENT_SUBLIST_SCB 2
/* 3*1024 parameter, 3.5*1024 sample, 2*3.5*1024 code */
#define BA1_DWORD_SIZE (13 * 1024 + 512)
#define BA1_MEMORY_COUNT 3
/*
* common I/O routines
*/
static inline void snd_cs46xx_poke(struct snd_cs46xx *chip, unsigned long reg, unsigned int val)
{
unsigned int bank = reg >> 16;
unsigned int offset = reg & 0xffff;
/*
if (bank == 0)
printk(KERN_DEBUG "snd_cs46xx_poke: %04X - %08X\n",
reg >> 2,val);
*/
writel(val, chip->region.idx[bank+1].remap_addr + offset);
}
static inline unsigned int snd_cs46xx_peek(struct snd_cs46xx *chip, unsigned long reg)
{
unsigned int bank = reg >> 16;
unsigned int offset = reg & 0xffff;
return readl(chip->region.idx[bank+1].remap_addr + offset);
}
static inline void snd_cs46xx_pokeBA0(struct snd_cs46xx *chip, unsigned long offset, unsigned int val)
{
writel(val, chip->region.name.ba0.remap_addr + offset);
}
static inline unsigned int snd_cs46xx_peekBA0(struct snd_cs46xx *chip, unsigned long offset)
{
return readl(chip->region.name.ba0.remap_addr + offset);
}
struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip);
void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip);
int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module);
#ifdef CONFIG_PM_SLEEP
int cs46xx_dsp_resume(struct snd_cs46xx * chip);
#endif
struct dsp_symbol_entry *cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name,
int symbol_type);
#ifdef CONFIG_SND_PROC_FS
int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip);
int cs46xx_dsp_proc_done (struct snd_cs46xx *chip);
#else
#define cs46xx_dsp_proc_init(card, chip)
#define cs46xx_dsp_proc_done(chip)
#endif
int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip);
int snd_cs46xx_download (struct snd_cs46xx *chip, u32 *src, unsigned long offset,
unsigned long len);
int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, unsigned long offset, unsigned long len);
int cs46xx_dsp_enable_spdif_out (struct snd_cs46xx *chip);
int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip);
int cs46xx_dsp_disable_spdif_out (struct snd_cs46xx *chip);
int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip);
int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip);
int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip);
int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip);
int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip);
int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip);
int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data);
struct dsp_scb_descriptor * cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name,
u32 * scb_data, u32 dest);
#ifdef CONFIG_SND_PROC_FS
void cs46xx_dsp_proc_free_scb_desc (struct dsp_scb_descriptor * scb);
void cs46xx_dsp_proc_register_scb_desc (struct snd_cs46xx *chip,
struct dsp_scb_descriptor * scb);
#else
#define cs46xx_dsp_proc_free_scb_desc(scb)
#define cs46xx_dsp_proc_register_scb_desc(chip, scb)
#endif
struct dsp_scb_descriptor * cs46xx_dsp_create_timing_master_scb (struct snd_cs46xx *chip);
struct dsp_scb_descriptor *
cs46xx_dsp_create_codec_out_scb(struct snd_cs46xx * chip,
char * codec_name, u16 channel_disp, u16 fifo_addr,
u16 child_scb_addr, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,
u16 channel_disp, u16 fifo_addr,
u16 sample_buffer_addr, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip,
struct dsp_scb_descriptor * scb);
struct dsp_scb_descriptor *
cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,
u16 channel_disp, u16 fifo_addr,
u16 sample_buffer_addr, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_src_task_scb(struct snd_cs46xx * chip, char * scb_name,
int sample_rate, u16 src_buffer_addr,
u16 src_delay_buffer_addr, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type, int pass_through);
struct dsp_scb_descriptor *
cs46xx_dsp_create_mix_only_scb(struct snd_cs46xx * chip, char * scb_name,
u16 mix_buffer_addr, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_vari_decimate_scb(struct snd_cs46xx * chip, char * scb_name,
u16 vari_buffer_addr0, u16 vari_buffer_addr1, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_asynch_fg_rx_scb(struct snd_cs46xx * chip, char * scb_name,
u32 dest, u16 hfg_scb_address, u16 asynch_buffer_address,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_spio_write_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_mix_to_ostream_scb(struct snd_cs46xx * chip, char * scb_name,
u16 mix_buffer_addr, u16 writeback_spb, u32 dest,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_scb_descriptor *
cs46xx_dsp_create_magic_snoop_scb(struct snd_cs46xx * chip, char * scb_name,
u32 dest, u16 snoop_buffer_address,
struct dsp_scb_descriptor * snoop_scb,
struct dsp_scb_descriptor * parent_scb,
int scb_child_type);
struct dsp_pcm_channel_descriptor *
cs46xx_dsp_create_pcm_channel (struct snd_cs46xx * chip, u32 sample_rate,
void * private_data, u32 hw_dma_addr,
int pcm_channel_id);
void cs46xx_dsp_destroy_pcm_channel (struct snd_cs46xx * chip,
struct dsp_pcm_channel_descriptor * pcm_channel);
int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip,
struct dsp_pcm_channel_descriptor * pcm_channel);
int cs46xx_dsp_pcm_link (struct snd_cs46xx * chip,
struct dsp_pcm_channel_descriptor * pcm_channel);
struct dsp_scb_descriptor *
cs46xx_add_record_source (struct snd_cs46xx *chip, struct dsp_scb_descriptor * source,
u16 addr, char * scb_name);
int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src);
int cs46xx_src_link(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src);
int cs46xx_iec958_pre_open (struct snd_cs46xx *chip);
int cs46xx_iec958_post_close (struct snd_cs46xx *chip);
int cs46xx_dsp_pcm_channel_set_period (struct snd_cs46xx * chip,
struct dsp_pcm_channel_descriptor * pcm_channel,
int period_size);
int cs46xx_dsp_pcm_ostream_set_period (struct snd_cs46xx * chip, int period_size);
int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right);
int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right);
#endif /* __CS46XX_LIB_H__ */
File diff suppressed because it is too large Load Diff
+216
View File
@@ -0,0 +1,216 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*/
/*
* 2002-07 Benny Sjostrand benny@hostmobility.com
*/
#ifdef CONFIG_SND_CS46XX_NEW_DSP /* hack ... */
#ifndef __DSP_SPOS_H__
#define __DSP_SPOS_H__
#define DSP_MAX_SYMBOLS 1024
#define DSP_MAX_MODULES 64
#define DSP_CODE_BYTE_SIZE 0x00007000UL
#define DSP_PARAMETER_BYTE_SIZE 0x00003000UL
#define DSP_SAMPLE_BYTE_SIZE 0x00003800UL
#define DSP_PARAMETER_BYTE_OFFSET 0x00000000UL
#define DSP_SAMPLE_BYTE_OFFSET 0x00010000UL
#define DSP_CODE_BYTE_OFFSET 0x00020000UL
#define WIDE_INSTR_MASK 0x0040
#define WIDE_LADD_INSTR_MASK 0x0380
/* this instruction types
needs to be reallocated when load
code into DSP */
enum wide_opcode {
WIDE_FOR_BEGIN_LOOP = 0x20,
WIDE_FOR_BEGIN_LOOP2,
WIDE_COND_GOTO_ADDR = 0x30,
WIDE_COND_GOTO_CALL,
WIDE_TBEQ_COND_GOTO_ADDR = 0x70,
WIDE_TBEQ_COND_CALL_ADDR,
WIDE_TBEQ_NCOND_GOTO_ADDR,
WIDE_TBEQ_NCOND_CALL_ADDR,
WIDE_TBEQ_COND_GOTO1_ADDR,
WIDE_TBEQ_COND_CALL1_ADDR,
WIDE_TBEQ_NCOND_GOTOI_ADDR,
WIDE_TBEQ_NCOND_CALL1_ADDR,
};
/* SAMPLE segment */
#define VARI_DECIMATE_BUF1 0x0000
#define WRITE_BACK_BUF1 0x0400
#define CODEC_INPUT_BUF1 0x0500
#define PCM_READER_BUF1 0x0600
#define SRC_DELAY_BUF1 0x0680
#define VARI_DECIMATE_BUF0 0x0780
#define SRC_OUTPUT_BUF1 0x07A0
#define ASYNC_IP_OUTPUT_BUFFER1 0x0A00
#define OUTPUT_SNOOP_BUFFER 0x0B00
#define SPDIFI_IP_OUTPUT_BUFFER1 0x0E00
#define SPDIFO_IP_OUTPUT_BUFFER1 0x1000
#define MIX_SAMPLE_BUF1 0x1400
#define MIX_SAMPLE_BUF2 0x2E80
#define MIX_SAMPLE_BUF3 0x2F00
#define MIX_SAMPLE_BUF4 0x2F80
#define MIX_SAMPLE_BUF5 0x3000
/* Task stack address */
#define HFG_STACK 0x066A
#define FG_STACK 0x066E
#define BG_STACK 0x068E
/* SCB's addresses */
#define SPOSCB_ADDR 0x070
#define BG_TREE_SCB_ADDR 0x635
#define NULL_SCB_ADDR 0x000
#define TIMINGMASTER_SCB_ADDR 0x010
#define CODECOUT_SCB_ADDR 0x020
#define PCMREADER_SCB_ADDR 0x030
#define WRITEBACK_SCB_ADDR 0x040
#define CODECIN_SCB_ADDR 0x080
#define MASTERMIX_SCB_ADDR 0x090
#define SRCTASK_SCB_ADDR 0x0A0
#define VARIDECIMATE_SCB_ADDR 0x0B0
#define PCMSERIALIN_SCB_ADDR 0x0C0
#define FG_TASK_HEADER_ADDR 0x600
#define ASYNCTX_SCB_ADDR 0x0E0
#define ASYNCRX_SCB_ADDR 0x0F0
#define SRCTASKII_SCB_ADDR 0x100
#define OUTPUTSNOOP_SCB_ADDR 0x110
#define PCMSERIALINII_SCB_ADDR 0x120
#define SPIOWRITE_SCB_ADDR 0x130
#define REAR_CODECOUT_SCB_ADDR 0x140
#define OUTPUTSNOOPII_SCB_ADDR 0x150
#define PCMSERIALIN_PCM_SCB_ADDR 0x160
#define RECORD_MIXER_SCB_ADDR 0x170
#define REAR_MIXER_SCB_ADDR 0x180
#define CLFE_MIXER_SCB_ADDR 0x190
#define CLFE_CODEC_SCB_ADDR 0x1A0
/* hyperforground SCB's*/
#define HFG_TREE_SCB 0xBA0
#define SPDIFI_SCB_INST 0xBB0
#define SPDIFO_SCB_INST 0xBC0
#define WRITE_BACK_SPB 0x0D0
/* offsets */
#define AsyncCIOFIFOPointer 0xd
#define SPDIFOFIFOPointer 0xd
#define SPDIFIFIFOPointer 0xd
#define TCBData 0xb
#define HFGFlags 0xa
#define TCBContextBlk 0x10
#define AFGTxAccumPhi 0x4
#define SCBsubListPtr 0x9
#define SCBfuncEntryPtr 0xA
#define SRCCorPerGof 0x2
#define SRCPhiIncr6Int26Frac 0xd
#define SCBVolumeCtrl 0xe
/* conf */
#define UseASER1Input 1
/*
* The following defines are for the flags in the rsConfig01/23 registers of
* the SP.
*/
#define RSCONFIG_MODULO_SIZE_MASK 0x0000000FL
#define RSCONFIG_MODULO_16 0x00000001L
#define RSCONFIG_MODULO_32 0x00000002L
#define RSCONFIG_MODULO_64 0x00000003L
#define RSCONFIG_MODULO_128 0x00000004L
#define RSCONFIG_MODULO_256 0x00000005L
#define RSCONFIG_MODULO_512 0x00000006L
#define RSCONFIG_MODULO_1024 0x00000007L
#define RSCONFIG_MODULO_4 0x00000008L
#define RSCONFIG_MODULO_8 0x00000009L
#define RSCONFIG_SAMPLE_SIZE_MASK 0x000000C0L
#define RSCONFIG_SAMPLE_8MONO 0x00000000L
#define RSCONFIG_SAMPLE_8STEREO 0x00000040L
#define RSCONFIG_SAMPLE_16MONO 0x00000080L
#define RSCONFIG_SAMPLE_16STEREO 0x000000C0L
#define RSCONFIG_UNDERRUN_ZERO 0x00004000L
#define RSCONFIG_DMA_TO_HOST 0x00008000L
#define RSCONFIG_STREAM_NUM_MASK 0x00FF0000L
#define RSCONFIG_MAX_DMA_SIZE_MASK 0x1F000000L
#define RSCONFIG_DMA_ENABLE 0x20000000L
#define RSCONFIG_PRIORITY_MASK 0xC0000000L
#define RSCONFIG_PRIORITY_HIGH 0x00000000L
#define RSCONFIG_PRIORITY_MEDIUM_HIGH 0x40000000L
#define RSCONFIG_PRIORITY_MEDIUM_LOW 0x80000000L
#define RSCONFIG_PRIORITY_LOW 0xC0000000L
#define RSCONFIG_STREAM_NUM_SHIFT 16L
#define RSCONFIG_MAX_DMA_SIZE_SHIFT 24L
/* SP constants */
#define FG_INTERVAL_TIMER_PERIOD 0x0051
#define BG_INTERVAL_TIMER_PERIOD 0x0100
/* Only SP accessible registers */
#define SP_ASER_COUNTDOWN 0x8040
#define SP_SPDOUT_FIFO 0x0108
#define SP_SPDIN_MI_FIFO 0x01E0
#define SP_SPDIN_D_FIFO 0x01F0
#define SP_SPDIN_STATUS 0x8048
#define SP_SPDIN_CONTROL 0x8049
#define SP_SPDIN_FIFOPTR 0x804A
#define SP_SPDOUT_STATUS 0x804C
#define SP_SPDOUT_CONTROL 0x804D
#define SP_SPDOUT_CSUV 0x808E
static inline u8 _wrap_all_bits (u8 val)
{
u8 wrapped;
/* wrap all 8 bits */
wrapped =
((val & 0x1 ) << 7) |
((val & 0x2 ) << 5) |
((val & 0x4 ) << 3) |
((val & 0x8 ) << 1) |
((val & 0x10) >> 1) |
((val & 0x20) >> 3) |
((val & 0x40) >> 5) |
((val & 0x80) >> 7);
return wrapped;
}
static inline void cs46xx_dsp_spos_update_scb (struct snd_cs46xx * chip,
struct dsp_scb_descriptor * scb)
{
/* update nextSCB and subListPtr in SCB */
snd_cs46xx_poke(chip,
(scb->address + SCBsubListPtr) << 2,
(scb->sub_list_ptr->address << 0x10) |
(scb->next_scb_ptr->address));
scb->updated = 1;
}
static inline void cs46xx_dsp_scb_set_volume (struct snd_cs46xx * chip,
struct dsp_scb_descriptor * scb,
u16 left, u16 right)
{
unsigned int val = ((0xffff - left) << 16 | (0xffff - right));
snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl) << 2, val);
snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl + 1) << 2, val);
scb->volume_set = 1;
scb->volume[0] = left;
scb->volume[1] = right;
}
#endif /* __DSP_SPOS_H__ */
#endif /* CONFIG_SND_CS46XX_NEW_DSP */
File diff suppressed because it is too large Load Diff