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lastdragon
2026-09-06 12:53:21 -06:00
parent 662efe3c2a
commit ad2088d178
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linux-7.2.3/tools/perf/util/arm-spe-decoder/Build
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perf-util-y += arm-spe-pkt-decoder.o arm-spe-decoder.o
CFLAGS_arm-spe-pkt-decoder.o += -I$(srctree)/tools/arch/arm64/include/ -I$(OUTPUT)arch/arm64/include/generated/
linux-7.2.3/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
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// SPDX-License-Identifier: GPL-2.0
/*
* arm_spe_decoder.c: ARM SPE support
*/
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <errno.h>
#include <inttypes.h>
#include <stdbool.h>
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/zalloc.h>
#include "../auxtrace.h"
#include "../debug.h"
#include "../util.h"
#include "arm-spe-decoder.h"
static u64 arm_spe_calc_ip(int index, u64 payload)
{
u64 ns, el, val;
/* Instruction virtual address or Branch target address */
if (index == SPE_ADDR_PKT_HDR_INDEX_INS ||
index == SPE_ADDR_PKT_HDR_INDEX_BRANCH ||
index == SPE_ADDR_PKT_HDR_INDEX_PREV_BRANCH) {
ns = SPE_ADDR_PKT_GET_NS(payload);
el = SPE_ADDR_PKT_GET_EL(payload);
/* Clean highest byte */
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
/* Fill highest byte for EL1 or EL2 (VHE) mode */
if (ns && (el == SPE_ADDR_PKT_EL1 || el == SPE_ADDR_PKT_EL2))
payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
/* Data access virtual address */
} else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT) {
/* Clean tags */
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
/*
* Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.1 Address packet"
* defines the data virtual address payload format, the top byte
* (bits [63:56]) is assigned as top-byte tag; so we only can
* retrieve address value from bits [55:0].
*
* According to Documentation/arch/arm64/memory.rst, if detects the
* specific pattern in bits [55:52] of payload which falls in
* the kernel space, should fixup the top byte and this allows
* perf tool to parse DSO symbol for data address correctly.
*
* For this reason, if detects the bits [55:52] is 0xf, will
* fill 0xff into the top byte.
*/
val = SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload);
if ((val & 0xf0ULL) == 0xf0ULL)
payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
/* Data access physical address */
} else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS) {
/* Clean highest byte */
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
} else {
static u32 seen_idx = 0;
if (!(seen_idx & BIT(index))) {
seen_idx |= BIT(index);
pr_warning("ignoring unsupported address packet index: 0x%x\n", index);
}
}
return payload;
}
struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params)
{
struct arm_spe_decoder *decoder;
if (!params->get_trace)
return NULL;
decoder = zalloc(sizeof(struct arm_spe_decoder));
if (!decoder)
return NULL;
decoder->get_trace = params->get_trace;
decoder->data = params->data;
return decoder;
}
void arm_spe_decoder_free(struct arm_spe_decoder *decoder)
{
free(decoder);
}
static int arm_spe_get_data(struct arm_spe_decoder *decoder)
{
struct arm_spe_buffer buffer = { .buf = 0, };
int ret;
pr_debug("Getting more data\n");
ret = decoder->get_trace(&buffer, decoder->data);
if (ret < 0)
return ret;
decoder->buf = buffer.buf;
decoder->len = buffer.len;
if (!decoder->len)
pr_debug("No more data\n");
return decoder->len;
}
static int arm_spe_get_next_packet(struct arm_spe_decoder *decoder,
struct arm_spe_pkt *packet)
{
int ret;
do {
if (!decoder->len) {
ret = arm_spe_get_data(decoder);
/* Failed to read out trace data */
if (ret <= 0)
return ret;
}
ret = arm_spe_get_packet(decoder->buf, decoder->len,
packet, decoder->midr);
if (ret <= 0) {
/* Move forward for 1 byte */
decoder->buf += 1;
decoder->len -= 1;
return -EBADMSG;
}
decoder->buf += ret;
decoder->len -= ret;
} while (packet->type == ARM_SPE_PAD);
return 1;
}
static int arm_spe_read_record(struct arm_spe_decoder *decoder)
{
int err;
int idx;
u64 payload, ip;
struct arm_spe_pkt packet;
memset(&decoder->record, 0x0, sizeof(decoder->record));
decoder->record.context_id = (u64)-1;
while (1) {
err = arm_spe_get_next_packet(decoder, &packet);
if (err <= 0)
return err;
idx = packet.index;
payload = packet.payload;
switch (packet.type) {
case ARM_SPE_TIMESTAMP:
decoder->record.timestamp = payload;
return 1;
case ARM_SPE_END:
return 1;
case ARM_SPE_ADDRESS:
ip = arm_spe_calc_ip(idx, payload);
if (idx == SPE_ADDR_PKT_HDR_INDEX_INS)
decoder->record.from_ip = ip;
else if (idx == SPE_ADDR_PKT_HDR_INDEX_BRANCH)
decoder->record.to_ip = ip;
else if (idx == SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT)
decoder->record.virt_addr = ip;
else if (idx == SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS)
decoder->record.phys_addr = ip;
else if (idx == SPE_ADDR_PKT_HDR_INDEX_PREV_BRANCH)
decoder->record.prev_br_tgt = ip;
break;
case ARM_SPE_COUNTER:
if (idx == SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT)
decoder->record.latency = payload;
break;
case ARM_SPE_CONTEXT:
decoder->record.context_id = payload;
break;
case ARM_SPE_OP_TYPE:
switch (idx) {
case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
decoder->record.op |= ARM_SPE_OP_LDST;
if (payload & SPE_OP_PKT_ST)
decoder->record.op |= ARM_SPE_OP_ST;
else
decoder->record.op |= ARM_SPE_OP_LD;
if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload)) {
decoder->record.op |= ARM_SPE_OP_GP_REG;
} else if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload)) {
decoder->record.op |= ARM_SPE_OP_SIMD_FP;
} else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload)) {
decoder->record.op |= ARM_SPE_OP_UNSPEC_REG;
} else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload)) {
decoder->record.op |= ARM_SPE_OP_NV_SYSREG;
} else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload)) {
decoder->record.op |= ARM_SPE_OP_MTE_TAG;
} else if (SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(payload)) {
if (payload & SPE_OP_PKT_AR)
decoder->record.op |= ARM_SPE_OP_AR;
if (payload & SPE_OP_PKT_EXCL)
decoder->record.op |= ARM_SPE_OP_EXCL;
if (payload & SPE_OP_PKT_AT)
decoder->record.op |= ARM_SPE_OP_ATOMIC;
} else if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload)) {
decoder->record.op |= ARM_SPE_OP_SVE;
if (payload & SPE_OP_PKT_SVE_PRED)
decoder->record.op |= ARM_SPE_OP_PRED;
if (payload & SPE_OP_PKT_SVE_SG)
decoder->record.op |= ARM_SPE_OP_SG;
} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload)) {
decoder->record.op |= ARM_SPE_OP_MEMCPY;
} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload)) {
decoder->record.op |= ARM_SPE_OP_MEMSET;
} else if (SPE_OP_PKT_LDST_SUBCLASS_GCS(payload)) {
decoder->record.op |= ARM_SPE_OP_GCS;
if (payload & SPE_OP_PKT_GCS_COMM)
decoder->record.op |= ARM_SPE_OP_COMM;
}
break;
case SPE_OP_PKT_HDR_CLASS_OTHER:
decoder->record.op |= ARM_SPE_OP_OTHER;
if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload)) {
decoder->record.op |= ARM_SPE_OP_SVE | ARM_SPE_OP_DP;
if (payload & SPE_OP_PKT_OTHER_FP)
decoder->record.op |= ARM_SPE_OP_FP;
if (payload & SPE_OP_PKT_SVE_PRED)
decoder->record.op |= ARM_SPE_OP_PRED;
} else if (SPE_OP_PKT_OTHER_SUBCLASS_SME(payload)) {
decoder->record.op |= ARM_SPE_OP_SME;
if (payload & SPE_OP_PKT_OTHER_FP)
decoder->record.op |= ARM_SPE_OP_FP;
} else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {
if (payload & SPE_OP_PKT_OTHER_ASE)
decoder->record.op |= ARM_SPE_OP_ASE;
if (payload & SPE_OP_PKT_OTHER_FP)
decoder->record.op |= ARM_SPE_OP_FP;
if (payload & SPE_OP_PKT_COND)
decoder->record.op |= ARM_SPE_OP_COND;
}
break;
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
decoder->record.op |= ARM_SPE_OP_BRANCH_ERET;
if (payload & SPE_OP_PKT_COND)
decoder->record.op |= ARM_SPE_OP_BR_COND;
if (payload & SPE_OP_PKT_INDIRECT_BRANCH)
decoder->record.op |= ARM_SPE_OP_BR_INDIRECT;
if (payload & SPE_OP_PKT_GCS)
decoder->record.op |= ARM_SPE_OP_BR_GCS;
if (SPE_OP_PKT_CR_BL(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_BL;
if (SPE_OP_PKT_CR_RET(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_RET;
if (SPE_OP_PKT_CR_NON_BL_RET(payload))
decoder->record.op |= ARM_SPE_OP_BR_CR_NON_BL_RET;
break;
default:
pr_err("Get packet error!\n");
return -1;
}
break;
case ARM_SPE_EVENTS:
decoder->record.type = payload;
break;
case ARM_SPE_DATA_SOURCE:
decoder->record.source = payload;
break;
case ARM_SPE_BAD:
break;
case ARM_SPE_PAD:
break;
default:
pr_err("Get packet error!\n");
return -1;
}
}
return 0;
}
int arm_spe_decode(struct arm_spe_decoder *decoder)
{
return arm_spe_read_record(decoder);
}
linux-7.2.3/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* arm_spe_decoder.h: Arm Statistical Profiling Extensions support
* Copyright (c) 2019-2020, Arm Ltd.
*/
#ifndef INCLUDE__ARM_SPE_DECODER_H__
#define INCLUDE__ARM_SPE_DECODER_H__
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include "arm-spe-pkt-decoder.h"
#define ARM_SPE_L1D_ACCESS BIT(EV_L1D_ACCESS)
#define ARM_SPE_L1D_MISS BIT(EV_L1D_REFILL)
#define ARM_SPE_LLC_ACCESS BIT(EV_LLC_ACCESS)
#define ARM_SPE_LLC_MISS BIT(EV_LLC_MISS)
#define ARM_SPE_TLB_ACCESS BIT(EV_TLB_ACCESS)
#define ARM_SPE_TLB_MISS BIT(EV_TLB_WALK)
#define ARM_SPE_BRANCH_MISS BIT(EV_MISPRED)
#define ARM_SPE_BRANCH_NOT_TAKEN BIT(EV_NOT_TAKEN)
#define ARM_SPE_REMOTE_ACCESS BIT(EV_REMOTE_ACCESS)
#define ARM_SPE_SVE_PARTIAL_PRED BIT(EV_PARTIAL_PREDICATE)
#define ARM_SPE_SVE_EMPTY_PRED BIT(EV_EMPTY_PREDICATE)
#define ARM_SPE_IN_TXN BIT(EV_TRANSACTIONAL)
#define ARM_SPE_L2D_ACCESS BIT(EV_L2D_ACCESS)
#define ARM_SPE_L2D_MISS BIT(EV_L2D_MISS)
#define ARM_SPE_RECENTLY_FETCHED BIT(EV_RECENTLY_FETCHED)
#define ARM_SPE_DATA_SNOOPED BIT(EV_DATA_SNOOPED)
#define ARM_SPE_HITM BIT(EV_CACHE_DATA_MODIFIED)
enum arm_spe_op_type {
/* First level operation type */
ARM_SPE_OP_OTHER = 1 << 0,
ARM_SPE_OP_LDST = 1 << 1,
ARM_SPE_OP_BRANCH_ERET = 1 << 2,
};
enum arm_spe_2nd_op_ldst {
ARM_SPE_OP_GP_REG = 1 << 8,
ARM_SPE_OP_UNSPEC_REG = 1 << 9,
ARM_SPE_OP_NV_SYSREG = 1 << 10,
ARM_SPE_OP_SIMD_FP = 1 << 11,
ARM_SPE_OP_SVE = 1 << 12,
ARM_SPE_OP_MTE_TAG = 1 << 13,
ARM_SPE_OP_MEMCPY = 1 << 14,
ARM_SPE_OP_MEMSET = 1 << 15,
ARM_SPE_OP_GCS = 1 << 16,
ARM_SPE_OP_SME = 1 << 17,
ARM_SPE_OP_ASE = 1 << 18,
/* Assisted information for memory / SIMD */
ARM_SPE_OP_LD = 1 << 20,
ARM_SPE_OP_ST = 1 << 21,
ARM_SPE_OP_ATOMIC = 1 << 22,
ARM_SPE_OP_EXCL = 1 << 23,
ARM_SPE_OP_AR = 1 << 24,
ARM_SPE_OP_DP = 1 << 25, /* Data processing */
ARM_SPE_OP_PRED = 1 << 26, /* Predicated */
ARM_SPE_OP_SG = 1 << 27, /* Gather/Scatter */
ARM_SPE_OP_COMM = 1 << 28, /* Common */
ARM_SPE_OP_FP = 1 << 29, /* Floating-point */
ARM_SPE_OP_COND = 1 << 30, /* Conditional */
};
enum arm_spe_2nd_op_branch {
ARM_SPE_OP_BR_COND = 1 << 8,
ARM_SPE_OP_BR_INDIRECT = 1 << 9,
ARM_SPE_OP_BR_GCS = 1 << 10,
ARM_SPE_OP_BR_CR_BL = 1 << 11,
ARM_SPE_OP_BR_CR_RET = 1 << 12,
ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 13,
};
enum arm_spe_common_data_source {
ARM_SPE_COMMON_DS_L1D = 0x0,
ARM_SPE_COMMON_DS_L2 = 0x8,
ARM_SPE_COMMON_DS_PEER_CORE = 0x9,
ARM_SPE_COMMON_DS_LOCAL_CLUSTER = 0xa,
ARM_SPE_COMMON_DS_SYS_CACHE = 0xb,
ARM_SPE_COMMON_DS_PEER_CLUSTER = 0xc,
ARM_SPE_COMMON_DS_REMOTE = 0xd,
ARM_SPE_COMMON_DS_DRAM = 0xe,
};
enum arm_spe_ampereone_data_source {
ARM_SPE_AMPEREONE_LOCAL_CHIP_CACHE_OR_DEVICE = 0x0,
ARM_SPE_AMPEREONE_SLC = 0x3,
ARM_SPE_AMPEREONE_REMOTE_CHIP_CACHE = 0x5,
ARM_SPE_AMPEREONE_DDR = 0x7,
ARM_SPE_AMPEREONE_L1D = 0x8,
ARM_SPE_AMPEREONE_L2D = 0x9,
};
enum arm_spe_hisi_hip_data_source {
ARM_SPE_HISI_HIP_PEER_CPU = 0,
ARM_SPE_HISI_HIP_PEER_CPU_HITM = 1,
ARM_SPE_HISI_HIP_L3 = 2,
ARM_SPE_HISI_HIP_L3_HITM = 3,
ARM_SPE_HISI_HIP_PEER_CLUSTER = 4,
ARM_SPE_HISI_HIP_PEER_CLUSTER_HITM = 5,
ARM_SPE_HISI_HIP_REMOTE_SOCKET = 6,
ARM_SPE_HISI_HIP_REMOTE_SOCKET_HITM = 7,
ARM_SPE_HISI_HIP_LOCAL_MEM = 8,
ARM_SPE_HISI_HIP_REMOTE_MEM = 9,
ARM_SPE_HISI_HIP_NC_DEV = 13,
ARM_SPE_HISI_HIP_L2 = 16,
ARM_SPE_HISI_HIP_L2_HITM = 17,
ARM_SPE_HISI_HIP_L1 = 18,
};
struct arm_spe_record {
u64 type;
int err;
u32 op;
u32 latency;
u64 from_ip;
u64 to_ip;
u64 prev_br_tgt;
u64 timestamp;
u64 virt_addr;
u64 phys_addr;
u64 context_id;
u16 source;
};
struct arm_spe_insn;
struct arm_spe_buffer {
const unsigned char *buf;
size_t len;
u64 offset;
u64 trace_nr;
};
struct arm_spe_params {
int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
void *data;
};
struct arm_spe_decoder {
int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
void *data;
struct arm_spe_record record;
const unsigned char *buf;
size_t len;
u64 midr;
};
struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params);
void arm_spe_decoder_free(struct arm_spe_decoder *decoder);
int arm_spe_decode(struct arm_spe_decoder *decoder);
#endif
linux-7.2.3/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
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// SPDX-License-Identifier: GPL-2.0
/*
* Arm Statistical Profiling Extensions (SPE) support
* Copyright (c) 2017-2018, Arm Ltd.
*/
#include <stdio.h>
#include <string.h>
#include <endian.h>
#include <byteswap.h>
#include <linux/bitmap.h>
#include <linux/bitops.h>
#include <stdarg.h>
#include <linux/kernel.h>
#include <linux/unaligned.h>
#include "arm-spe-pkt-decoder.h"
#include "../../arm64/include/asm/cputype.h"
static const char * const arm_spe_packet_name[] = {
[ARM_SPE_PAD] = "PAD",
[ARM_SPE_END] = "END",
[ARM_SPE_TIMESTAMP] = "TS",
[ARM_SPE_ADDRESS] = "ADDR",
[ARM_SPE_COUNTER] = "LAT",
[ARM_SPE_CONTEXT] = "CONTEXT",
[ARM_SPE_OP_TYPE] = "OP-TYPE",
[ARM_SPE_EVENTS] = "EVENTS",
[ARM_SPE_DATA_SOURCE] = "DATA-SOURCE",
};
const char *arm_spe_pkt_name(enum arm_spe_pkt_type type)
{
return arm_spe_packet_name[type];
}
/*
* Extracts the field "sz" from header bits and converts to bytes:
* 00 : byte (1)
* 01 : halfword (2)
* 10 : word (4)
* 11 : doubleword (8)
*/
static unsigned int arm_spe_payload_len(unsigned char hdr)
{
return 1U << ((hdr & GENMASK_ULL(5, 4)) >> 4);
}
static int arm_spe_get_payload(const unsigned char *buf, size_t len,
unsigned char ext_hdr,
struct arm_spe_pkt *packet)
{
size_t payload_len = arm_spe_payload_len(buf[ext_hdr]);
if (len < 1 + ext_hdr + payload_len)
return ARM_SPE_NEED_MORE_BYTES;
buf += 1 + ext_hdr;
switch (payload_len) {
case 1: packet->payload = *(uint8_t *)buf; break;
case 2: packet->payload = get_unaligned_le16(buf); break;
case 4: packet->payload = get_unaligned_le32(buf); break;
case 8: packet->payload = get_unaligned_le64(buf); break;
default: return ARM_SPE_BAD_PACKET;
}
return 1 + ext_hdr + payload_len;
}
static int arm_spe_get_pad(struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_PAD;
return 1;
}
static int arm_spe_get_alignment(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
unsigned int alignment = 1 << ((buf[0] & 0xf) + 1);
if (len < alignment)
return ARM_SPE_NEED_MORE_BYTES;
packet->type = ARM_SPE_PAD;
return alignment - (((uintptr_t)buf) & (alignment - 1));
}
static int arm_spe_get_end(struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_END;
return 1;
}
static int arm_spe_get_timestamp(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_TIMESTAMP;
return arm_spe_get_payload(buf, len, 0, packet);
}
static int arm_spe_get_events(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_EVENTS;
/* we use index to identify Events with a less number of
* comparisons in arm_spe_pkt_desc(): E.g., the LLC-ACCESS,
* LLC-REFILL, and REMOTE-ACCESS events are identified if
* index > 1.
*/
packet->index = arm_spe_payload_len(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}
static int arm_spe_get_data_source(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_DATA_SOURCE;
return arm_spe_get_payload(buf, len, 0, packet);
}
static int arm_spe_get_context(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_CONTEXT;
packet->index = SPE_CTX_PKT_HDR_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}
static int arm_spe_get_op_type(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_OP_TYPE;
packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}
static int arm_spe_get_counter(const unsigned char *buf, size_t len,
const unsigned char ext_hdr, struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_COUNTER;
if (ext_hdr)
packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]);
else
packet->index = SPE_HDR_SHORT_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, ext_hdr, packet);
}
static int arm_spe_get_addr(const unsigned char *buf, size_t len,
const unsigned char ext_hdr, struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_ADDRESS;
if (ext_hdr)
packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]);
else
packet->index = SPE_HDR_SHORT_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, ext_hdr, packet);
}
static int arm_spe_do_get_packet(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
unsigned int hdr;
unsigned char ext_hdr = 0;
memset(packet, 0, sizeof(struct arm_spe_pkt));
if (!len)
return ARM_SPE_NEED_MORE_BYTES;
hdr = buf[0];
if (hdr == SPE_HEADER0_PAD)
return arm_spe_get_pad(packet);
if (hdr == SPE_HEADER0_END) /* no timestamp at end of record */
return arm_spe_get_end(packet);
if (hdr == SPE_HEADER0_TIMESTAMP)
return arm_spe_get_timestamp(buf, len, packet);
if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_EVENTS)
return arm_spe_get_events(buf, len, packet);
if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_SOURCE)
return arm_spe_get_data_source(buf, len, packet);
if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_CONTEXT)
return arm_spe_get_context(buf, len, packet);
if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_OP_TYPE)
return arm_spe_get_op_type(buf, len, packet);
if ((hdr & SPE_HEADER0_MASK2) == SPE_HEADER0_EXTENDED) {
/* 16-bit extended format header */
if (len == 1)
return ARM_SPE_BAD_PACKET;
ext_hdr = 1;
hdr = buf[1];
if (hdr == SPE_HEADER1_ALIGNMENT)
return arm_spe_get_alignment(buf, len, packet);
}
/*
* The short format header's byte 0 or the extended format header's
* byte 1 has been assigned to 'hdr', which uses the same encoding for
* address packet and counter packet, so don't need to distinguish if
* it's short format or extended format and handle in once.
*/
if ((hdr & SPE_HEADER0_MASK3) == SPE_HEADER0_ADDRESS)
return arm_spe_get_addr(buf, len, ext_hdr, packet);
if ((hdr & SPE_HEADER0_MASK3) == SPE_HEADER0_COUNTER)
return arm_spe_get_counter(buf, len, ext_hdr, packet);
return ARM_SPE_BAD_PACKET;
}
int arm_spe_get_packet(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet, u64 midr)
{
int ret;
ret = arm_spe_do_get_packet(buf, len, packet);
packet->midr = midr;
/* put multiple consecutive PADs on the same line, up to
* the fixed-width output format of 16 bytes per line.
*/
if (ret > 0 && packet->type == ARM_SPE_PAD) {
while (ret < 16 && len > (size_t)ret && !buf[ret])
ret += 1;
}
return ret;
}
static int arm_spe_pkt_out_string(int *err, char **buf_p, size_t *blen,
const char *fmt, ...)
{
va_list ap;
int ret;
/* Bail out if any error occurred */
if (err && *err)
return *err;
va_start(ap, fmt);
ret = vsnprintf(*buf_p, *blen, fmt, ap);
va_end(ap);
if (ret < 0) {
if (err && !*err)
*err = ret;
/*
* A return value of *blen or more means that the output was
* truncated and the buffer is overrun.
*/
} else if ((size_t)ret >= *blen) {
(*buf_p)[*blen - 1] = '\0';
/*
* Set *err to 'ret' to avoid overflow if tries to
* fill this buffer sequentially.
*/
if (err && !*err)
*err = ret;
} else {
*buf_p += ret;
*blen -= ret;
}
return ret;
}
struct ev_string {
u8 event;
const char *desc;
};
static const struct ev_string common_ev_strings[] = {
{ .event = EV_EXCEPTION_GEN, .desc = "EXCEPTION-GEN" },
{ .event = EV_RETIRED, .desc = "RETIRED" },
{ .event = EV_L1D_ACCESS, .desc = "L1D-ACCESS" },
{ .event = EV_L1D_REFILL, .desc = "L1D-REFILL" },
{ .event = EV_TLB_ACCESS, .desc = "TLB-ACCESS" },
{ .event = EV_TLB_WALK, .desc = "TLB-REFILL" },
{ .event = EV_NOT_TAKEN, .desc = "NOT-TAKEN" },
{ .event = EV_MISPRED, .desc = "MISPRED" },
{ .event = EV_LLC_ACCESS, .desc = "LLC-ACCESS" },
{ .event = EV_LLC_MISS, .desc = "LLC-REFILL" },
{ .event = EV_REMOTE_ACCESS, .desc = "REMOTE-ACCESS" },
{ .event = EV_ALIGNMENT, .desc = "ALIGNMENT" },
{ .event = EV_TRANSACTIONAL, .desc = "TXN" },
{ .event = EV_PARTIAL_PREDICATE, .desc = "SVE-PARTIAL-PRED" },
{ .event = EV_EMPTY_PREDICATE, .desc = "SVE-EMPTY-PRED" },
{ .event = EV_L2D_ACCESS, .desc = "L2D-ACCESS" },
{ .event = EV_L2D_MISS, .desc = "L2D-MISS" },
{ .event = EV_CACHE_DATA_MODIFIED, .desc = "HITM" },
{ .event = EV_RECENTLY_FETCHED, .desc = "LFB" },
{ .event = EV_DATA_SNOOPED, .desc = "SNOOPED" },
{ .event = EV_STREAMING_SVE_MODE, .desc = "STREAMING-SVE" },
{ .event = EV_SMCU, .desc = "SMCU" },
{ .event = 0, .desc = NULL },
};
static const struct ev_string n1_event_strings[] = {
{ .event = 12, .desc = "LATE-PREFETCH" },
{ .event = 0, .desc = NULL },
};
static u64 print_event_list(int *err, char **buf, size_t *buf_len,
const struct ev_string *ev_strings, u64 payload)
{
for (const struct ev_string *ev = ev_strings; ev->desc != NULL; ev++) {
if (payload & BIT_ULL(ev->event))
arm_spe_pkt_out_string(err, buf, buf_len, " %s", ev->desc);
payload &= ~BIT_ULL(ev->event);
}
return payload;
}
struct event_print_handle {
const struct midr_range *midr_ranges;
const struct ev_string *ev_strings;
};
#define EV_PRINT(range, strings) \
{ \
.midr_ranges = range, \
.ev_strings = strings, \
}
static const struct midr_range n1_event_encoding_cpus[] = {
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
{},
};
static const struct event_print_handle event_print_handles[] = {
EV_PRINT(n1_event_encoding_cpus, n1_event_strings),
};
static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
u64 payload = packet->payload;
int err = 0;
arm_spe_pkt_out_string(&err, &buf, &buf_len, "EV");
payload = print_event_list(&err, &buf, &buf_len, common_ev_strings,
payload);
/* Try to decode IMPDEF bits for known CPUs */
for (unsigned int i = 0; i < ARRAY_SIZE(event_print_handles); i++) {
if (is_midr_in_range_list(packet->midr,
event_print_handles[i].midr_ranges))
payload = print_event_list(&err, &buf, &buf_len,
event_print_handles[i].ev_strings,
payload);
}
/*
* Print remaining IMPDEF bits that weren't printed above as raw
* "IMPDEF:1,2,3,4" etc.
*/
if (payload) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " IMPDEF:");
for (int i = 0; i < 64; i++) {
const char *sep = payload & (payload - 1) ? "," : "";
if (payload & BIT_ULL(i)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, "%d%s", i,
sep);
payload &= ~BIT_ULL(i);
}
}
}
return err;
}
static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
u64 payload = packet->payload;
int err = 0;
switch (packet->index) {
case SPE_OP_PKT_HDR_CLASS_OTHER:
if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, "SVE-OTHER");
/* SVE effective vector length */
arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d",
SPE_OP_PKG_SVE_EVL(payload));
if (payload & SPE_OP_PKT_SVE_FP)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");
if (payload & SPE_OP_PKT_SVE_PRED)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");
} else if (SPE_OP_PKT_OTHER_SUBCLASS_SME(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, "SME-OTHER");
/* SME effective vector length or tile size */
arm_spe_pkt_out_string(&err, &buf, &buf_len, " ETS %d",
SPE_OP_PKG_SME_ETS(payload));
if (payload & SPE_OP_PKT_OTHER_FP)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");
} else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, "OTHER");
if (payload & SPE_OP_PKT_OTHER_ASE)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " ASE");
if (payload & SPE_OP_PKT_OTHER_FP)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " FP");
arm_spe_pkt_out_string(&err, &buf, &buf_len, " %s",
payload & SPE_OP_PKT_COND ?
"COND-SELECT" : "INSN-OTHER");
}
break;
case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
arm_spe_pkt_out_string(&err, &buf, &buf_len,
payload & 0x1 ? "ST" : "LD");
if (SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(payload)) {
if (payload & SPE_OP_PKT_AT)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " AT");
if (payload & SPE_OP_PKT_EXCL)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL");
if (payload & SPE_OP_PKT_AR)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR");
} else if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP");
} else if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " GP-REG");
} else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " UNSPEC-REG");
} else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " NV-SYSREG");
} else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " MTE-TAG");
} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMCPY");
} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMSET");
} else if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-SME-REG");
/* SVE effective vector length */
arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d",
SPE_OP_PKG_SVE_EVL(payload));
if (payload & SPE_OP_PKT_SVE_PRED)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");
if (payload & SPE_OP_PKT_SVE_SG)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " SG");
} else if (SPE_OP_PKT_LDST_SUBCLASS_GCS(payload)) {
arm_spe_pkt_out_string(&err, &buf, &buf_len, " GCS");
if (payload & SPE_OP_PKT_GCS_COMM)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " COMM");
}
break;
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
arm_spe_pkt_out_string(&err, &buf, &buf_len, "B");
if (payload & SPE_OP_PKT_COND)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " COND");
if (payload & SPE_OP_PKT_INDIRECT_BRANCH)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " IND");
if (payload & SPE_OP_PKT_GCS)
arm_spe_pkt_out_string(&err, &buf, &buf_len, " GCS");
if (SPE_OP_PKT_CR_BL(payload))
arm_spe_pkt_out_string(&err, &buf, &buf_len, " CR-BL");
if (SPE_OP_PKT_CR_RET(payload))
arm_spe_pkt_out_string(&err, &buf, &buf_len, " CR-RET");
if (SPE_OP_PKT_CR_NON_BL_RET(payload))
arm_spe_pkt_out_string(&err, &buf, &buf_len, " CR-NON-BL-RET");
break;
default:
/* Unknown index */
err = -1;
break;
}
return err;
}
static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
int ns, el, idx = packet->index;
int ch, pat;
u64 payload = packet->payload;
int err = 0;
static const char *idx_name[] = {"PC", "TGT", "VA", "PA", "PBT"};
switch (idx) {
case SPE_ADDR_PKT_HDR_INDEX_INS:
case SPE_ADDR_PKT_HDR_INDEX_BRANCH:
case SPE_ADDR_PKT_HDR_INDEX_PREV_BRANCH:
ns = !!SPE_ADDR_PKT_GET_NS(payload);
el = SPE_ADDR_PKT_GET_EL(payload);
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
arm_spe_pkt_out_string(&err, &buf, &buf_len,
"%s 0x%llx el%d ns=%d",
idx_name[idx], payload, el, ns);
break;
case SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT:
arm_spe_pkt_out_string(&err, &buf, &buf_len,
"VA 0x%llx", payload);
break;
case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS:
ns = !!SPE_ADDR_PKT_GET_NS(payload);
ch = !!SPE_ADDR_PKT_GET_CH(payload);
pat = SPE_ADDR_PKT_GET_PAT(payload);
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
arm_spe_pkt_out_string(&err, &buf, &buf_len,
"PA 0x%llx ns=%d ch=%d pat=%x",
payload, ns, ch, pat);
break;
default:
/* Unknown index */
err = -1;
break;
}
return err;
}
static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
u64 payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
int err = 0;
arm_spe_pkt_out_string(&err, &buf, &buf_len, "%s %d ", name,
(unsigned short)payload);
switch (packet->index) {
case SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT:
arm_spe_pkt_out_string(&err, &buf, &buf_len, "TOT");
break;
case SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT:
arm_spe_pkt_out_string(&err, &buf, &buf_len, "ISSUE");
break;
case SPE_CNT_PKT_HDR_INDEX_TRANS_LAT:
arm_spe_pkt_out_string(&err, &buf, &buf_len, "XLAT");
break;
default:
break;
}
return err;
}
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
size_t buf_len)
{
int idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
char *buf_orig = buf;
size_t blen = buf_len;
int err = 0;
switch (packet->type) {
case ARM_SPE_BAD:
case ARM_SPE_PAD:
case ARM_SPE_END:
arm_spe_pkt_out_string(&err, &buf, &blen, "%s", name);
break;
case ARM_SPE_EVENTS:
err = arm_spe_pkt_desc_event(packet, buf, buf_len);
break;
case ARM_SPE_OP_TYPE:
err = arm_spe_pkt_desc_op_type(packet, buf, buf_len);
break;
case ARM_SPE_DATA_SOURCE:
case ARM_SPE_TIMESTAMP:
arm_spe_pkt_out_string(&err, &buf, &blen, "%s %lld", name, payload);
break;
case ARM_SPE_ADDRESS:
err = arm_spe_pkt_desc_addr(packet, buf, buf_len);
break;
case ARM_SPE_CONTEXT:
arm_spe_pkt_out_string(&err, &buf, &blen, "%s 0x%lx el%d",
name, (unsigned long)payload, idx + 1);
break;
case ARM_SPE_COUNTER:
err = arm_spe_pkt_desc_counter(packet, buf, buf_len);
break;
default:
/* Unknown packet type */
err = -1;
break;
}
/* Output raw data if detect any error */
if (err) {
err = 0;
arm_spe_pkt_out_string(&err, &buf_orig, &buf_len, "%s 0x%llx (%d)",
name, payload, packet->index);
}
return err;
}
linux-7.2.3/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+191
View File
@@ -0,0 +1,191 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Arm Statistical Profiling Extensions (SPE) support
* Copyright (c) 2017-2018, Arm Ltd.
*/
#ifndef INCLUDE__ARM_SPE_PKT_DECODER_H__
#define INCLUDE__ARM_SPE_PKT_DECODER_H__
#include <linux/bitfield.h>
#include <stddef.h>
#include <stdint.h>
#define ARM_SPE_PKT_DESC_MAX 512
#define ARM_SPE_NEED_MORE_BYTES -1
#define ARM_SPE_BAD_PACKET -2
#define ARM_SPE_PKT_MAX_SZ 16
enum arm_spe_pkt_type {
ARM_SPE_BAD,
ARM_SPE_PAD,
ARM_SPE_END,
ARM_SPE_TIMESTAMP,
ARM_SPE_ADDRESS,
ARM_SPE_COUNTER,
ARM_SPE_CONTEXT,
ARM_SPE_OP_TYPE,
ARM_SPE_EVENTS,
ARM_SPE_DATA_SOURCE,
};
struct arm_spe_pkt {
enum arm_spe_pkt_type type;
unsigned char index;
uint64_t payload;
uint64_t midr;
};
/* Short header (HEADER0) and extended header (HEADER1) */
#define SPE_HEADER0_PAD 0x0
#define SPE_HEADER0_END 0x1
#define SPE_HEADER0_TIMESTAMP 0x71
/* Mask for event & data source */
#define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0))
#define SPE_HEADER0_EVENTS 0x42
#define SPE_HEADER0_SOURCE 0x43
/* Mask for context & operation */
#define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2)
#define SPE_HEADER0_CONTEXT 0x64
#define SPE_HEADER0_OP_TYPE 0x48
/* Mask for extended format */
#define SPE_HEADER0_EXTENDED 0x20
/* Mask for address & counter */
#define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3)
#define SPE_HEADER0_ADDRESS 0xb0
#define SPE_HEADER0_COUNTER 0x98
#define SPE_HEADER1_ALIGNMENT 0x0
#define SPE_HDR_SHORT_INDEX(h) ((h) & GENMASK_ULL(2, 0))
#define SPE_HDR_EXTENDED_INDEX(h0, h1) (((h0) & GENMASK_ULL(1, 0)) << 3 | \
SPE_HDR_SHORT_INDEX(h1))
/* Address packet header */
#define SPE_ADDR_PKT_HDR_INDEX_INS 0x0
#define SPE_ADDR_PKT_HDR_INDEX_BRANCH 0x1
#define SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT 0x2
#define SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS 0x3
#define SPE_ADDR_PKT_HDR_INDEX_PREV_BRANCH 0x4
/* Address packet payload */
#define SPE_ADDR_PKT_ADDR_BYTE7_SHIFT 56
#define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0))
#define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48)
#define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63)
#define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61)
#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62)
#define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56)
#define SPE_ADDR_PKT_EL0 0
#define SPE_ADDR_PKT_EL1 1
#define SPE_ADDR_PKT_EL2 2
#define SPE_ADDR_PKT_EL3 3
/* Context packet header */
#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0))
/* Counter packet header */
#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT 0x0
#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT 0x1
#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT 0x2
/* Event packet payload */
enum arm_spe_events {
EV_EXCEPTION_GEN = 0,
EV_RETIRED = 1,
EV_L1D_ACCESS = 2,
EV_L1D_REFILL = 3,
EV_TLB_ACCESS = 4,
EV_TLB_WALK = 5,
EV_NOT_TAKEN = 6,
EV_MISPRED = 7,
EV_LLC_ACCESS = 8,
EV_LLC_MISS = 9,
EV_REMOTE_ACCESS = 10,
EV_ALIGNMENT = 11,
EV_TRANSACTIONAL = 16,
EV_PARTIAL_PREDICATE = 17,
EV_EMPTY_PREDICATE = 18,
EV_L2D_ACCESS = 19,
EV_L2D_MISS = 20,
EV_CACHE_DATA_MODIFIED = 21,
EV_RECENTLY_FETCHED = 22,
EV_DATA_SNOOPED = 23,
EV_STREAMING_SVE_MODE = 24,
EV_SMCU = 25,
};
/* Operation packet header */
#define SPE_OP_PKT_HDR_CLASS(h) ((h) & GENMASK_ULL(1, 0))
#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0
#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2
#define SPE_OP_PKT_OTHER_SUBCLASS_OTHER(v) (((v) & GENMASK_ULL(7, 3)) == 0x0)
#define SPE_OP_PKT_OTHER_SUBCLASS_SVE(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8)
#define SPE_OP_PKT_OTHER_SUBCLASS_SME(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x88)
#define SPE_OP_PKT_OTHER_ASE BIT(2)
#define SPE_OP_PKT_OTHER_FP BIT(1)
/*
* SME effective vector length or tile size (ETS) is stored in byte 0
* bits [6:4,2]; the length is rounded up to a power of two and use 128
* as one step, so ETS calculation is:
*
* 128 * (2 ^ bits [6:4,2]) = 32 << (bits [6:4,2])
*/
#define SPE_OP_PKG_SME_ETS(v) (128 << (FIELD_GET(GENMASK_ULL(6, 4), (v)) << 1 | \
(FIELD_GET(BIT(2), (v)))))
#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x0)
#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(v) (((v) & GENMASK_ULL(7, 1)) == 0x4)
#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x10)
#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(v) (((v) & GENMASK_ULL(7, 1)) == 0x30)
#define SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(v) (((v) & GENMASK_ULL(7, 1)) == 0x14)
#define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(v) (((v) & GENMASK_ULL(7, 1)) == 0x20)
#define SPE_OP_PKT_LDST_SUBCLASS_MEMSET(v) (((v) & GENMASK_ULL(7, 0)) == 0x25)
#define SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)
#define SPE_OP_PKT_AR BIT(4)
#define SPE_OP_PKT_EXCL BIT(3)
#define SPE_OP_PKT_AT BIT(2)
#define SPE_OP_PKT_ST BIT(0)
#define SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(v) (((v) & (BIT(3) | BIT(1))) == 0x8)
#define SPE_OP_PKT_SVE_SG BIT(7)
/*
* SVE effective vector length (EVL) is stored in byte 0 bits [6:4];
* the length is rounded up to a power of two and use 32 as one step,
* so EVL calculation is:
*
* 32 * (2 ^ bits [6:4]) = 32 << (bits [6:4])
*/
#define SPE_OP_PKG_SVE_EVL(v) (32 << (((v) & GENMASK_ULL(6, 4)) >> 4))
#define SPE_OP_PKT_SVE_PRED BIT(2)
#define SPE_OP_PKT_SVE_FP BIT(1)
#define SPE_OP_PKT_LDST_SUBCLASS_GCS(v) (((v) & (GENMASK_ULL(7, 3) | BIT(1))) == 0x40)
#define SPE_OP_PKT_GCS_COMM BIT(2)
#define SPE_OP_PKT_CR_MASK GENMASK_ULL(4, 3)
#define SPE_OP_PKT_CR_BL(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 1)
#define SPE_OP_PKT_CR_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 2)
#define SPE_OP_PKT_CR_NON_BL_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 3)
#define SPE_OP_PKT_GCS BIT(2)
#define SPE_OP_PKT_INDIRECT_BRANCH BIT(1)
#define SPE_OP_PKT_COND BIT(0)
const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
int arm_spe_get_packet(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet, u64 midr);
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t len);
#endif