// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the RZN1D-DB Board
 *
 * Copyright (C) 2018 Renesas Electronics Europe Limited
 *
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/pcs-rzn1-miic.h>
#include <dt-bindings/pinctrl/rzn1-pinctrl.h>

#include "r9a06g032.dtsi"

/ {
	model = "RZN1D-DB Board";
	compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		serial0 = &uart0;
	};

	keyboard {
		compatible = "gpio-keys-polled";
		poll-interval = <100>;

		switch-1 {
			linux,code = <KEY_1>;
			label = "SW1-1";
			debounce-interval = <20>;
			gpios = <&pca9698 8 GPIO_ACTIVE_LOW>;
		};

		switch-2 {
			linux,code = <KEY_2>;
			label = "SW1-2";
			debounce-interval = <20>;
			gpios = <&pca9698 9 GPIO_ACTIVE_LOW>;
		};

		switch-3 {
			linux,code = <KEY_3>;
			label = "SW1-3";
			debounce-interval = <20>;
			gpios = <&pca9698 10 GPIO_ACTIVE_LOW>;
		};

		switch-4 {
			linux,code = <KEY_4>;
			label = "SW1-4";
			debounce-interval = <20>;
			gpios = <&pca9698 11 GPIO_ACTIVE_LOW>;
		};

		switch-5 {
			linux,code = <KEY_5>;
			label = "SW1-5";
			debounce-interval = <20>;
			gpios = <&pca9698 12 GPIO_ACTIVE_LOW>;
		};

		switch-6 {
			linux,code = <KEY_6>;
			label = "SW1-6";
			debounce-interval = <20>;
			gpios = <&pca9698 13 GPIO_ACTIVE_LOW>;
		};

		switch-7 {
			linux,code = <KEY_7>;
			label = "SW1-7";
			debounce-interval = <20>;
			gpios = <&pca9698 14 GPIO_ACTIVE_LOW>;
		};

		switch-8 {
			linux,code = <KEY_8>;
			label = "SW1-8";
			debounce-interval = <20>;
			gpios = <&pca9698 15 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led-dbg0 {
			gpios = <&pca9698 0 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <0>;
		};

		led-dbg1 {
			gpios = <&pca9698 1 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <1>;
		};

		led-dbg2 {
			gpios = <&pca9698 2 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <2>;
		};

		led-dbg3 {
			gpios = <&pca9698 3 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <3>;
		};

		led-dbg4 {
			gpios = <&pca9698 4 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <4>;
		};

		led-dbg5 {
			gpios = <&pca9698 5 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <5>;
		};

		led-dbg6 {
			gpios = <&pca9698 6 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <6>;
		};

		led-dbg7 {
			gpios = <&pca9698 7 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_DEBUG;
			function-enumerator = <7>;
		};
	};
};

&can0 {
	pinctrl-0 = <&pins_can0>;
	pinctrl-names = "default";

	/* Assuming CN10/CN11 are wired for CAN1 */
	status = "okay";
};

&can1 {
	pinctrl-0 = <&pins_can1>;
	pinctrl-names = "default";

	/* Please only enable can0 or can1, depending on CN10/CN11 */
	/* status = "okay"; */
};

&eth_miic {
	status = "okay";
	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
};

&ext_rtc_clk {
	clock-frequency = <32768>;
};

&gmac2 {
	status = "okay";
	phy-mode = "gmii";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&gpioirqmux {
	interrupt-map = <89 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* pin 147: phy@4 */
			<91 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; /* pin 149: phy@5 */
	status = "okay";
};

&gpio2 {
	pinctrl-0 = <&pins_gpio2>;
	pinctrl-names = "default";
	status = "okay";
};

&i2c2 {
	pinctrl-0 = <&pins_i2c2>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <400000>;

	pca9698: gpio@20 {
		compatible = "nxp,pca9698";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;

		/* configure the analog switch to let i2c2 access the eeprom */
		max4662-in1-hog {
			gpio-hog;
			gpios = <16 0>;
			output-high;
		};
		max4662-in2-hog {
			gpio-hog;
			gpios = <17 0>;
			output-low;
		};
		max4662-in3-hog {
			gpio-hog;
			gpios = <18 0>;
			output-low;
		};
	};

	/* Some revisions may have a 24cs64 at address 0x58 */
	eeprom@50 {
		compatible = "atmel,24c64";
		pagesize = <32>;
		reg = <0x50>;
	};
};

&mii_conv4 {
	renesas,miic-input = <MIIC_SWITCH_PORTB>;
	status = "okay";
};

&mii_conv5 {
	renesas,miic-input = <MIIC_SWITCH_PORTA>;
	status = "okay";
};

&pinctrl {
	pinctrl-names = "default";
	pinctrl-0 = <&pins_cpld>;

	pins_can0: pins-can0 {
		pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>,	/* CAN0_TXD */
			 <RZN1_PINMUX(163, RZN1_FUNC_CAN)>;	/* CAN0_RXD */
		drive-strength = <6>;
	};

	pins_can1: pins-can1 {
		pinmux = <RZN1_PINMUX(109, RZN1_FUNC_CAN)>,	/* CAN1_TXD */
			 <RZN1_PINMUX(110, RZN1_FUNC_CAN)>;	/* CAN1_RXD */
		drive-strength = <6>;
	};

	pins_cpld: pins-cpld {
		pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
			 <RZN1_PINMUX(120, RZN1_FUNC_USB)>,
			 <RZN1_PINMUX(121, RZN1_FUNC_USB)>,
			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
	};

	pins_eth3: pins-eth3 {
		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(38, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(39, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(40, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(41, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(42, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(43, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(44, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(45, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(46, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(47, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
		drive-strength = <6>;
		bias-disable;
	};

	pins_eth4: pins-eth4 {
		pinmux = <RZN1_PINMUX(48, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(49, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(50, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(51, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(52, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(53, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(54, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(55, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(56, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(57, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(58, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
			 <RZN1_PINMUX(59, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
		drive-strength = <6>;
		bias-disable;
	};

	pins_gpio2: pins-gpio2 {
		pinmux = <RZN1_PINMUX(147, RZN1_FUNC_GPIO)>,
			 <RZN1_PINMUX(149, RZN1_FUNC_GPIO)>;
		drive-strength = <6>;
		bias-pull-up;
	};

	pins_i2c2: pins-i2c2 {
		pinmux = <RZN1_PINMUX(115, RZN1_FUNC_I2C)>,
			 <RZN1_PINMUX(116, RZN1_FUNC_I2C)>;
		drive-strength = <12>;
	};

	pins_mdio1: pins-mdio1 {
		pinmux = <RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)>,
			 <RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)>;
	};

	pins_qspi0: pins-qspi0 {
		pinmux = <RZN1_PINMUX(74, RZN1_FUNC_QSPI)>,
			 <RZN1_PINMUX(75, RZN1_FUNC_QSPI)>,
			 <RZN1_PINMUX(76, RZN1_FUNC_QSPI)>,
			 <RZN1_PINMUX(77, RZN1_FUNC_QSPI)>,
			 <RZN1_PINMUX(78, RZN1_FUNC_QSPI)>,
			 <RZN1_PINMUX(79, RZN1_FUNC_QSPI)>;
		bias-disable;
	};
};

&qspi0 {
	pinctrl-0 = <&pins_qspi0>;
	pinctrl-names = "default";
	status = "okay";
	bootph-all;

	flash@0 {
		reg = <0>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <62500000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <4>;
		cdns,read-delay = <1>;
		cdns,tshsl-ns = <200>;
		cdns,tsd2d-ns = <255>;
		cdns,tchsh-ns = <20>;
		cdns,tslch-ns = <20>;
		bootph-all;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				/* 64KiB */
				label = "spl";
				reg = <0x0000000 0x00010000>;
			};
			partition@10000 {
				/* 64KiB */
				label = "pkgt";
				reg = <0x0010000 0x00010000>;
			};
			partition@20000 {
				/* 512KiB */
				label = "u-boot";
				reg = <0x0020000 0x00080000>;
			};
			partition@a0000 {
				/* 64KiB */
				label = "env";
				reg = <0x00a0000 0x00010000>;
			};
			partition@b0000 {
				/* 128KiB */
				label = "dtb";
				reg = <0x00b0000 0x00020000>;
			};
			partition@d0000 {
				/* 1MiB */
				label = "cm3";
				reg = <0x00d0000 0x00100000>;
			};
			partition@1d0000 {
				/* 6MiB */
				label = "kernel";
				reg = <0x01d0000 0x00600000>;
			};
			partition@7d0000 {
				/* Remaining */
				label = "data";
				reg = <0x07d0000 0x1830000>;
			};
		};
	};
};

&rtc0 {
	status = "okay";
};

&switch {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>;

	dsa,member = <0 0>;

	mdio {
		clock-frequency = <2500000>;

		#address-cells = <1>;
		#size-cells = <0>;

		switch0phy4: ethernet-phy@4 {
			reg = <4>;
			micrel,led-mode = <1>;
			interrupts-extended = <&gpio2a 25 IRQ_TYPE_LEVEL_LOW>;
		};

		switch0phy5: ethernet-phy@5 {
			reg = <5>;
			micrel,led-mode = <1>;
			interrupts-extended = <&gpio2a 27 IRQ_TYPE_LEVEL_LOW>;
		};
	};
};

&switch_port0 {
	label = "lan0";
	phy-mode = "mii";
	phy-handle = <&switch0phy5>;
	status = "okay";
};

&switch_port1 {
	label = "lan1";
	phy-mode = "mii";
	phy-handle = <&switch0phy4>;
	status = "okay";
};

&switch_port4 {
	status = "okay";
};

&uart0 {
	status = "okay";
};

&udc {
	status = "okay";
};

&wdt0 {
	timeout-sec = <60>;
	status = "okay";
};