// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2022-2026 Marek Vasut
 */
/dts-v1/;
/plugin/;

#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
#include "imx8mp-pinfunc.h"

&{/} {
	gpio-keys {
		button-1 {
			/* TA2 GPIO conflicts with Touchscreen RESET GPIO-B */
			status = "disabled";
		};

		button-2 {
			/* TA3 GPIO conflicts with Touchscreen IRQ GPIO-C */
			status = "disabled";
		};
	};

	led {
		led-2 {
			/* LED2 GPIO conflicts with BL-ON1 GPIO-G */
			status = "disabled";
		};
	};
};

&media_blk_ctrl {
	/*
	 * The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
	 * Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
	 */
	assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
};

&pinctrl_dhcom_c {
	fsl,pins = <
		/* GPIO_C */
		MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02		0x40000000
	>;
};

&touch_lvds {
	pinctrl-0 = <&pinctrl_dhcom_b &pinctrl_dhcom_c>;
	pinctrl-names = "default";
	interrupt-parent = <&gpio5>;
	interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
};