34 lines
947 B
Devicetree
34 lines
947 B
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2024-2026 Marek Vasut
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*/
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#include <dt-bindings/clock/imx8mp-clock.h>
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&media_blk_ctrl {
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/*
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* Sys PLL3 supplies TC9595 RefClk
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* Audio PLL2 supplies MEDIA_DISP1_PIX (DSI)
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* Video PLL1 supplies MEDIA_DISP2_PIX (LVDS)
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*/
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
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<&clk IMX8MP_CLK_MEDIA_APB>,
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<&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
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<&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
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<&clk IMX8MP_AUDIO_PLL2>,
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<&clk IMX8MP_VIDEO_PLL1>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
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<&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_AUDIO_PLL2_OUT>,
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<&clk IMX8MP_VIDEO_PLL1_OUT>;
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assigned-clock-rates = <500000000>, <200000000>,
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<0>, <0>, <0>, <0>;
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};
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&tc_bridge {
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assigned-clocks = <&clk IMX8MP_CLK_CLKOUT2_SEL>,
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<&clk IMX8MP_CLK_CLKOUT2>,
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<&clk IMX8MP_SYS_PLL3_OUT>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>;
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};
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