45 lines
993 B
Plaintext
45 lines
993 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
|
/*
|
|
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/clock/imx8mp-clock.h>
|
|
|
|
/dts-v1/;
|
|
/plugin/;
|
|
|
|
&backlight_lvds0 {
|
|
brightness-levels = <0 8 16 32 64 128 255>;
|
|
default-brightness-level = <8>;
|
|
enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
|
|
num-interpolated-steps = <2>;
|
|
pwms = <&pwm1 0 66667 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&lcdif2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&lvds_bridge {
|
|
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
|
|
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
|
|
/*
|
|
* The LVDS panel uses 66.5 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
|
|
* 66.5 * 7 = 465.5 MHz so the LDB serializer and LCDIFv3 scanout
|
|
* engine can reach accurate pixel clock of exactly 66.5 MHz.
|
|
*/
|
|
assigned-clock-rates = <0>, <465500000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&panel_lvds0 {
|
|
compatible = "powertip,ph128800t006-zhc01";
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
};
|