111 lines
2.9 KiB
Devicetree
111 lines
2.9 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2026 NXP
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*/
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#include "imx93.dtsi"
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/ {
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aliases {
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mmc2 = &usdhc3;
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};
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reg_usdhc3_vmmc: regulator-usdhc3 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc3_vmmc>;
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regulator-name = "WLAN_EN";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usdhc3_pwrseq: usdhc3_pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_pwrseq>;
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reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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};
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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pinctrl-3 = <&pinctrl_usdhc3_sleep>;
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mmc-pwrseq = <&usdhc3_pwrseq>;
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vmmc-supply = <®_usdhc3_vmmc>;
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bus-width = <4>;
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keep-power-in-suspend;
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non-removable;
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wakeup-source;
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status = "okay";
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};
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&iomuxc {
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pinctrl_reg_usdhc3_vmmc: regusdhc3vmmcgrp {
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fsl,pins = <
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/*
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* Enable open drain and internal pull-up to allow the IW610 JTAG
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* connector to control the PDn status.
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*/
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MX93_PAD_GPIO_IO29__GPIO2_IO29 0xb9e
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX93_PAD_SD3_CLK__USDHC3_CLK 0x1582
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MX93_PAD_SD3_CMD__USDHC3_CMD 0x40001382
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MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x40001382
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MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x40001382
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MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x40001382
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MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x40001382
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
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fsl,pins = <
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MX93_PAD_SD3_CLK__USDHC3_CLK 0x158e
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MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000138e
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MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000138e
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MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000138e
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MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000138e
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MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000138e
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
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fsl,pins = <
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MX93_PAD_SD3_CLK__USDHC3_CLK 0x15fe
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MX93_PAD_SD3_CMD__USDHC3_CMD 0x400013fe
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MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x400013fe
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MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x400013fe
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MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x400013fe
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MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x400013fe
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>;
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};
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pinctrl_usdhc3_sleep: usdhc3grpsleepgrp {
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fsl,pins = <
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MX93_PAD_SD3_CLK__GPIO3_IO20 0x31e
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MX93_PAD_SD3_CMD__GPIO3_IO21 0x31e
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MX93_PAD_SD3_DATA0__GPIO3_IO22 0x31e
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MX93_PAD_SD3_DATA1__GPIO3_IO23 0x31e
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MX93_PAD_SD3_DATA2__GPIO3_IO24 0x31e
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MX93_PAD_SD3_DATA3__GPIO3_IO25 0x31e
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>;
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};
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pinctrl_usdhc3_pwrseq: usdhc3pwrseqgrp {
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fsl,pins = <
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MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x39e
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>;
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};
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};
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