122 lines
2.0 KiB
Devicetree
122 lines
2.0 KiB
Devicetree
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* IPQ9574 RDP433 board device tree source
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*
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* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&pcie1_phy {
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status = "okay";
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};
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&pcie1 {
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pinctrl-0 = <&pcie1_default>;
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pinctrl-names = "default";
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perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcie2_phy {
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status = "okay";
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};
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&pcie2 {
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pinctrl-0 = <&pcie2_default>;
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pinctrl-names = "default";
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perst-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcie3_phy {
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status = "okay";
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};
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&pcie3 {
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pinctrl-0 = <&pcie3_default>;
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pinctrl-names = "default";
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perst-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&tlmm {
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pcie1_default: pcie1-default-state {
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clkreq-n-pins {
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pins = "gpio25";
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function = "pcie1_clk";
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drive-strength = <6>;
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bias-pull-up;
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};
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perst-n-pins {
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pins = "gpio26";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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output-low;
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};
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wake-n-pins {
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pins = "gpio27";
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function = "pcie1_wake";
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drive-strength = <6>;
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bias-pull-up;
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};
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};
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pcie2_default: pcie2-default-state {
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clkreq-n-pins {
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pins = "gpio28";
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function = "pcie2_clk";
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drive-strength = <6>;
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bias-pull-up;
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};
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perst-n-pins {
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pins = "gpio29";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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output-low;
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};
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wake-n-pins {
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pins = "gpio30";
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function = "pcie2_wake";
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drive-strength = <6>;
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bias-pull-up;
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};
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};
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pcie3_default: pcie3-default-state {
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clkreq-n-pins {
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pins = "gpio31";
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function = "pcie3_clk";
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drive-strength = <6>;
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bias-pull-up;
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};
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perst-n-pins {
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pins = "gpio32";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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output-low;
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};
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wake-n-pins {
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pins = "gpio33";
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function = "pcie3_wake";
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drive-strength = <6>;
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bias-pull-up;
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};
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};
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};
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