319 lines
8.3 KiB
C
319 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0 or MIT
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/* Copyright 2025 ARM Limited. All rights reserved. */
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#include <linux/nvmem-consumer.h>
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#include <linux/platform_device.h>
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#include <drm/drm_print.h>
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#include "panthor_device.h"
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#include "panthor_gpu.h"
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#include "panthor_gpu_regs.h"
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#include "panthor_hw.h"
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#include "panthor_pwr.h"
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#include "panthor_pwr_regs.h"
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#define GPU_PROD_ID_MAKE(arch_major, prod_major) \
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(((arch_major) << 24) | (prod_major))
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/** struct panthor_hw_entry - HW arch major to panthor_hw binding entry */
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struct panthor_hw_entry {
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/** @arch_min: Minimum supported architecture major value (inclusive) */
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u8 arch_min;
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/** @arch_max: Maximum supported architecture major value (inclusive) */
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u8 arch_max;
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/** @hwdev: Pointer to panthor_hw structure */
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struct panthor_hw *hwdev;
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};
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static struct panthor_hw panthor_hw_arch_v10 = {
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.ops = {
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.soft_reset = panthor_gpu_soft_reset,
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.l2_power_off = panthor_gpu_l2_power_off,
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.l2_power_on = panthor_gpu_l2_power_on,
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.power_changed_off = panthor_gpu_power_changed_off,
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.power_changed_on = panthor_gpu_power_changed_on,
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},
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};
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static struct panthor_hw panthor_hw_arch_v14 = {
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.ops = {
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.soft_reset = panthor_pwr_reset_soft,
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.l2_power_off = panthor_pwr_l2_power_off,
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.l2_power_on = panthor_pwr_l2_power_on,
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},
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};
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static struct panthor_hw_entry panthor_hw_match[] = {
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{
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.arch_min = 10,
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.arch_max = 13,
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.hwdev = &panthor_hw_arch_v10,
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},
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{
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.arch_min = 14,
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.arch_max = 14,
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.hwdev = &panthor_hw_arch_v14,
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},
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};
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static int panthor_hw_set_power_tracing(struct device *dev, void *data)
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{
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struct panthor_device *ptdev = dev_get_drvdata(dev);
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if (!ptdev)
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return -ENODEV;
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if (!ptdev->hw)
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return 0;
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if (data) {
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if (ptdev->hw->ops.power_changed_on)
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return ptdev->hw->ops.power_changed_on(ptdev);
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} else {
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if (ptdev->hw->ops.power_changed_off)
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ptdev->hw->ops.power_changed_off(ptdev);
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}
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return 0;
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}
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int panthor_hw_power_status_register(void)
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{
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struct device_driver *drv;
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int ret;
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drv = driver_find("panthor", &platform_bus_type);
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if (!drv)
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return -ENODEV;
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ret = driver_for_each_device(drv, NULL, (void *)true,
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panthor_hw_set_power_tracing);
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return ret;
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}
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void panthor_hw_power_status_unregister(void)
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{
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struct device_driver *drv;
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int ret;
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drv = driver_find("panthor", &platform_bus_type);
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if (!drv)
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return;
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ret = driver_for_each_device(drv, NULL, NULL, panthor_hw_set_power_tracing);
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/*
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* Ideally, it'd be possible to ask driver_for_each_device to hand us
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* another "start" to keep going after the failing device, but it
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* doesn't do that. Minor inconvenience in what is probably a bad day
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* on the computer already though.
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*/
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if (ret)
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pr_warn("Couldn't mask power IRQ for at least one device: %pe\n",
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ERR_PTR(ret));
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}
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static char *get_gpu_model_name(struct panthor_device *ptdev)
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{
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const u32 gpu_id = ptdev->gpu_info.gpu_id;
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const u32 product_id = GPU_PROD_ID_MAKE(GPU_ARCH_MAJOR(gpu_id),
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GPU_PROD_MAJOR(gpu_id));
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const bool ray_intersection = !!(ptdev->gpu_info.gpu_features &
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GPU_FEATURES_RAY_INTERSECTION);
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const u8 shader_core_count = hweight64(ptdev->gpu_info.shader_present);
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switch (product_id) {
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case GPU_PROD_ID_MAKE(10, 2):
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return "Mali-G710";
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case GPU_PROD_ID_MAKE(10, 3):
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return "Mali-G510";
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case GPU_PROD_ID_MAKE(10, 4):
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return "Mali-G310";
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case GPU_PROD_ID_MAKE(10, 7):
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return "Mali-G610";
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case GPU_PROD_ID_MAKE(11, 2):
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if (shader_core_count > 10 && ray_intersection)
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return "Mali-G715-Immortalis";
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else if (shader_core_count >= 7)
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return "Mali-G715";
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fallthrough;
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case GPU_PROD_ID_MAKE(11, 3):
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return "Mali-G615";
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case GPU_PROD_ID_MAKE(12, 0):
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if (shader_core_count >= 10 && ray_intersection)
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return "Mali-G720-Immortalis";
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else if (shader_core_count >= 6)
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return "Mali-G720";
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fallthrough;
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case GPU_PROD_ID_MAKE(12, 1):
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return "Mali-G620";
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case GPU_PROD_ID_MAKE(13, 0):
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if (shader_core_count >= 10 && ray_intersection)
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return "Mali-G925-Immortalis";
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else if (shader_core_count >= 6)
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return "Mali-G725";
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fallthrough;
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case GPU_PROD_ID_MAKE(13, 1):
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return "Mali-G625";
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case GPU_PROD_ID_MAKE(14, 0):
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return "Mali-G1-Ultra";
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case GPU_PROD_ID_MAKE(14, 1):
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return "Mali-G1-Premium";
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case GPU_PROD_ID_MAKE(14, 3):
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return "Mali-G1-Pro";
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}
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return "(Unknown Mali GPU)";
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}
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static int overload_shader_present(struct panthor_device *ptdev)
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{
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u64 contents;
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int ret;
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ret = nvmem_cell_read_variable_le_u64(ptdev->base.dev, "shader-present",
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&contents);
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if (!ret)
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ptdev->gpu_info.shader_present = contents;
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else if (ret == -ENOENT)
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return 0;
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else
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return dev_err_probe(ptdev->base.dev, ret,
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"Failed to read shader-present nvmem cell\n");
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return 0;
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}
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static int panthor_gpu_info_init(struct panthor_device *ptdev)
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{
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unsigned int i;
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void __iomem *gpu_iomem = ptdev->iomem + GPU_CONTROL_BASE;
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ptdev->gpu_info.csf_id = gpu_read(gpu_iomem, GPU_CSF_ID);
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ptdev->gpu_info.gpu_rev = gpu_read(gpu_iomem, GPU_REVID);
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ptdev->gpu_info.core_features = gpu_read(gpu_iomem, GPU_CORE_FEATURES);
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ptdev->gpu_info.l2_features = gpu_read(gpu_iomem, GPU_L2_FEATURES);
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ptdev->gpu_info.tiler_features = gpu_read(gpu_iomem, GPU_TILER_FEATURES);
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ptdev->gpu_info.mem_features = gpu_read(gpu_iomem, GPU_MEM_FEATURES);
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ptdev->gpu_info.mmu_features = gpu_read(gpu_iomem, GPU_MMU_FEATURES);
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ptdev->gpu_info.thread_features = gpu_read(gpu_iomem, GPU_THREAD_FEATURES);
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ptdev->gpu_info.max_threads = gpu_read(gpu_iomem, GPU_THREAD_MAX_THREADS);
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ptdev->gpu_info.thread_max_workgroup_size =
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gpu_read(gpu_iomem, GPU_THREAD_MAX_WORKGROUP_SIZE);
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ptdev->gpu_info.thread_max_barrier_size =
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gpu_read(gpu_iomem, GPU_THREAD_MAX_BARRIER_SIZE);
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ptdev->gpu_info.coherency_features = gpu_read(gpu_iomem, GPU_COHERENCY_FEATURES);
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for (i = 0; i < 4; i++)
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ptdev->gpu_info.texture_features[i] =
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gpu_read(gpu_iomem, GPU_TEXTURE_FEATURES(i));
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ptdev->gpu_info.as_present = gpu_read(gpu_iomem, GPU_AS_PRESENT);
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/* Introduced in arch 11.x */
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ptdev->gpu_info.gpu_features = gpu_read64(gpu_iomem, GPU_FEATURES);
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if (panthor_hw_has_pwr_ctrl(ptdev)) {
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void __iomem *pwr_iomem = gpu_iomem + PWR_CONTROL_BASE;
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/* Introduced in arch 14.x */
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ptdev->gpu_info.l2_present = gpu_read64(pwr_iomem, PWR_L2_PRESENT);
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ptdev->gpu_info.tiler_present = gpu_read64(pwr_iomem, PWR_TILER_PRESENT);
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ptdev->gpu_info.shader_present = gpu_read64(pwr_iomem, PWR_SHADER_PRESENT);
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} else {
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ptdev->gpu_info.shader_present = gpu_read64(gpu_iomem, GPU_SHADER_PRESENT);
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ptdev->gpu_info.tiler_present = gpu_read64(gpu_iomem, GPU_TILER_PRESENT);
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ptdev->gpu_info.l2_present = gpu_read64(gpu_iomem, GPU_L2_PRESENT);
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}
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return overload_shader_present(ptdev);
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}
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static int panthor_hw_info_init(struct panthor_device *ptdev)
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{
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u32 major, minor, status;
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int ret;
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ret = panthor_gpu_info_init(ptdev);
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if (ret)
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return ret;
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major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
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minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
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status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
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drm_info(&ptdev->base,
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"%s id 0x%x major 0x%x minor 0x%x status 0x%x",
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get_gpu_model_name(ptdev), ptdev->gpu_info.gpu_id >> 16,
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major, minor, status);
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drm_info(&ptdev->base,
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"Features: L2:%#x Tiler:%#x Mem:%#x MMU:%#x AS:%#x",
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ptdev->gpu_info.l2_features,
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ptdev->gpu_info.tiler_features,
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ptdev->gpu_info.mem_features,
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ptdev->gpu_info.mmu_features,
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ptdev->gpu_info.as_present);
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drm_info(&ptdev->base,
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"shader_present=0x%0llx l2_present=0x%0llx tiler_present=0x%0llx",
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ptdev->gpu_info.shader_present, ptdev->gpu_info.l2_present,
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ptdev->gpu_info.tiler_present);
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return 0;
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}
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static int panthor_hw_bind_device(struct panthor_device *ptdev)
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{
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struct panthor_hw *hdev = NULL;
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const u32 arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
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int i = 0;
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for (i = 0; i < ARRAY_SIZE(panthor_hw_match); i++) {
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struct panthor_hw_entry *entry = &panthor_hw_match[i];
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if (arch_major >= entry->arch_min && arch_major <= entry->arch_max) {
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hdev = entry->hwdev;
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break;
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}
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}
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if (!hdev)
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return -EOPNOTSUPP;
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ptdev->hw = hdev;
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return 0;
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}
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static int panthor_hw_gpu_id_init(struct panthor_device *ptdev)
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{
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ptdev->gpu_info.gpu_id = gpu_read(ptdev->iomem, GPU_ID);
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if (!ptdev->gpu_info.gpu_id)
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return -ENXIO;
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return 0;
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}
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int panthor_hw_init(struct panthor_device *ptdev)
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{
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int ret = 0;
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ret = panthor_hw_gpu_id_init(ptdev);
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if (ret)
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return ret;
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ret = panthor_hw_bind_device(ptdev);
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if (ret)
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return ret;
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return panthor_hw_info_init(ptdev);
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}
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