218 lines
5.7 KiB
C
218 lines
5.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_NORD_H
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#define __DT_BINDINGS_INTERCONNECT_QCOM_NORD_H
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#define MASTER_QSPI_0 0
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#define MASTER_SAILSS_MD1 1
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#define MASTER_QUP_3 2
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#define SLAVE_A1NOC_SNOC 3
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#define MASTER_QUP_2 0
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#define MASTER_CRYPTO_CORE0 1
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#define MASTER_CRYPTO_CORE1 2
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#define MASTER_CRYPTO_CORE2 3
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#define MASTER_SDCC_4 4
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#define MASTER_UFS_MEM 5
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#define MASTER_USB2 6
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#define MASTER_USB3_0 7
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#define MASTER_USB3_1 8
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#define SLAVE_A1NOC_HSCNOC 9
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#define MASTER_IPA 0
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#define MASTER_SOCCP_AGGR_NOC 1
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#define MASTER_QDSS_ETR 2
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#define MASTER_QDSS_ETR_1 3
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#define SLAVE_A2NOC_SNOC 4
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#define MASTER_QUP_0 0
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#define MASTER_QUP_1 1
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#define MASTER_EMAC_0 2
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#define MASTER_EMAC_1 3
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#define SLAVE_A2NOC_HSCNOC 4
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#define MASTER_QUP_CORE_0 0
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#define MASTER_QUP_CORE_1 1
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#define MASTER_QUP_CORE_2 2
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#define MASTER_QUP_CORE_3 3
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#define SLAVE_QUP_CORE_0 4
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#define SLAVE_QUP_CORE_1 5
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#define SLAVE_QUP_CORE_2 6
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#define SLAVE_QUP_CORE_3 7
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#define MASTER_CNOC_CFG 0
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#define SLAVE_PS_ETH_0 1
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#define SLAVE_PS_ETH_1 2
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#define SLAVE_SHS_SERVER 3
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#define SLAVE_AHB2PHY_0 4
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#define SLAVE_AHB2PHY_1 5
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#define SLAVE_AHB2PHY_2 6
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#define SLAVE_AHB2PHY_3 7
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#define SLAVE_AHB2PHY_ETH_0 8
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#define SLAVE_AHB2PHY_ETH_1 9
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#define SLAVE_CAMERA_CFG 10
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#define SLAVE_CLK_CTL 11
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#define SLAVE_CRYPTO_0_CFG 12
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#define SLAVE_CRYPTO_1_CFG 13
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#define SLAVE_CRYPTO_2_CFG 14
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#define SLAVE_DISPLAY_1_CFG 15
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#define SLAVE_DISPLAY_CFG 16
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#define SLAVE_DPRX0 17
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#define SLAVE_DPRX1 18
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#define SLAVE_EVA_CFG 19
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#define SLAVE_GFX3D_CFG 20
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#define SLAVE_GFX3D_1_CFG 21
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#define SLAVE_I2C 22
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#define SLAVE_IMEM_CFG 23
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#define SLAVE_MCW_PCIE 24
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#define SLAVE_MM_RSCC 25
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#define SLAVE_NE_CLK_CTL 26
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#define SLAVE_NSPSS0_CFG 27
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#define SLAVE_NSPSS1_CFG 28
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#define SLAVE_NSPSS2_CFG 29
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#define SLAVE_NSPSS3_CFG 30
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#define SLAVE_NW_CLK_CTL 31
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#define SLAVE_PRNG 32
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#define SLAVE_QDSS_CFG 33
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#define SLAVE_QSPI_0 34
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#define SLAVE_QUP_0 35
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#define SLAVE_QUP_3 36
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#define SLAVE_QUP_1 37
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#define SLAVE_QUP_2 38
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#define SLAVE_SAFEDMA_CFG 39
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#define SLAVE_SDCC_4 40
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#define SLAVE_SE_CLK_CTL 41
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#define SLAVE_TCSR 42
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#define SLAVE_TLMM 43
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#define SLAVE_TSC_CFG 44
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#define SLAVE_UFS_MEM_CFG 45
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#define SLAVE_USB2 46
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#define SLAVE_USB3_0 47
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#define SLAVE_USB3_1 48
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#define SLAVE_VENUS_CFG 49
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#define SLAVE_COMPUTENOC_CFG 50
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#define SLAVE_PCIE_NOC_CFG 51
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#define SLAVE_QTC_CFG 52
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#define SLAVE_QDSS_STM 53
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#define SLAVE_SYS_TCU0_CFG 54
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#define SLAVE_SYS_TCU1_CFG 55
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#define SLAVE_SYS_TCU2_CFG 56
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#define MASTER_MM_RSCC 0
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#define MASTER_HSCNOC_CNOC 1
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#define SLAVE_AOSS 2
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#define SLAVE_HBCU 3
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#define SLAVE_IPA_CFG 4
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#define SLAVE_IPC_ROUTER_CFG 5
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#define SLAVE_SOCCP 6
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#define SLAVE_TME_CFG 7
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#define SLAVE_PCIE_DMA 8
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#define SLAVE_CNOC_CFG 9
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#define SLAVE_DDRSS_CFG 10
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#define SLAVE_IMEM 11
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#define MASTER_HPASS_PROC_0 0
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#define MASTER_HPASS_PROC_1 1
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#define MASTER_HPASS_PROC_2 2
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#define SLAVE_HPASS_AGNOC_AUDIO 3
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#define MASTER_GPU_TCU 0
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#define MASTER_QTC_TCU 1
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#define MASTER_SYS_TCU_0 2
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#define MASTER_SYS_TCU_1 3
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#define MASTER_SYS_TCU_2 4
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#define MASTER_APPSS_PROC 5
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#define MASTER_A1NOC_TILE_HSCNOC 6
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#define MASTER_A2NOC_TILE_HSCNOC 7
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#define MASTER_GFX3D 8
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#define MASTER_GFX3D_1 9
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#define MASTER_HPASS_ADAS_HSCNOC 10
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#define MASTER_HPASS_AUDIO_HSCNOC 11
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#define MASTER_MNOC_HF_MEM_NOC 12
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#define MASTER_MNOC_SF_MEM_NOC 13
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#define MASTER_NSP0_HSCNOC 14
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#define MASTER_NSP1_HSCNOC 15
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#define MASTER_NSP2_HSCNOC 16
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#define MASTER_NSP3_HSCNOC 17
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#define MASTER_ANOC_PCIE_GEM_NOC 18
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#define MASTER_SAILSS_MD0_HSCNOC 19
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#define MASTER_SNOC_SF_MEM_NOC 20
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#define MASTER_GIC 21
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#define SLAVE_HSCNOC_CNOC 22
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#define SLAVE_LLCC 23
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#define SLAVE_MEM_NOC_PCIE_SNOC 24
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#define MASTER_LLCC 0
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#define SLAVE_EBI1 1
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#define MASTER_CAMNOC_HF 0
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#define MASTER_CAMNOC_NRT_ICP_SF 1
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#define MASTER_CAMNOC_RT_CDM_SF 2
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#define MASTER_CAMNOC_SF 3
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#define MASTER_DPRX0 4
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#define MASTER_DPRX1 5
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#define MASTER_MDP0 6
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#define MASTER_MDP1 7
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#define MASTER_VIDEO_CV_PROC 8
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#define MASTER_VIDEO_EVA 9
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#define MASTER_VIDEO_MVP0 10
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#define MASTER_VIDEO_MVP1 11
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#define MASTER_VIDEO_V_PROC 12
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#define SLAVE_MNOC_HF_MEM_NOC 13
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#define SLAVE_MNOC_SF_MEM_NOC 14
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#define MASTER_NSP0_PROC 0
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#define SLAVE_NSP0_HSC_NOC 1
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#define MASTER_NSP1_PROC 0
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#define SLAVE_NSP1_HSC_NOC 1
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#define MASTER_NSP2_PROC 0
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#define SLAVE_NSP2_HSC_NOC 1
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#define MASTER_NSP3_PROC 0
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#define SLAVE_NSP3_HSC_NOC 1
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#define MASTER_PCIE_NOC_CFG 0
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#define SLAVE_PCIE_AHB2PHY_CFG 1
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#define SLAVE_PCIE_CFG_0 2
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#define SLAVE_PCIE_CFG_1 3
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#define SLAVE_PCIE_CFG_2 4
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#define SLAVE_PCIE_CFG_3 5
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#define SLAVE_PCIE_DMA_0_CFG 6
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#define SLAVE_PCIE_DMA_1_CFG 7
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#define SLAVE_PCIE_DMA_2_CFG 8
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#define MASTER_PCIE_DMA_0 0
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#define MASTER_PCIE_DMA_1 1
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#define MASTER_PCIE_DMA_2 2
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#define MASTER_PCIE_0 3
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#define MASTER_PCIE_1 4
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#define MASTER_PCIE_2 5
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#define MASTER_PCIE_3 6
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#define SLAVE_PCIE_HSCNOC 7
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#define SLAVE_PCIE_OBNOC_DMA 8
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#define MASTER_CNOC_PCIE_DMA 0
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#define MASTER_ANOC_PCIE_HSCNOC 1
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#define MASTER_PCIE_IBNOC_DMA 2
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#define SLAVE_PCIE_DMA_0 3
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#define SLAVE_PCIE_DMA_1 4
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#define SLAVE_PCIE_DMA_2 5
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#define SLAVE_PCIE_0 6
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#define SLAVE_PCIE_1 7
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#define SLAVE_PCIE_2 8
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#define SLAVE_PCIE_3 9
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#define MASTER_A1NOC_SNOC 0
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#define MASTER_A2NOC_SNOC 1
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#define MASTER_CNOC_SNOC 2
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#define MASTER_NSINOC_SNOC 3
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#define MASTER_SAFE_DMA 4
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#define SLAVE_SNOC_HSCNOC_SF 5
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#endif
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