230 lines
4.7 KiB
C
230 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <errno.h>
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#include <regex.h>
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#include <string.h>
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#include <sys/auxv.h>
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#include <linux/kernel.h>
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#include <linux/zalloc.h>
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#include "../debug.h"
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#include "../event.h"
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#include "../perf_regs.h"
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#include "../../perf-sys.h"
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#include "../../arch/arm64/include/perf_regs.h"
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#define SMPL_REG_MASK(b) (1ULL << (b))
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#ifndef HWCAP_SVE
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#define HWCAP_SVE (1 << 22)
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#endif
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/* %xNUM */
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#define SDT_OP_REGEX1 "^(x[1-2]?[0-9]|3[0-1])$"
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/* [sp], [sp, NUM] */
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#define SDT_OP_REGEX2 "^\\[sp(, )?([0-9]+)?\\]$"
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static regex_t sdt_op_regex1, sdt_op_regex2;
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static int sdt_init_op_regex(void)
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{
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static int initialized;
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int ret = 0;
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if (initialized)
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return 0;
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ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
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if (ret)
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goto error;
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ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
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if (ret)
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goto free_regex1;
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initialized = 1;
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return 0;
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free_regex1:
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regfree(&sdt_op_regex1);
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error:
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pr_debug4("Regex compilation error.\n");
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return ret;
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}
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/*
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* SDT marker arguments on Arm64 uses %xREG or [sp, NUM], currently
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* support these two formats.
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*/
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int __perf_sdt_arg_parse_op_arm64(char *old_op, char **new_op)
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{
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int ret, new_len;
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regmatch_t rm[5];
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ret = sdt_init_op_regex();
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if (ret < 0)
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return ret;
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if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
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/* Extract xNUM */
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new_len = 2; /* % NULL */
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new_len += (int)(rm[1].rm_eo - rm[1].rm_so);
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*new_op = zalloc(new_len);
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if (!*new_op)
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return -ENOMEM;
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scnprintf(*new_op, new_len, "%%%.*s",
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(int)(rm[1].rm_eo - rm[1].rm_so), old_op + rm[1].rm_so);
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} else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
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/* [sp], [sp, NUM] or [sp,NUM] */
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new_len = 7; /* + ( % s p ) NULL */
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/* If the argument is [sp], need to fill offset '0' */
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if (rm[2].rm_so == -1)
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new_len += 1;
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else
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new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
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*new_op = zalloc(new_len);
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if (!*new_op)
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return -ENOMEM;
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if (rm[2].rm_so == -1)
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scnprintf(*new_op, new_len, "+0(%%sp)");
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else
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scnprintf(*new_op, new_len, "+%.*s(%%sp)",
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(int)(rm[2].rm_eo - rm[2].rm_so),
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old_op + rm[2].rm_so);
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} else {
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pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
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return SDT_ARG_SKIP;
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}
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return SDT_ARG_VALID;
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}
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uint64_t __perf_reg_mask_arm64(bool intr)
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{
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struct perf_event_attr attr = {
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.type = PERF_TYPE_HARDWARE,
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.config = PERF_COUNT_HW_CPU_CYCLES,
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.sample_type = PERF_SAMPLE_REGS_USER,
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.disabled = 1,
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.exclude_kernel = 1,
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.sample_period = 1,
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.sample_regs_user = PERF_REGS_MASK
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};
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int fd;
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if (intr)
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return PERF_REGS_MASK;
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if (getauxval(AT_HWCAP) & HWCAP_SVE)
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attr.sample_regs_user |= SMPL_REG_MASK(PERF_REG_ARM64_VG);
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/*
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* Check if the pmu supports perf extended regs, before
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* returning the register mask to sample. Open the event
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* on the perf process to check this.
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*/
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if (attr.sample_regs_user != PERF_REGS_MASK) {
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event_attr_init(&attr);
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fd = sys_perf_event_open(&attr, /*pid=*/0, /*cpu=*/-1,
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/*group_fd=*/-1, /*flags=*/0);
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if (fd != -1) {
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close(fd);
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return attr.sample_regs_user;
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}
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}
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return PERF_REGS_MASK;
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}
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const char *__perf_reg_name_arm64(int id)
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{
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switch (id) {
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case PERF_REG_ARM64_X0:
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return "x0";
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case PERF_REG_ARM64_X1:
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return "x1";
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case PERF_REG_ARM64_X2:
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return "x2";
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case PERF_REG_ARM64_X3:
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return "x3";
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case PERF_REG_ARM64_X4:
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return "x4";
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case PERF_REG_ARM64_X5:
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return "x5";
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case PERF_REG_ARM64_X6:
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return "x6";
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case PERF_REG_ARM64_X7:
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return "x7";
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case PERF_REG_ARM64_X8:
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return "x8";
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case PERF_REG_ARM64_X9:
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return "x9";
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case PERF_REG_ARM64_X10:
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return "x10";
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case PERF_REG_ARM64_X11:
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return "x11";
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case PERF_REG_ARM64_X12:
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return "x12";
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case PERF_REG_ARM64_X13:
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return "x13";
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case PERF_REG_ARM64_X14:
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return "x14";
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case PERF_REG_ARM64_X15:
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return "x15";
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case PERF_REG_ARM64_X16:
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return "x16";
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case PERF_REG_ARM64_X17:
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return "x17";
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case PERF_REG_ARM64_X18:
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return "x18";
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case PERF_REG_ARM64_X19:
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return "x19";
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case PERF_REG_ARM64_X20:
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return "x20";
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case PERF_REG_ARM64_X21:
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return "x21";
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case PERF_REG_ARM64_X22:
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return "x22";
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case PERF_REG_ARM64_X23:
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return "x23";
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case PERF_REG_ARM64_X24:
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return "x24";
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case PERF_REG_ARM64_X25:
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return "x25";
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case PERF_REG_ARM64_X26:
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return "x26";
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case PERF_REG_ARM64_X27:
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return "x27";
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case PERF_REG_ARM64_X28:
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return "x28";
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case PERF_REG_ARM64_X29:
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return "x29";
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case PERF_REG_ARM64_SP:
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return "sp";
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case PERF_REG_ARM64_LR:
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return "lr";
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case PERF_REG_ARM64_PC:
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return "pc";
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case PERF_REG_ARM64_VG:
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return "vg";
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default:
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return NULL;
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}
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return NULL;
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}
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uint64_t __perf_reg_ip_arm64(void)
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{
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return PERF_REG_ARM64_PC;
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}
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uint64_t __perf_reg_sp_arm64(void)
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{
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return PERF_REG_ARM64_SP;
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}
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