56 lines
1.2 KiB
YAML
56 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,nord-nwgcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global North West and South East Clock & Reset Controller
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on Nord SoC
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maintainers:
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- Taniya Das <taniya.das@oss.qualcomm.com>
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description: |
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Qualcomm global clock control (NW, SE) module provides the clocks, resets
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and power domains on Nord SoC.
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See also:
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include/dt-bindings/clock/qcom,nord-nwgcc.h
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include/dt-bindings/clock/qcom,nord-segcc.h
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properties:
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compatible:
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enum:
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- qcom,nord-nwgcc
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- qcom,nord-segcc
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clocks:
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items:
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- description: Board XO source
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- description: Sleep clock source
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@8b00000 {
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compatible = "qcom,nord-nwgcc";
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reg = <0x08b00000 0xf4200>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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