215 lines
5.2 KiB
YAML
215 lines
5.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
# Copyright 2024 Analog Devices Inc.
|
|
# Copyright 2024 BayLibre, SAS.
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/iio/adc/adi,ad4030.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Analog Devices AD4030 and AD4630 ADC families
|
|
|
|
maintainers:
|
|
- Michael Hennerich <michael.hennerich@analog.com>
|
|
- Nuno Sa <nuno.sa@analog.com>
|
|
|
|
description: |
|
|
Analog Devices AD4030 single channel and AD4630/AD4632 dual channel precision
|
|
SAR ADC families
|
|
|
|
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4030-24-4032-24.pdf
|
|
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-24_ad4632-24.pdf
|
|
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-16-4632-16.pdf
|
|
* https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4216.pdf
|
|
* https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4224.pdf
|
|
|
|
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- adi,ad4030-24
|
|
- adi,ad4032-24
|
|
- adi,ad4630-16
|
|
- adi,ad4630-24
|
|
- adi,ad4632-16
|
|
- adi,ad4632-24
|
|
- adi,adaq4216
|
|
- adi,adaq4224
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
spi-max-frequency:
|
|
maximum: 102040816
|
|
|
|
spi-rx-bus-width:
|
|
maxItems: 2
|
|
# all lanes must have the same width
|
|
oneOf:
|
|
- contains:
|
|
const: 1
|
|
- contains:
|
|
const: 2
|
|
- contains:
|
|
const: 4
|
|
|
|
vdd-5v-supply: true
|
|
vdd-1v8-supply: true
|
|
vio-supply: true
|
|
|
|
ref-supply:
|
|
description:
|
|
Optional External unbuffered reference. Used when refin-supply is not
|
|
connected.
|
|
|
|
refin-supply:
|
|
description:
|
|
Internal buffered Reference. Used when ref-supply is not connected.
|
|
|
|
vddh-supply:
|
|
description:
|
|
PGIA Positive Power Supply.
|
|
|
|
vdd-fda-supply:
|
|
description:
|
|
FDA Positive Power Supply.
|
|
|
|
cnv-gpios:
|
|
description:
|
|
The Convert Input (CNV). It initiates the sampling conversions.
|
|
maxItems: 1
|
|
|
|
reset-gpios:
|
|
description:
|
|
The Reset Input (/RST). Used for asynchronous device reset.
|
|
maxItems: 1
|
|
|
|
pga-gpios:
|
|
description:
|
|
A0 and A1 pins for gain selection. For devices that have PGA configuration
|
|
input pins, pga-gpios should be defined.
|
|
minItems: 2
|
|
maxItems: 2
|
|
|
|
pwms:
|
|
description: PWM signal connected to the CNV pin.
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
description:
|
|
The BUSY pin is used to signal that the conversions results are available
|
|
to be transferred when in SPI Clocking Mode. This nodes should be
|
|
connected to an interrupt that is triggered when the BUSY line goes low.
|
|
maxItems: 1
|
|
|
|
interrupt-names:
|
|
const: busy
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- vdd-5v-supply
|
|
- vdd-1v8-supply
|
|
- vio-supply
|
|
- cnv-gpios
|
|
|
|
oneOf:
|
|
- required:
|
|
- ref-supply
|
|
- required:
|
|
- refin-supply
|
|
|
|
unevaluatedProperties: false
|
|
|
|
allOf:
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- adi,ad4030-24
|
|
- adi,ad4032-24
|
|
then:
|
|
properties:
|
|
spi-rx-bus-width:
|
|
maxItems: 1
|
|
# ADAQ devices require a gain property to indicate how hardware PGA is set
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
pattern: ^adi,adaq
|
|
then:
|
|
required:
|
|
- vddh-supply
|
|
- vdd-fda-supply
|
|
- pga-gpios
|
|
properties:
|
|
ref-supply: false
|
|
else:
|
|
properties:
|
|
pga-gpios: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
spi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
adc@0 {
|
|
compatible = "adi,ad4030-24";
|
|
reg = <0>;
|
|
spi-max-frequency = <80000000>;
|
|
vdd-5v-supply = <&supply_5V>;
|
|
vdd-1v8-supply = <&supply_1_8V>;
|
|
vio-supply = <&supply_1_8V>;
|
|
ref-supply = <&supply_5V>;
|
|
cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
- |
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
spi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
adc@0 {
|
|
compatible = "adi,ad4630-24";
|
|
reg = <0>;
|
|
spi-max-frequency = <80000000>;
|
|
spi-rx-bus-width = <4>, <4>;
|
|
vdd-5v-supply = <&supply_5V>;
|
|
vdd-1v8-supply = <&supply_1_8V>;
|
|
vio-supply = <&supply_1_8V>;
|
|
ref-supply = <&supply_5V>;
|
|
cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
- |
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
spi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
adc@0 {
|
|
compatible = "adi,adaq4216";
|
|
reg = <0>;
|
|
spi-max-frequency = <80000000>;
|
|
vdd-5v-supply = <&supply_5V>;
|
|
vdd-1v8-supply = <&supply_1_8V>;
|
|
vio-supply = <&supply_1_8V>;
|
|
refin-supply = <&refin_sup>;
|
|
vddh-supply = <&vddh>;
|
|
vdd-fda-supply = <&vdd_fda>;
|
|
cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
pga-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>,
|
|
<&gpio0 3 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|