472 lines
15 KiB
YAML
472 lines
15 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SM6350 Camera Subsystem (CAMSS)
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maintainers:
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- Luca Weiss <luca.weiss@fairphone.com>
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description:
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The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
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properties:
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compatible:
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const: qcom,sm6350-camss
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reg:
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maxItems: 24
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reg-names:
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items:
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- const: csid0
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- const: csid1
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- const: csid2
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- const: csid_lite
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- const: csiphy0
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- const: csiphy1
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- const: csiphy2
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- const: csiphy3
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- const: vfe0
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- const: vfe1
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- const: vfe2
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- const: vfe_lite
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- const: a5_csr
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- const: a5_qgic
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- const: a5_sierra
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- const: bps
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- const: camnoc
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- const: core_top_csr_tcsr
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- const: cpas_cdm
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- const: cpas_top
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- const: ipe
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- const: jpeg_dma
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- const: jpeg_enc
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- const: lrme
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clocks:
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maxItems: 39
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clock-names:
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items:
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- const: cam_axi
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- const: soc_ahb
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- const: camnoc_axi
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- const: core_ahb
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- const: cpas_ahb
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- const: csiphy0
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- const: csiphy0_timer
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- const: csiphy1
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- const: csiphy1_timer
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- const: csiphy2
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- const: csiphy2_timer
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- const: csiphy3
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- const: csiphy3_timer
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- const: vfe0_axi
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- const: vfe0
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- const: vfe0_cphy_rx
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- const: vfe0_csid
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- const: vfe1_axi
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- const: vfe1
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- const: vfe1_cphy_rx
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- const: vfe1_csid
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- const: vfe2_axi
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- const: vfe2
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- const: vfe2_cphy_rx
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- const: vfe2_csid
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- const: vfe_lite
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- const: vfe_lite_cphy_rx
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- const: vfe_lite_csid
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- const: bps
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- const: bps_ahb
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- const: bps_areg
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- const: bps_axi
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- const: icp
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- const: ipe0
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- const: ipe0_ahb
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- const: ipe0_areg
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- const: ipe0_axi
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- const: jpeg
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- const: lrme
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interrupts:
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maxItems: 18
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interrupt-names:
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items:
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- const: csid0
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- const: csid1
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- const: csid2
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- const: csid_lite
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- const: csiphy0
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- const: csiphy1
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- const: csiphy2
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- const: csiphy3
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- const: vfe0
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- const: vfe1
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- const: vfe2
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- const: vfe_lite
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- const: a5
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- const: cpas
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- const: cpas_cdm
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- const: jpeg_dma
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- const: jpeg_enc
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- const: lrme
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interconnects:
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maxItems: 4
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interconnect-names:
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items:
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- const: ahb
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- const: hf_mnoc
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- const: sf_mnoc
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- const: sf_icp_mnoc
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iommus:
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maxItems: 14
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power-domains:
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maxItems: 6
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power-domain-names:
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items:
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- const: ife0
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- const: ife1
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- const: ife2
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- const: top
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- const: bps
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- const: ipe
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vdd-csiphy0-0p9-supply:
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description:
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Phandle to a 0.9V regulator supply to CSIPHY0.
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vdd-csiphy0-1p25-supply:
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description:
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Phandle to a 1.25V regulator supply to CSIPHY0.
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vdd-csiphy1-0p9-supply:
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description:
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Phandle to a 0.9V regulator supply to CSIPHY1.
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vdd-csiphy1-1p25-supply:
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description:
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Phandle to a 1.25V regulator supply to CSIPHY1.
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vdd-csiphy2-0p9-supply:
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description:
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Phandle to a 0.9V regulator supply to CSIPHY2.
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vdd-csiphy2-1p25-supply:
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description:
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Phandle to a 1.25V regulator supply to CSIPHY2.
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vdd-csiphy3-0p9-supply:
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description:
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Phandle to a 0.9V regulator supply to CSIPHY3.
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vdd-csiphy3-1p25-supply:
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description:
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Phandle to a 1.25V regulator supply to CSIPHY3.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description:
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CSI input ports.
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patternProperties:
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"^port@[0-3]$":
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from a CSIPHY.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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bus-type:
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enum:
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- 1 # MEDIA_BUS_TYPE_CSI2_CPHY
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- 4 # MEDIA_BUS_TYPE_CSI2_DPHY
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required:
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- data-lanes
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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- interrupt-names
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- interconnects
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- interconnect-names
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- iommus
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- power-domains
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- power-domain-names
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sm6350.h>
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#include <dt-bindings/clock/qcom,sm6350-camcc.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/interconnect/qcom,sm6350.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/media/video-interfaces.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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isp@acb3000 {
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compatible = "qcom,sm6350-camss";
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reg = <0x0 0x0acb3000 0x0 0x1000>,
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<0x0 0x0acba000 0x0 0x1000>,
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<0x0 0x0acc1000 0x0 0x1000>,
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<0x0 0x0acc8000 0x0 0x1000>,
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<0x0 0x0ac65000 0x0 0x1000>,
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<0x0 0x0ac66000 0x0 0x1000>,
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<0x0 0x0ac67000 0x0 0x1000>,
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<0x0 0x0ac68000 0x0 0x1000>,
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<0x0 0x0acaf000 0x0 0x4000>,
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<0x0 0x0acb6000 0x0 0x4000>,
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<0x0 0x0acbd000 0x0 0x4000>,
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<0x0 0x0acc4000 0x0 0x4000>,
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<0x0 0x0ac18000 0x0 0x3000>,
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<0x0 0x0ac00000 0x0 0x6000>,
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<0x0 0x0ac10000 0x0 0x8000>,
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<0x0 0x0ac6f000 0x0 0x8000>,
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<0x0 0x0ac42000 0x0 0x4600>,
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<0x0 0x01fc0000 0x0 0x40000>,
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<0x0 0x0ac48000 0x0 0x1000>,
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<0x0 0x0ac40000 0x0 0x1000>,
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<0x0 0x0ac87000 0x0 0xa000>,
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<0x0 0x0ac52000 0x0 0x4000>,
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<0x0 0x0ac4e000 0x0 0x4000>,
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<0x0 0x0ac6b000 0x0 0xa00>;
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reg-names = "csid0",
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"csid1",
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"csid2",
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"csid_lite",
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"csiphy0",
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"csiphy1",
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"csiphy2",
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"csiphy3",
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"vfe0",
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"vfe1",
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"vfe2",
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"vfe_lite",
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"a5_csr",
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"a5_qgic",
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"a5_sierra",
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"bps",
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"camnoc",
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"core_top_csr_tcsr",
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"cpas_cdm",
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"cpas_top",
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"ipe",
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"jpeg_dma",
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"jpeg_enc",
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"lrme";
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clocks = <&gcc GCC_CAMERA_AXI_CLK>,
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<&camcc CAMCC_SOC_AHB_CLK>,
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<&camcc CAMCC_CAMNOC_AXI_CLK>,
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<&camcc CAMCC_CORE_AHB_CLK>,
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<&camcc CAMCC_CPAS_AHB_CLK>,
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<&camcc CAMCC_CSIPHY0_CLK>,
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<&camcc CAMCC_CSI0PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY1_CLK>,
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<&camcc CAMCC_CSI1PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY2_CLK>,
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<&camcc CAMCC_CSI2PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY3_CLK>,
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<&camcc CAMCC_CSI3PHYTIMER_CLK>,
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<&camcc CAMCC_IFE_0_AXI_CLK>,
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<&camcc CAMCC_IFE_0_CLK>,
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<&camcc CAMCC_IFE_0_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_0_CSID_CLK>,
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<&camcc CAMCC_IFE_1_AXI_CLK>,
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<&camcc CAMCC_IFE_1_CLK>,
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<&camcc CAMCC_IFE_1_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_1_CSID_CLK>,
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<&camcc CAMCC_IFE_2_AXI_CLK>,
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<&camcc CAMCC_IFE_2_CLK>,
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<&camcc CAMCC_IFE_2_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_2_CSID_CLK>,
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<&camcc CAMCC_IFE_LITE_CLK>,
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<&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_LITE_CSID_CLK>,
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<&camcc CAMCC_BPS_CLK>,
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<&camcc CAMCC_BPS_AHB_CLK>,
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<&camcc CAMCC_BPS_AREG_CLK>,
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<&camcc CAMCC_BPS_AXI_CLK>,
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<&camcc CAMCC_ICP_CLK>,
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<&camcc CAMCC_IPE_0_CLK>,
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<&camcc CAMCC_IPE_0_AHB_CLK>,
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<&camcc CAMCC_IPE_0_AREG_CLK>,
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<&camcc CAMCC_IPE_0_AXI_CLK>,
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<&camcc CAMCC_JPEG_CLK>,
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<&camcc CAMCC_LRME_CLK>;
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clock-names = "cam_axi",
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"soc_ahb",
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"camnoc_axi",
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"core_ahb",
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"cpas_ahb",
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"csiphy0",
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"csiphy0_timer",
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"csiphy1",
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"csiphy1_timer",
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"csiphy2",
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"csiphy2_timer",
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"csiphy3",
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"csiphy3_timer",
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"vfe0_axi",
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"vfe0",
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"vfe0_cphy_rx",
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"vfe0_csid",
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"vfe1_axi",
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"vfe1",
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"vfe1_cphy_rx",
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"vfe1_csid",
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"vfe2_axi",
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"vfe2",
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"vfe2_cphy_rx",
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"vfe2_csid",
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"vfe_lite",
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"vfe_lite_cphy_rx",
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"vfe_lite_csid",
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"bps",
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"bps_ahb",
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"bps_areg",
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"bps_axi",
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"icp",
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"ipe0",
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"ipe0_ahb",
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"ipe0_areg",
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"ipe0_axi",
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"jpeg",
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"lrme";
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interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 717 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 473 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 461 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 718 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 472 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 463 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 459 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 475 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 474 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 476 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "csid0",
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"csid1",
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"csid2",
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"csid_lite",
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"csiphy0",
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"csiphy1",
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"csiphy2",
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"csiphy3",
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"vfe0",
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"vfe1",
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"vfe2",
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"vfe_lite",
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"a5",
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"cpas",
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"cpas_cdm",
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"jpeg_dma",
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"jpeg_enc",
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"lrme";
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
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<&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
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<&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "ahb",
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"hf_mnoc",
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"sf_mnoc",
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"sf_icp_mnoc";
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iommus = <&apps_smmu 0x820 0xc0>,
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<&apps_smmu 0x840 0x0>,
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<&apps_smmu 0x860 0xc0>,
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<&apps_smmu 0x880 0x0>,
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<&apps_smmu 0xc40 0x20>,
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<&apps_smmu 0xc60 0x20>,
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<&apps_smmu 0xc80 0x0>,
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<&apps_smmu 0xca2 0x0>,
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<&apps_smmu 0xcc0 0x20>,
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<&apps_smmu 0xce0 0x20>,
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<&apps_smmu 0xd00 0x20>,
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<&apps_smmu 0xd20 0x20>,
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<&apps_smmu 0xd40 0x20>,
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<&apps_smmu 0xd60 0x20>;
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power-domains = <&camcc IFE_0_GDSC>,
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<&camcc IFE_1_GDSC>,
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<&camcc IFE_2_GDSC>,
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<&camcc TITAN_TOP_GDSC>,
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<&camcc BPS_GDSC>,
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<&camcc IPE_0_GDSC>;
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power-domain-names = "ife0",
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"ife1",
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"ife2",
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"top",
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"bps",
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"ipe";
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vdd-csiphy0-0p9-supply = <&vreg_l18a>;
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vdd-csiphy0-1p25-supply = <&vreg_l22a>;
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vdd-csiphy1-0p9-supply = <&vreg_l18a>;
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vdd-csiphy1-1p25-supply = <&vreg_l22a>;
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vdd-csiphy2-0p9-supply = <&vreg_l18a>;
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vdd-csiphy2-1p25-supply = <&vreg_l22a>;
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vdd-csiphy3-0p9-supply = <&vreg_l18a>;
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vdd-csiphy3-1p25-supply = <&vreg_l22a>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csiphy0_ep: endpoint {
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data-lanes = <0 1 2 3>;
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bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
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remote-endpoint = <&sensor_ep>;
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};
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};
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};
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};
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};
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