258 lines
6.0 KiB
YAML
258 lines
6.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Mobile Storage Host Controller
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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- Jisheng Zhang <Jisheng.Zhang@synaptics.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- rockchip,rk3528-dwcmshc
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- rockchip,rk3562-dwcmshc
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- rockchip,rk3576-dwcmshc
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- const: rockchip,rk3588-dwcmshc
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- items:
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- const: sophgo,sg2044-dwcmshc
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- const: sophgo,sg2042-dwcmshc
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- enum:
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- canaan,k230-emmc
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- canaan,k230-sdio
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- hpe,gsc-dwcmshc
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- rockchip,rk3568-dwcmshc
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- rockchip,rk3588-dwcmshc
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- snps,dwcmshc-sdhci
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- sophgo,cv1800b-dwcmshc
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- sophgo,sg2002-dwcmshc
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- sophgo,sg2042-dwcmshc
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- thead,th1520-dwcmshc
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- eswin,eic7700-dwcmshc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 5
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clock-names:
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minItems: 1
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maxItems: 5
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power-domains:
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maxItems: 1
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resets:
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minItems: 4
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maxItems: 5
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reset-names:
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minItems: 4
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maxItems: 5
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canaan,usb-phy:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Phandle to the Canaan K230 USB PHY node required for
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k230-emmc/sdio.
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rockchip,txclk-tapnum:
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description: Specify the number of delay for tx sampling.
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$ref: /schemas/types.yaml#/definitions/uint8
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eswin,hsp-sp-csr:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: Phandle to HSP(High-Speed Peripheral) device
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- description: Offset of the stability status register for internal
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clock.
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- description: Offset of the stability register for host regulator
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voltage.
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description:
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HSP CSR is to control and get status of different high-speed peripherals
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(such as Ethernet, USB, SATA, etc.) via register, which can tune
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board-level's parameters of PHY, etc.
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eswin,drive-impedance-ohms:
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description: Specifies the drive impedance in Ohm.
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enum: [33, 40, 50, 66, 100]
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hpe,gxp-sysreg:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to HPE GXP SoC system register block (syscon)
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- description: offset of the MSHCCS register within the syscon block
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description:
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Phandle to the HPE GXP SoC system register block (syscon) and
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offset of the MSHCCS register used to configure clock
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synchronisation for HS200 tuning.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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allOf:
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- $ref: mmc-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- canaan,k230-emmc
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- canaan,k230-sdio
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then:
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properties:
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clocks:
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minItems: 5
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clock-names:
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items:
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- const: core
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- const: bus
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- const: axi
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- const: block
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- const: timer
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required:
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- canaan,usb-phy
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- if:
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properties:
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compatible:
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contains:
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const: hpe,gsc-dwcmshc
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then:
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properties:
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clocks:
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items:
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- description: core clock
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clock-names:
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items:
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- const: core
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required:
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- hpe,gxp-sysreg
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else:
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properties:
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hpe,gxp-sysreg: false
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- if:
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properties:
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compatible:
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contains:
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const: sophgo,sg2042-dwcmshc
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then:
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properties:
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clocks:
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items:
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- description: core clock
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- description: bus clock
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- description: timer clock
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clock-names:
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items:
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- const: core
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- const: bus
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- const: timer
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else:
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properties:
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clocks:
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minItems: 1
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items:
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- description: core clock
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- description: bus clock for optional
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- description: axi clock for rockchip specified
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- description: block clock for rockchip specified
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- description: timer clock for rockchip specified
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clock-names:
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minItems: 1
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items:
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- const: core
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- const: bus
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- const: axi
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- const: block
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- const: timer
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- if:
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properties:
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compatible:
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contains:
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const: eswin,eic7700-dwcmshc
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then:
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properties:
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resets:
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minItems: 4
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maxItems: 4
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reset-names:
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items:
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- const: axi
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- const: phy
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- const: prstn
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- const: txrx
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required:
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- eswin,hsp-sp-csr
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- eswin,drive-impedance-ohms
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else:
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properties:
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resets:
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minItems: 5
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maxItems: 5
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reset-names:
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items:
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- const: core
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- const: bus
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- const: axi
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- const: block
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- const: timer
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3576-dwcmshc
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then:
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required:
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- power-domains
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unevaluatedProperties: false
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examples:
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- |
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mmc@fe310000 {
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compatible = "rockchip,rk3568-dwcmshc";
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reg = <0xfe310000 0x10000>;
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interrupts = <0 25 0x4>;
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clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
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clock-names = "core", "bus", "axi", "block", "timer";
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bus-width = <8>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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- |
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mmc@aa0000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xaa000 0x1000>;
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interrupts = <0 25 0x4>;
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clocks = <&cru 17>, <&cru 18>;
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clock-names = "core", "bus";
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bus-width = <8>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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...
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