650 lines
14 KiB
Devicetree
650 lines
14 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Common Device Tree Source for the RZ/T2H and RZ/N2H EVK boards.
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*
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* Copyright (C) 2025 Renesas Electronics Corp.
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*/
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#include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/net/mscc-phy-vsc8531.h>
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#include <dt-bindings/net/renesas,r9a09g077-pcs-miic.h>
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#include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
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/ {
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aliases {
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ethernet3 = &gmac1;
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ethernet2 = &gmac2;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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mmc0 = &sdhi0;
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mmc1 = &sdhi1;
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serial0 = &sci0;
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spi0 = &xspi0;
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spi1 = &xspi1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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#if SD0_SD
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vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VqmmC";
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gpios = <&pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios-states = <0>;
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states = <3300000 0>, <1800000 1>;
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regulator-ramp-delay = <60>;
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};
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#endif
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#if SD1_MICRO_SD
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vccq_sdhi1: regulator-vccq-sdhi1 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI1 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&pinctrl RZT2H_GPIO(8, 6) GPIO_ACTIVE_HIGH>;
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gpios-states = <0>;
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states = <3300000 0>, <1800000 1>;
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};
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#endif
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};
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/*
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* ADC0 AN000 can be connected to a potentiometer on the board or
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* exposed on ADC header.
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*
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* T2H:
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* SW17[1] = ON, SW17[2] = OFF - Potentiometer
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* SW17[1] = OFF, SW17[2] = ON - CN41 header
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* N2H:
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* DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
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* DSW6[1] = ON, DSW6[2] = OFF - CN3 header
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*/
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&adc0 {
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status = "okay";
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channel@0 {
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reg = <0x0>;
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};
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channel@1 {
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reg = <0x1>;
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};
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channel@2 {
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reg = <0x2>;
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};
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channel@3 {
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reg = <0x3>;
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};
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};
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/*
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* ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
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*
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* T2H:
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* SW18[1] = ON, SW18[2] = OFF - CN42 header
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* SW18[1] = OFF, SW18[2] = ON - mikroBUS
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* N2H:
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* DSW6[3] = ON, DSW6[4] = OFF - CN4 header
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* DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
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*
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* ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
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*
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* T2H:
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* SW18[3] = ON, SW18[4] = OFF - CN42 header
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* SW18[3] = OFF, SW18[4] = ON - Grove2
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* N2H:
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* DSW6[5] = ON, DSW6[6] = OFF - CN4 header
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* DSW6[5] = OFF, DSW6[6] = ON - Grove2
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*
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* ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
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*
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* T2H:
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* SW18[5] = ON, SW18[6] = OFF - CN42 header
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* SW18[5] = OFF, SW18[6] = ON - Grove2
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* N2H:
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* DSW6[7] = ON, DSW6[8] = OFF - CN4 header
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* DSW6[7] = OFF, DSW6[8] = ON - Grove2
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*/
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&adc1 {
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status = "okay";
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channel@0 {
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reg = <0x0>;
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};
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channel@1 {
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reg = <0x1>;
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};
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channel@2 {
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reg = <0x2>;
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};
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channel@3 {
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reg = <0x3>;
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};
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};
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&ehci {
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dr_mode = "otg";
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status = "okay";
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};
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ðss {
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status = "okay";
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renesas,miic-switch-portin = <ETHSS_GMAC0_PORT>;
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};
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&extal_clk {
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clock-frequency = <25000000>;
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};
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&gmac1 {
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pinctrl-0 = <&gmac1_pins>;
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pinctrl-names = "default";
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phy-handle = <&mdio1_phy>;
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phy-mode = "rgmii-id";
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pcs-handle = <&mii_conv3>;
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status = "okay";
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};
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&gmac2 {
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pinctrl-0 = <&gmac2_pins>;
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pinctrl-names = "default";
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phy-handle = <&mdio2_phy>;
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phy-mode = "rgmii-id";
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pcs-handle = <&mii_conv2>;
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status = "okay";
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};
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&hsusb {
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dr_mode = "otg";
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status = "okay";
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};
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&i2c0 {
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eeprom: eeprom@50 {
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compatible = "renesas,r1ex24016", "atmel,24c16";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&mdio1 {
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mdio1_phy: ethernet-phy@3 {
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compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
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reg = <3>;
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vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
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vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
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reset-assert-us = <2000>;
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reset-deassert-us = <15000>;
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};
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};
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&mdio2 {
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mdio2_phy: ethernet-phy@2 {
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compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
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vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
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reset-assert-us = <2000>;
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reset-deassert-us = <15000>;
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};
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};
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&mii_conv0 {
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renesas,miic-input = <ETHSS_ETHSW_PORT0>;
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status = "okay";
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};
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&mii_conv1 {
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renesas,miic-input = <ETHSS_ETHSW_PORT1>;
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status = "okay";
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};
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&mii_conv2 {
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renesas,miic-input = <ETHSS_GMAC2_PORT>;
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status = "okay";
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};
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&mii_conv3 {
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renesas,miic-input = <ETHSS_GMAC1_PORT>;
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status = "okay";
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};
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&ohci {
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dr_mode = "otg";
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status = "okay";
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};
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&pinctrl {
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/*
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* SCI0 Pin Configuration:
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* ------------------------
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* Signal | Pin | RZ/T2H (SW4) | RZ/N2H (DSW9)
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* -----------|---------|--------------|---------------
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* SCI0_RXD | P27_4 | 5: ON, 6: OFF| 1: ON, 2: OFF
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* SCI0_TXD | P27_5 | 7: ON, 8: OFF| 3: ON, 4: OFF
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*/
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sci0_pins: sci0-pins {
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pinmux = <RZT2H_PORT_PINMUX(27, 4, 0x14)>,
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<RZT2H_PORT_PINMUX(27, 5, 0x14)>;
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};
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#if SD0_EMMC
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sdhi0-emmc-iovs-hog {
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gpio-hog;
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gpios = <RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "SD0_IOVS";
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};
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#endif
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sdhi0_emmc_pins: sd0-emmc-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
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<RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
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<RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
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<RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */
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<RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */
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<RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
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<RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
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<RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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};
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cmd-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>; /* SD0_CMD */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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rst-pins {
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pinmux = <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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};
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};
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sdhi0_emmc_uhs_pins: sd0-emmc-uhs-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
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<RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
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<RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
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<RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */
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<RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */
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<RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
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<RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
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<RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
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drive-strength-microamp = <11800>;
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slew-rate = <1>;
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};
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cmd-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>; /* SD0_CMD */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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rst-pins {
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pinmux = <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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};
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};
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#if SD0_SD
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sdhi0-pwen-hog {
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gpio-hog;
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gpios = <RZT2H_GPIO(2, 5) GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "SD0_PWEN";
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};
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#endif
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sdhi0_sd_pins: sd0-sd-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
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<RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
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<RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
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<RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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};
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ctrl-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
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<RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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};
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sdhi0_sd_uhs_pins: sd0-sd-uhs-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
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<RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
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<RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
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<RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
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drive-strength-microamp = <11800>;
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slew-rate = <1>;
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};
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ctrl-pins {
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pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
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<RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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};
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#if SD1_MICRO_SD
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sdhi1-pwen-hog {
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gpio-hog;
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gpios = <RZT2H_GPIO(8, 5) GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "SD1_PWEN";
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};
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#endif
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sdhi1_pins: sd1-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 7, 0x29)>, /* SD1_DATA0 */
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<RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
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<RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
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<RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>; /* SD1_CLK */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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};
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ctrl-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
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<RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
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drive-strength-microamp = <5000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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};
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sdhi1_uhs_pins: sd1-uhs-group {
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data-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 7, 0x29)>, /* SD1_DATA0 */
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<RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
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<RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
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<RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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clk-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>; /* SD1_CLK */
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drive-strength-microamp = <11800>;
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slew-rate = <1>;
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};
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ctrl-pins {
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pinmux = <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
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<RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
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drive-strength-microamp = <9000>;
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slew-rate = <1>;
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input-schmitt-disable;
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};
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};
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xspi0_pins: xspi0-group {
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ctrl-data-pins {
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pinmux = <RZT2H_PORT_PINMUX(5, 1, 0x1c)>, /* XSPI0_CKP */
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<RZT2H_PORT_PINMUX(5, 3, 0x1c)>, /* XSPI0_CS0 */
|
|
<RZT2H_PORT_PINMUX(5, 5, 0x1c)>, /* XSPI0_DS */
|
|
<RZT2H_PORT_PINMUX(5, 6, 0x1c)>, /* XSPI0_IO0 */
|
|
<RZT2H_PORT_PINMUX(5, 7, 0x1c)>, /* XSPI0_IO1 */
|
|
<RZT2H_PORT_PINMUX(6, 0, 0x1c)>, /* XSPI0_IO2 */
|
|
<RZT2H_PORT_PINMUX(6, 1, 0x1c)>, /* XSPI0_IO3 */
|
|
<RZT2H_PORT_PINMUX(6, 2, 0x1c)>, /* XSPI0_IO4 */
|
|
<RZT2H_PORT_PINMUX(6, 3, 0x1c)>, /* XSPI0_IO5 */
|
|
<RZT2H_PORT_PINMUX(6, 4, 0x1c)>, /* XSPI0_IO6 */
|
|
<RZT2H_PORT_PINMUX(6, 5, 0x1c)>, /* XSPI0_IO7 */
|
|
<RZT2H_PORT_PINMUX(6, 6, 0x1c)>; /* XSPI0_RESET0 */
|
|
drive-strength-microamp = <9000>;
|
|
input-schmitt-disable;
|
|
slew-rate = <1>;
|
|
};
|
|
};
|
|
|
|
/*
|
|
* XSPI1 Pin Configuration:
|
|
* ------------------------
|
|
* Signal | Pin | RZ/T2H (SW1) | RZ/N2H (DSW2)
|
|
* -----------|----------|---------------|---------------
|
|
* ALL | Multiple | 6: ON | 6: ON
|
|
*/
|
|
xspi1_pins: xspi1-pins {
|
|
pinmux = <RZT2H_PORT_PINMUX(1, 0, 0x1c)>, /* XSPI1_CKP */
|
|
<RZT2H_PORT_PINMUX(1, 1, 0x1c)>, /* XSPI1_CS0 */
|
|
<RZT2H_PORT_PINMUX(1, 4, 0x1c)>, /* XSPI1_IO0 */
|
|
<RZT2H_PORT_PINMUX(1, 5, 0x1c)>, /* XSPI1_IO1 */
|
|
<RZT2H_PORT_PINMUX(1, 6, 0x1c)>, /* XSPI1_IO2 */
|
|
<RZT2H_PORT_PINMUX(1, 7, 0x1c)>; /* XSPI1_IO3 */
|
|
drive-strength-microamp = <9000>;
|
|
input-schmitt-enable;
|
|
slew-rate = <1>;
|
|
};
|
|
};
|
|
|
|
&sci0 {
|
|
pinctrl-0 = <&sci0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
#if SD0_EMMC
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_emmc_pins>;
|
|
pinctrl-1 = <&sdhi0_emmc_uhs_pins>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_1p8v>;
|
|
bus-width = <8>;
|
|
non-removable;
|
|
mmc-hs200-1_8v;
|
|
fixed-emmc-driver-type = <1>;
|
|
status = "okay";
|
|
};
|
|
#endif
|
|
|
|
#if SD0_SD
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_sd_pins>;
|
|
pinctrl-1 = <&sdhi0_sd_uhs_pins>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <&vqmmc_sdhi0>;
|
|
wp-gpios = <&pinctrl RZT2H_GPIO(22, 6) GPIO_ACTIVE_HIGH>;
|
|
bus-width = <4>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
#endif
|
|
|
|
#if SD1_MICRO_SD
|
|
&sdhi1 {
|
|
pinctrl-0 = <&sdhi1_pins>;
|
|
pinctrl-1 = <&sdhi1_uhs_pins>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <&vccq_sdhi1>;
|
|
bus-width = <4>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
#endif
|
|
|
|
&usb2_phy {
|
|
pinctrl-0 = <&usb_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&wdt2 {
|
|
status = "okay";
|
|
timeout-sec = <60>;
|
|
};
|
|
|
|
&xspi0 {
|
|
pinctrl-0 = <&xspi0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
assigned-clocks = <&cpg CPG_CORE R9A09G077_XSPI_CLK0>;
|
|
assigned-clock-rates = <50000000>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
vcc-supply = <®_3p3v>;
|
|
m25p,fast-read;
|
|
/*
|
|
* Configure for 1-bit mode to prevent the BootROM from failing
|
|
* to load the first-stage bootloader following a watchdog reset.
|
|
*/
|
|
spi-tx-bus-width = <1>;
|
|
spi-rx-bus-width = <1>;
|
|
spi-max-frequency = <50000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bl2-0";
|
|
reg = <0x00000000 0x00060000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@60000 {
|
|
label = "fip-0";
|
|
reg = <0x00060000 0x007a0000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@800000 {
|
|
label = "user-0";
|
|
reg = <0x800000 0x003800000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&xspi1 {
|
|
pinctrl-0 = <&xspi1_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
assigned-clocks = <&cpg CPG_CORE R9A09G077_XSPI_CLK1>;
|
|
assigned-clock-rates = <50000000>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
vcc-supply = <®_3p3v>;
|
|
m25p,fast-read;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-max-frequency = <50000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bl2-1";
|
|
reg = <0x00000000 0x00060000>;
|
|
};
|
|
|
|
partition@60000 {
|
|
label = "fip-1";
|
|
reg = <0x00060000 0x007a0000>;
|
|
};
|
|
|
|
partition@800000 {
|
|
label = "user-1";
|
|
reg = <0x800000 0x800000>;
|
|
};
|
|
};
|
|
};
|
|
};
|