289 lines
6.5 KiB
C
289 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Mediatek Hardware Random Number Generator
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*
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* Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
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* Copyright (C) 2026 Daniel Golle <daniel@makrotopia.org>
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*/
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#define MTK_RNG_DEV KBUILD_MODNAME
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#include <linux/arm-smccc.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/soc/mediatek/mtk_sip_svc.h>
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/* Runtime PM autosuspend timeout: */
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#define RNG_AUTOSUSPEND_TIMEOUT 100
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#define USEC_POLL 2
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#define TIMEOUT_POLL 60
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#define RNG_CTRL 0x00
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#define RNG_EN BIT(0)
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#define RNG_READY BIT(31)
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#define RNG_DATA 0x08
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/* Driver feature flags */
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#define MTK_RNG_SMC BIT(0)
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#define MTK_SIP_KERNEL_GET_RND MTK_SIP_SMC_CMD(0x550)
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#define to_mtk_rng(p) container_of(p, struct mtk_rng, rng)
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struct mtk_rng {
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void __iomem *base;
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struct clk *clk;
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struct hwrng rng;
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struct device *dev;
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unsigned long flags;
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};
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static int mtk_rng_init(struct hwrng *rng)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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u32 val;
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int err;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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val = readl(priv->base + RNG_CTRL);
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val |= RNG_EN;
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writel(val, priv->base + RNG_CTRL);
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return 0;
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}
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static void mtk_rng_cleanup(struct hwrng *rng)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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u32 val;
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val = readl(priv->base + RNG_CTRL);
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val &= ~RNG_EN;
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writel(val, priv->base + RNG_CTRL);
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clk_disable_unprepare(priv->clk);
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}
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static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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int ready;
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ready = readl(priv->base + RNG_CTRL) & RNG_READY;
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if (!ready && wait)
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readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready,
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ready & RNG_READY, USEC_POLL,
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TIMEOUT_POLL);
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return !!(ready & RNG_READY);
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}
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static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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int retval = 0;
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pm_runtime_get_sync(priv->dev);
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while (max >= sizeof(u32)) {
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if (!mtk_rng_wait_ready(rng, wait))
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break;
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*(u32 *)buf = readl(priv->base + RNG_DATA);
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retval += sizeof(u32);
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buf += sizeof(u32);
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max -= sizeof(u32);
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}
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pm_runtime_put_sync_autosuspend(priv->dev);
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return retval || !wait ? retval : -EIO;
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}
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static int mtk_rng_read_smc(struct hwrng *rng, void *buf, size_t max,
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bool wait)
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{
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struct arm_smccc_res res;
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int retval = 0;
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while (max >= sizeof(u32)) {
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arm_smccc_smc(MTK_SIP_KERNEL_GET_RND, 0, 0, 0, 0, 0, 0, 0,
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&res);
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if (res.a0)
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break;
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*(u32 *)buf = res.a1;
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retval += sizeof(u32);
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buf += sizeof(u32);
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max -= sizeof(u32);
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}
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return retval || !wait ? retval : -EIO;
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}
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static bool mtk_rng_hw_accessible(struct mtk_rng *priv)
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{
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u32 val;
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int err;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return false;
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val = readl(priv->base + RNG_CTRL);
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val |= RNG_EN;
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writel(val, priv->base + RNG_CTRL);
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val = readl(priv->base + RNG_CTRL);
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if (val & RNG_EN) {
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/* HW is accessible, clean up: disable RNG and clock */
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writel(val & ~RNG_EN, priv->base + RNG_CTRL);
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clk_disable_unprepare(priv->clk);
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return true;
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}
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/*
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* If TF-A blocks direct access, the register reads back as 0.
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* Leave the clock enabled as TF-A needs it.
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*/
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return false;
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}
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static int mtk_rng_probe(struct platform_device *pdev)
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{
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int ret;
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struct mtk_rng *priv;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = &pdev->dev;
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priv->rng.name = pdev->name;
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priv->rng.quality = 900;
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priv->flags = (unsigned long)device_get_match_data(&pdev->dev);
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if (!(priv->flags & MTK_RNG_SMC)) {
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priv->clk = devm_clk_get(&pdev->dev, "rng");
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if (IS_ERR(priv->clk)) {
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ret = PTR_ERR(priv->clk);
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dev_err(&pdev->dev, "no clock for device: %d\n", ret);
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return ret;
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}
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) &&
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of_device_is_compatible(pdev->dev.of_node,
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"mediatek,mt7986-rng") &&
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!mtk_rng_hw_accessible(priv)) {
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priv->flags |= MTK_RNG_SMC;
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dev_info(&pdev->dev,
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"HW RNG not MMIO accessible, using SMC\n");
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}
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}
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if (priv->flags & MTK_RNG_SMC) {
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if (!IS_ENABLED(CONFIG_HAVE_ARM_SMCCC))
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return -ENODEV;
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priv->rng.read = mtk_rng_read_smc;
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} else {
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#ifndef CONFIG_PM
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priv->rng.init = mtk_rng_init;
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priv->rng.cleanup = mtk_rng_cleanup;
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#endif
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priv->rng.read = mtk_rng_read;
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}
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ret = devm_hwrng_register(&pdev->dev, &priv->rng);
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if (ret) {
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dev_err(&pdev->dev, "failed to register rng device: %d\n",
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ret);
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return ret;
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}
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if (!(priv->flags & MTK_RNG_SMC)) {
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dev_set_drvdata(&pdev->dev, priv);
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pm_runtime_set_autosuspend_delay(&pdev->dev,
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RNG_AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(&pdev->dev);
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ret = devm_pm_runtime_enable(&pdev->dev);
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if (ret)
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return ret;
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}
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dev_info(&pdev->dev, "registered RNG driver\n");
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return 0;
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}
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#ifdef CONFIG_PM
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static int mtk_rng_runtime_suspend(struct device *dev)
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{
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struct mtk_rng *priv = dev_get_drvdata(dev);
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mtk_rng_cleanup(&priv->rng);
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return 0;
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}
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static int mtk_rng_runtime_resume(struct device *dev)
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{
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struct mtk_rng *priv = dev_get_drvdata(dev);
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return mtk_rng_init(&priv->rng);
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}
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static const struct dev_pm_ops mtk_rng_pm_ops = {
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SET_RUNTIME_PM_OPS(mtk_rng_runtime_suspend,
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mtk_rng_runtime_resume, NULL)
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SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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};
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#define MTK_RNG_PM_OPS (&mtk_rng_pm_ops)
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#else /* CONFIG_PM */
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#define MTK_RNG_PM_OPS NULL
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#endif /* CONFIG_PM */
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static const struct of_device_id mtk_rng_match[] = {
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{ .compatible = "mediatek,mt7623-rng" },
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{ .compatible = "mediatek,mt7981-rng", .data = (void *)MTK_RNG_SMC },
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{ .compatible = "mediatek,mt7986-rng" },
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{ .compatible = "mediatek,mt7987-rng", .data = (void *)MTK_RNG_SMC },
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{ .compatible = "mediatek,mt7988-rng", .data = (void *)MTK_RNG_SMC },
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_rng_match);
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static struct platform_driver mtk_rng_driver = {
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.probe = mtk_rng_probe,
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.driver = {
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.name = MTK_RNG_DEV,
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.pm = MTK_RNG_PM_OPS,
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.of_match_table = mtk_rng_match,
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},
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};
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module_platform_driver(mtk_rng_driver);
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MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
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MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
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MODULE_AUTHOR("Daniel Golle <daniel@makrotopia.org>");
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MODULE_LICENSE("GPL");
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