255 lines
7.0 KiB
C
255 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include "stmmac.h"
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#include "stmmac_pcs.h"
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/*
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* GMAC_AN_STATUS is equivalent to MII_BMSR
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* GMAC_ANE_ADV is equivalent to 802.3z MII_ADVERTISE
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* GMAC_ANE_LPA is equivalent to 802.3z MII_LPA
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* GMAC_ANE_EXP is equivalent to MII_EXPANSION
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* GMAC_TBI is equivalent to MII_ESTATUS
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*
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* ADV, LPA and EXP are only available for the TBI and RTBI modes.
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*/
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#define GMAC_AN_STATUS 0x04 /* AN status */
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#define GMAC_ANE_ADV 0x08 /* ANE Advertisement */
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#define GMAC_ANE_LPA 0x0c /* ANE link partener ability */
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#define GMAC_TBI 0x14 /* TBI extend status */
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/*
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* RGSMII status bitfield definitions.
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*/
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#define GMAC_RGSMII_LNKMOD BIT(0)
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#define GMAC_RGSMII_SPEED_MASK GENMASK(2, 1)
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#define GMAC_RGSMII_SPEED_125 2
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#define GMAC_RGSMII_SPEED_25 1
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#define GMAC_RGSMII_SPEED_2_5 0
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#define GMAC_RGSMII_LNKSTS BIT(3)
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static unsigned int dwmac_integrated_pcs_inband_caps(struct phylink_pcs *pcs,
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phy_interface_t interface)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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unsigned int ib_caps;
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if (phy_interface_mode_is_8023z(interface)) {
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ib_caps = LINK_INBAND_DISABLE;
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/* If the PCS supports TBI/RTBI, then BASE-X negotiation is
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* supported.
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*/
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if (spcs->support_tbi_rtbi)
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ib_caps |= LINK_INBAND_ENABLE;
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return ib_caps;
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}
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return 0;
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}
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static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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stmmac_mac_irq_modify(spcs->priv, 0, spcs->int_mask);
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return 0;
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}
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static void dwmac_integrated_pcs_disable(struct phylink_pcs *pcs)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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stmmac_mac_irq_modify(spcs->priv, spcs->int_mask, 0);
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}
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static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
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unsigned int neg_mode,
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struct phylink_link_state *state)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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u32 status, lpa, rgsmii;
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status = readl(spcs->base + GMAC_AN_STATUS);
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if (phy_interface_mode_is_8023z(state->interface)) {
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/* For BASE-X modes, the PCS block supports the advertisement
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* and link partner advertisement registers using standard
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* 802.3 format. The status register also has the link status
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* and AN complete bits in the same bit location. This will
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* only be used when AN is enabled.
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*/
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lpa = readl(spcs->base + GMAC_ANE_LPA);
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phylink_mii_c22_pcs_decode_state(state, neg_mode, status, lpa);
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} else {
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rgsmii = field_get(spcs->rgsmii_status_mask,
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readl(spcs->rgsmii));
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state->link = status & BMSR_LSTATUS &&
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rgsmii & GMAC_RGSMII_LNKSTS;
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if (state->link && neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
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state->duplex = rgsmii & GMAC_RGSMII_LNKMOD ?
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DUPLEX_FULL : DUPLEX_HALF;
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switch (FIELD_GET(GMAC_RGSMII_SPEED_MASK, rgsmii)) {
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case GMAC_RGSMII_SPEED_2_5:
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state->speed = SPEED_10;
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break;
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case GMAC_RGSMII_SPEED_25:
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state->speed = SPEED_100;
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break;
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case GMAC_RGSMII_SPEED_125:
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state->speed = SPEED_1000;
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break;
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default:
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state->link = false;
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break;
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}
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}
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}
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}
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static int dwmac_integrated_pcs_config_aneg(struct stmmac_pcs *spcs,
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phy_interface_t interface,
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const unsigned long *advertising)
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{
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bool changed = false;
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u32 adv;
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adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
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if (readl(spcs->base + GMAC_ANE_ADV) != adv)
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changed = true;
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writel(adv, spcs->base + GMAC_ANE_ADV);
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return changed;
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}
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static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
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unsigned int neg_mode,
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phy_interface_t interface,
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const unsigned long *advertising,
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bool permit_pause_to_mac)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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bool changed = false, ane = true;
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/* Only configure the advertisement and allow AN in BASE-X mode if
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* the core supports TBI/RTBI. AN will be filtered out by via phylink
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* and the .pcs_inband_caps() method above.
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*/
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if (phy_interface_mode_is_8023z(interface) &&
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spcs->support_tbi_rtbi) {
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ane = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
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changed = dwmac_integrated_pcs_config_aneg(spcs, interface,
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advertising);
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}
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dwmac_ctrl_ane(spcs->base, 0, ane,
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spcs->priv->hw->reverse_sgmii_enable);
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return changed;
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}
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static void dwmac_integrated_pcs_an_restart(struct phylink_pcs *pcs)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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void __iomem *an_control = spcs->base + GMAC_AN_CTRL(0);
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u32 ctrl;
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/* We can only do AN restart if using TBI/RTBI mode */
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if (spcs->support_tbi_rtbi) {
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ctrl = readl(an_control) | GMAC_AN_CTRL_RAN;
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writel(ctrl, an_control);
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}
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}
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static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {
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.pcs_inband_caps = dwmac_integrated_pcs_inband_caps,
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.pcs_enable = dwmac_integrated_pcs_enable,
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.pcs_disable = dwmac_integrated_pcs_disable,
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.pcs_get_state = dwmac_integrated_pcs_get_state,
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.pcs_config = dwmac_integrated_pcs_config,
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.pcs_an_restart = dwmac_integrated_pcs_an_restart,
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};
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void stmmac_integrated_pcs_irq(struct stmmac_priv *priv, u32 status,
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struct stmmac_extra_stats *x)
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{
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struct stmmac_pcs *spcs = priv->integrated_pcs;
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u32 val = readl(spcs->base + GMAC_AN_STATUS);
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if (status & PCS_ANE_IRQ) {
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x->irq_pcs_ane_n++;
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if (val & BMSR_ANEGCOMPLETE)
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dev_info(priv->device,
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"PCS ANE process completed\n");
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}
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if (status & PCS_LINK_IRQ) {
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x->irq_pcs_link_n++;
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dev_info(priv->device, "PCS Link %s\n",
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val & BMSR_LSTATUS ? "Up" : "Down");
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phylink_pcs_change(&spcs->pcs, val & BMSR_LSTATUS);
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}
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}
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int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
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phy_interface_t interface)
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{
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struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
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if (interface == PHY_INTERFACE_MODE_SGMII)
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return PHY_INTF_SEL_SGMII;
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if (phy_interface_mode_is_8023z(interface)) {
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if (spcs->support_tbi_rtbi)
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return PHY_INTF_SEL_TBI;
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else
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return PHY_INTF_SEL_SGMII;
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}
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return -EINVAL;
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}
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int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
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const struct stmmac_pcs_info *pcs_info)
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{
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struct stmmac_pcs *spcs;
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spcs = devm_kzalloc(priv->device, sizeof(*spcs), GFP_KERNEL);
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if (!spcs)
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return -ENOMEM;
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spcs->priv = priv;
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spcs->base = priv->ioaddr + pcs_info->pcs_offset;
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spcs->rgsmii = priv->ioaddr + pcs_info->rgsmii_offset;
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spcs->rgsmii_status_mask = pcs_info->rgsmii_status_mask;
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spcs->int_mask = pcs_info->int_mask;
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spcs->pcs.ops = &dwmac_integrated_pcs_ops;
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/* If the PCS supports extended status, then it supports BASE-X AN
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* with a TBI interface to the SerDes. Otherwise, we can support
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* BASE-X without AN using SGMII, which is required for qcom-ethqos.
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*/
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if (readl(spcs->base + GMAC_AN_STATUS) & BMSR_ESTATEN)
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spcs->support_tbi_rtbi = true;
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__set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_1000BASEX, spcs->pcs.supported_interfaces);
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/* Only allow 2500BASE-X if the SerDes has support. */
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if (priv->plat->flags & STMMAC_FLAG_SERDES_SUPPORTS_2500M)
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__set_bit(PHY_INTERFACE_MODE_2500BASEX,
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spcs->pcs.supported_interfaces);
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priv->integrated_pcs = spcs;
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return 0;
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}
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