403 lines
12 KiB
C
403 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Copyright(c) 2026 Realtek Corporation
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*/
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#include "chan.h"
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#include "debug.h"
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#include "phy.h"
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#include "reg.h"
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#include "rtw8922d.h"
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#include "rtw8922d_rfk.h"
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static const struct rtw89_reg5_def rtw8922d_nctl_post_defs[] = {
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RTW89_DECL_RFK_WM(0x20c7c, 0x00e00000, 0x1),
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};
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RTW89_DECLARE_RFK_TBL(rtw8922d_nctl_post_defs);
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static void rtw8922d_tssi_cont_en(struct rtw89_dev *rtwdev, bool en,
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enum rtw89_rf_path path, u8 phy_idx)
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{
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static const u32 tssi_trk_man[2] = {R_TSSI_EN_P0_BE4,
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R_TSSI_EN_P0_BE4 + 0x100};
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if (en)
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rtw89_phy_write32_idx(rtwdev, tssi_trk_man[path],
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B_TSSI_CONT_EN, 0, phy_idx);
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else
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rtw89_phy_write32_idx(rtwdev, tssi_trk_man[path],
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B_TSSI_CONT_EN, 1, phy_idx);
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}
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void rtw8922d_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, u8 phy_idx)
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{
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if (rtwdev->mlo_dbcc_mode == MLO_1_PLUS_1_1RF) {
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if (phy_idx == RTW89_PHY_0)
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rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_A, phy_idx);
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else
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rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_B, phy_idx);
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} else {
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rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_A, phy_idx);
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rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_B, phy_idx);
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}
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}
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static
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void rtw8922d_ctl_band_ch_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,
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const struct rtw89_chan *chan)
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{
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u8 synpath;
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u32 rf18;
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synpath = rtw89_phy_get_syn_sel(rtwdev, phy);
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rf18 = rtw89_chip_chan_to_rf18_val(rtwdev, chan);
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rtw89_write_rf(rtwdev, synpath, RR_RSV1, RFREG_MASK, 0x0);
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rtw89_write_rf(rtwdev, synpath, RR_MOD, RFREG_MASK, 0x30000);
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rtw89_write_rf(rtwdev, synpath, RR_CFGCH, RFREG_MASK, rf18);
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fsleep(400);
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rtw89_write_rf(rtwdev, synpath, RR_RSV1, RFREG_MASK, 0x1);
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rtw89_write_rf(rtwdev, synpath, RR_CFGCH_V1, RFREG_MASK, rf18);
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}
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void rtw8922d_set_channel_rf(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8922d_ctl_band_ch_bw(rtwdev, phy_idx, chan);
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}
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enum _rf_syn_pow {
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RF_SYN_ON_OFF,
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RF_SYN_OFF_ON,
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RF_SYN_ALLON,
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RF_SYN_ALLOFF,
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};
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static void rtw8922d_set_syn01(struct rtw89_dev *rtwdev, enum _rf_syn_pow syn)
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{
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rtw89_debug(rtwdev, RTW89_DBG_RFK, "SYN config=%d\n", syn);
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if (syn == RF_SYN_ALLON) {
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, BIT(1), 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, BIT(1), 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x1);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x1);
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} else if (syn == RF_SYN_ON_OFF) {
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, BIT(1), 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x1);
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} else if (syn == RF_SYN_OFF_ON) {
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, BIT(1), 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x1);
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} else if (syn == RF_SYN_ALLOFF) {
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
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}
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}
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void rtw8922d_chlk_ktbl_ctl_mld(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool manual)
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{
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if (manual) {
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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u8 path = phy_idx; /* numerical equal for target */
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u8 idx = rfk_mcc[path].table_idx;
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_RST, 0x1);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_RST, 0x1);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX0, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX1, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX0, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX1, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL0, idx & BIT(0));
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rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
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rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL0, idx & BIT(0));
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rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
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return;
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}
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_RST, 0x0);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_RST, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_SW_SEL, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_SW_SEL, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_SW_SEL, 0x0);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_SW_SEL, 0x0);
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}
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static void rtw8922d_chlk_ktbl_sel_mld(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx, u8 idx)
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{
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if (phy_idx == RTW89_PHY_0) {
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_MLD_IDX0, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_MLD_IDX0, idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_TBL_SEL_IDX0, idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_TBL_SEL_IDX0, idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_TBL_SEL_IDX0, idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_TBL_SEL_IDX0, idx);
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} else if (phy_idx == RTW89_PHY_1) {
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_MLD_IDX1, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_MLD_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_TBL_SEL_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_TBL_SEL_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_TBL_SEL_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_TBL_SEL_IDX1, idx);
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}
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rtw8922d_chlk_ktbl_ctl_mld(rtwdev, phy_idx, false);
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}
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static void rtw8922d_chlk_ktbl_sel(struct rtw89_dev *rtwdev, u8 kpath, u8 idx)
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{
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if (idx > 2) {
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rtw89_warn(rtwdev, "[DBCC][ERROR]indx is out of limit!! index(%d)", idx);
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return;
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}
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if (kpath & RF_A) {
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_RST, 0x1);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX0, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_TXG_SEL, 0x4 | idx);
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rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_TXG_SEL, 0x4 | idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL0, idx & BIT(0));
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rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
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}
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if (kpath & RF_B) {
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_RST, 0x1);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX0, idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX1, idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_TXG_SEL, 0x4 | idx);
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rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_TXG_SEL, 0x4 | idx);
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rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL0, idx & BIT(0));
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rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
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}
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}
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static u8 rtw8922d_chlk_reload_sel_tbl(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan, u8 path)
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{
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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struct rtw89_rfk_chan_desc desc[__RTW89_RFK_CHS_NR_V1] = {};
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u8 tbl_sel;
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for (tbl_sel = 0; tbl_sel < ARRAY_SIZE(desc); tbl_sel++) {
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struct rtw89_rfk_chan_desc *p = &desc[tbl_sel];
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p->ch = rfk_mcc->ch[tbl_sel];
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p->has_band = true;
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p->band = rfk_mcc->band[tbl_sel];
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p->has_bw = true;
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p->bw = rfk_mcc->bw[tbl_sel];
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}
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tbl_sel = rtw89_rfk_chan_lookup(rtwdev, desc, ARRAY_SIZE(desc), chan);
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rfk_mcc->ch[tbl_sel] = chan->channel;
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rfk_mcc->band[tbl_sel] = chan->band_type;
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rfk_mcc->bw[tbl_sel] = chan->band_width;
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rfk_mcc->rf18[tbl_sel] = rtw89_chip_chan_to_rf18_val(rtwdev, chan);
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/* shared table array, but tbl_sel can be independent by path */
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rfk_mcc[path].table_idx = tbl_sel;
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return tbl_sel;
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}
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static void rtw8922d_chlk_reload(struct rtw89_dev *rtwdev)
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{
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struct rtw89_entity_conf conf;
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u8 s0_tbl, s1_tbl;
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rtw89_entity_get_conf(rtwdev, &conf);
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s0_tbl = rtw8922d_chlk_reload_sel_tbl(rtwdev, conf.chans[0], 0);
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s1_tbl = rtw8922d_chlk_reload_sel_tbl(rtwdev, conf.chans[1], 1);
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if (conf.is_mld)
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goto mld;
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rtw8922d_chlk_ktbl_sel(rtwdev, RF_A, s0_tbl);
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rtw8922d_chlk_ktbl_sel(rtwdev, RF_B, s1_tbl);
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return;
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mld:
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if (test_bit(RTW89_PHY_0, conf.hw_bitmap))
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rtw8922d_chlk_ktbl_sel_mld(rtwdev, RTW89_PHY_0, s0_tbl);
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if (test_bit(RTW89_PHY_1, conf.hw_bitmap))
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rtw8922d_chlk_ktbl_sel_mld(rtwdev, RTW89_PHY_1, s1_tbl);
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}
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static enum _rf_syn_pow rtw8922d_get_syn_pow(struct rtw89_dev *rtwdev)
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{
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switch (rtwdev->mlo_dbcc_mode) {
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case MLO_0_PLUS_2_1RF:
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return RF_SYN_OFF_ON;
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case MLO_0_PLUS_2_2RF:
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case MLO_1_PLUS_1_2RF:
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case MLO_2_PLUS_0_1RF:
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case MLO_2_PLUS_0_2RF:
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case MLO_2_PLUS_2_2RF:
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case MLO_DBCC_NOT_SUPPORT:
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default:
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return RF_SYN_ON_OFF;
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case MLO_1_PLUS_1_1RF:
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case DBCC_LEGACY:
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return RF_SYN_ALLON;
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}
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}
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void rtw8922d_rfk_mlo_ctrl(struct rtw89_dev *rtwdev)
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{
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enum _rf_syn_pow syn_pow = rtw8922d_get_syn_pow(rtwdev);
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if (!rtwdev->dbcc_en)
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goto set_rfk_reload;
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rtw8922d_set_syn01(rtwdev, syn_pow);
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set_rfk_reload:
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rtw8922d_chlk_reload(rtwdev);
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}
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static void rtw8922d_x4k_setting(struct rtw89_dev *rtwdev)
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{
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u32 val;
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val = rtw89_read_rf(rtwdev, RF_PATH_A, 0xB9, 0xF000);
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rtw89_write_rf(rtwdev, RF_PATH_A, 0xB9, 0xF000, val);
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val = rtw89_read_rf(rtwdev, RF_PATH_B, 0xB9, 0xF000);
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rtw89_write_rf(rtwdev, RF_PATH_B, 0xB9, 0xF000, val);
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rtw89_write_rf(rtwdev, RF_PATH_A, 0xC2, BIT(19), 0x1);
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rtw89_write_rf(rtwdev, RF_PATH_B, 0xC2, BIT(19), 0x1);
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}
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void rtw8922d_rfk_hw_init(struct rtw89_dev *rtwdev)
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{
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rtw8922d_x4k_setting(rtwdev);
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}
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void rtw8922d_pre_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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bool mlo_1_1;
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if (!rtwdev->dbcc_en)
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return;
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mlo_1_1 = rtw89_is_mlo_1_1(rtwdev);
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if (mlo_1_1)
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rtw8922d_set_syn01(rtwdev, RF_SYN_ALLON);
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else if (phy_idx == RTW89_PHY_0)
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rtw8922d_set_syn01(rtwdev, RF_SYN_ON_OFF);
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else
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rtw8922d_set_syn01(rtwdev, RF_SYN_OFF_ON);
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fsleep(1000);
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}
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void rtw8922d_post_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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rtw8922d_rfk_mlo_ctrl(rtwdev);
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}
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static u8 _get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)
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{
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rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1);
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rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x0);
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rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1);
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fsleep(200);
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return rtw89_read_rf(rtwdev, path, RR_TM, RR_TM_VAL_V1);
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}
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static void _lck_keep_thermal(struct rtw89_dev *rtwdev)
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{
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struct rtw89_lck_info *lck = &rtwdev->lck;
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int path;
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for (path = 0; path < rtwdev->chip->rf_path_num; path++) {
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lck->thermal[path] = _get_thermal(rtwdev, path);
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rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,
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"[LCK] path=%d thermal=0x%x", path, lck->thermal[path]);
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}
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}
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static void _lck(struct rtw89_dev *rtwdev)
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{
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enum _rf_syn_pow syn_pow = rtw8922d_get_syn_pow(rtwdev);
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u8 path_mask = 0;
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u32 tmp18, tmp5;
|
|
int path;
|
|
|
|
rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, "[LCK] DO LCK\n");
|
|
|
|
if (syn_pow == RF_SYN_ALLON)
|
|
path_mask = BIT(RF_PATH_A) | BIT(RF_PATH_B);
|
|
else if (syn_pow == RF_SYN_ON_OFF)
|
|
path_mask = BIT(RF_PATH_A);
|
|
else if (syn_pow == RF_SYN_OFF_ON)
|
|
path_mask = BIT(RF_PATH_B);
|
|
else
|
|
return;
|
|
|
|
for (path = 0; path < rtwdev->chip->rf_path_num; path++) {
|
|
if (!(path_mask & BIT(path)))
|
|
continue;
|
|
|
|
tmp18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, MASKDWORD);
|
|
tmp5 = rtw89_read_rf(rtwdev, path, RR_RSV1, MASKDWORD);
|
|
|
|
rtw89_write_rf(rtwdev, path, RR_MOD, MASKDWORD, 0x10000);
|
|
rtw89_write_rf(rtwdev, path, RR_RSV1, MASKDWORD, 0x0);
|
|
rtw89_write_rf(rtwdev, path, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1);
|
|
rtw89_write_rf(rtwdev, path, RR_CFGCH, MASKDWORD, tmp18);
|
|
rtw89_write_rf(rtwdev, path, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0);
|
|
|
|
fsleep(400);
|
|
|
|
rtw89_write_rf(rtwdev, path, RR_RSV1, MASKDWORD, tmp5);
|
|
}
|
|
|
|
_lck_keep_thermal(rtwdev);
|
|
}
|
|
|
|
#define RTW8922D_LCK_TH 16
|
|
void rtw8922d_lck_track(struct rtw89_dev *rtwdev)
|
|
{
|
|
struct rtw89_lck_info *lck = &rtwdev->lck;
|
|
u8 cur_thermal;
|
|
int delta;
|
|
int path;
|
|
|
|
for (path = 0; path < rtwdev->chip->rf_path_num; path++) {
|
|
cur_thermal = _get_thermal(rtwdev, path);
|
|
delta = abs((int)cur_thermal - lck->thermal[path]);
|
|
|
|
rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,
|
|
"[LCK] path=%d current thermal=0x%x delta=0x%x\n",
|
|
path, cur_thermal, delta);
|
|
|
|
if (delta >= RTW8922D_LCK_TH) {
|
|
_lck(rtwdev);
|
|
return;
|
|
}
|
|
}
|
|
}
|