640 lines
32 KiB
C
640 lines
32 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef QCOM_PHY_QMP_QSERDES_V8_LALBH_
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#define QCOM_PHY_QMP_QSERDES_V8_LALBH_
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#define QSERDES_V8_LALB_BIST_MODE_LANENO 0x0
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#define QSERDES_V8_LALB_BIST_INVERT 0x4
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#define QSERDES_V8_LALB_PERL_LENGTH1 0x8
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#define QSERDES_V8_LALB_PERL_LENGTH2 0xc
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#define QSERDES_V8_LALB_BIST_PATTERN1 0x10
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#define QSERDES_V8_LALB_BIST_PATTERN2 0x14
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#define QSERDES_V8_LALB_BIST_PATTERN3 0x18
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#define QSERDES_V8_LALB_BIST_PATTERN4 0x1c
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#define QSERDES_V8_LALB_BIST_PATTERN5 0x20
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#define QSERDES_V8_LALB_BIST_PATTERN6 0x24
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#define QSERDES_V8_LALB_BIST_PATTERN7 0x28
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#define QSERDES_V8_LALB_BIST_PATTERN8 0x2c
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#define QSERDES_V8_LALB_PRBS_SEED1 0x30
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#define QSERDES_V8_LALB_PRBS_SEED2 0x34
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#define QSERDES_V8_LALB_PRBS_SEED3 0x38
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#define QSERDES_V8_LALB_PRBS_SEED4 0x3c
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#define QSERDES_V8_LALB_PRBS_SEED5 0x40
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#define QSERDES_V8_LALB_PRBS_SEED6 0x44
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#define QSERDES_V8_LALB_PRBS_SEED7 0x48
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#define QSERDES_V8_LALB_SW_RESET_PWRDNB 0x4c
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#define QSERDES_V8_LALB_RESET_GEN 0x50
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#define QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL 0x54
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#define QSERDES_V8_LALB_CDR_EN_RXEQ_RESET 0x58
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#define QSERDES_V8_LALB_CLKBUF_ENABLE 0x5c
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#define QSERDES_V8_LALB_TX0_EMP_POST1_LVL 0x60
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#define QSERDES_V8_LALB_TX1_EMP_POST1_LVL 0x64
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#define QSERDES_V8_LALB_TX0_IDLE_CTRL 0x68
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#define QSERDES_V8_LALB_TX1_IDLE_CTRL 0x6c
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#define QSERDES_V8_LALB_TX0_DRV_LVL 0x70
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#define QSERDES_V8_LALB_TX0_DRV_LVL_OFFSET 0x74
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#define QSERDES_V8_LALB_TX1_DRV_LVL 0x78
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#define QSERDES_V8_LALB_TX1_DRV_LVL_OFFSET 0x7c
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#define QSERDES_V8_LALB_TRAN_DRVR_EMP_EN 0x80
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#define QSERDES_V8_LALB_TX_LVL_UPDATE_CTRL 0x84
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#define QSERDES_V8_LALB_TX0_PRE1_EMPH 0x88
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#define QSERDES_V8_LALB_TX1_PRE1_EMPH 0x8c
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#define QSERDES_V8_LALB_TX0_PRE2_EMPH 0x90
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#define QSERDES_V8_LALB_TX1_PRE2_EMPH 0x94
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#define QSERDES_V8_LALB_STALL_LDO_BOOST_EN 0x98
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#define QSERDES_V8_LALB_PRE_EMPH_EN_CTRL 0x9c
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#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL1 0xa0
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#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL2 0xa4
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#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL3 0xa8
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#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL4 0xac
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#define QSERDES_V8_LALB_TRANSMITTER_EN_CTRL 0xb0
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#define QSERDES_V8_LALB_HIGHZ_DRVR_EN 0xb4
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#define QSERDES_V8_LALB_TX_MISC_CTRL1 0xb8
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#define QSERDES_V8_LALB_LPB_EN_CTRL1 0xbc
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#define QSERDES_V8_LALB_LBP_EN_CTRL2 0xc0
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#define QSERDES_V8_LALB_TX0_SERDES_BYP_CTRL 0xc4
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#define QSERDES_V8_LALB_TX1_SERDES_BYP_CTRL 0xc8
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#define QSERDES_V8_LALB_LANE_MODE_1 0xcc
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#define QSERDES_V8_LALB_LANE_MODE_2 0xd0
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#define QSERDES_V8_LALB_LANE_MODE_3 0xd4
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#define QSERDES_V8_LALB_LANE_MODE_4 0xd8
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#define QSERDES_V8_LALB_ATB_SEL1 0xdc
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#define QSERDES_V8_LALB_ATB_SEL2 0xe0
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#define QSERDES_V8_LALB_TX0_RES_CODE_LANE 0xe4
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#define QSERDES_V8_LALB_TX0_RESTRIM_ICAL_OVRD 0xe8
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#define QSERDES_V8_LALB_TX0_RESTRIM_CAL_CTRL 0xec
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#define QSERDES_V8_LALB_TX0_RESTRIM_INIT_CODE 0xf0
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#define QSERDES_V8_LALB_TX0_RESTRIM_POST_CAL_OFFSET 0xf4
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#define QSERDES_V8_LALB_TX1_RES_CODE_LANE 0xf8
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#define QSERDES_V8_LALB_TX1_RESTRIM_ICAL_OVRD 0xfc
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#define QSERDES_V8_LALB_TX1_RESTRIM_CAL_CTRL 0x100
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#define QSERDES_V8_LALB_TX1_RESTRIM_INIT_CODE 0x104
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#define QSERDES_V8_LALB_TX1_RESTRIM_POST_CAL_OFFSET 0x108
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#define QSERDES_V8_LALB_TX0_RESTRIM_VREF_SEL 0x10c
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#define QSERDES_V8_LALB_TX1_RESTRIM_VREF_SEL 0x110
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#define QSERDES_V8_LALB_VMODE_CTRL1 0x114
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#define QSERDES_V8_LALB_SLEW_CNTL_RATE01 0x118
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#define QSERDES_V8_LALB_SLEW_CNTL_RATE23 0x11c
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#define QSERDES_V8_LALB_SLEW_CNTL_RATE4 0x120
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#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT1 0x124
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#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT2 0x128
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#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT3 0x12c
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#define QSERDES_V8_LALB_PCS_INTERFACE_SELECT1 0x130
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#define QSERDES_V8_LALB_PCS_INTERFACE_SELECT2 0x134
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#define QSERDES_V8_LALB_LDO_TIMER_CTRL 0x138
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#define QSERDES_V8_LALB_AC_JTAG_ENABLE 0x13c
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#define QSERDES_V8_LALB_AC_JTAG_INITP 0x140
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#define QSERDES_V8_LALB_AC_JTAG_INITN 0x144
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#define QSERDES_V8_LALB_AC_JTAG_LVL 0x148
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#define QSERDES_V8_LALB_AC_JTAG_MODE 0x14c
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#define QSERDES_V8_LALB_AC_JTAG_RESET 0x150
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B0 0x154
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B1 0x158
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B2 0x15c
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B3 0x160
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B4 0x164
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B5 0x168
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B6 0x16c
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#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B7 0x170
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B0 0x174
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B1 0x178
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B2 0x17c
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B3 0x180
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B4 0x184
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B5 0x188
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B6 0x18c
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#define QSERDES_V8_LALB_RX_MODE_RATE2_B7 0x190
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B0 0x194
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B1 0x198
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B2 0x19c
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B3 0x1a0
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B4 0x1a4
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B5 0x1a8
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B6 0x1ac
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#define QSERDES_V8_LALB_RX_MODE_RATE3_B7 0x1b0
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B0 0x1b4
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B1 0x1b8
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B2 0x1bc
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B3 0x1c0
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B4 0x1c4
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B5 0x1c8
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B6 0x1cc
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#define QSERDES_V8_LALB_RX_MODE_RATE4_B7 0x1d0
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#define QSERDES_V8_LALB_TX_DCC_ANA_CTRL1 0x1d4
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#define QSERDES_V8_LALB_TX_DCC_ANA_CTRL2 0x1d8
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#define QSERDES_V8_LALB_CMUX_DCC_CTRL1 0x1dc
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#define QSERDES_V8_LALB_CMUX_DCC_POSTCAL_OFFSET 0x1e0
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#define QSERDES_V8_LALB_CMUX_DCC_OVRD 0x1e4
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#define QSERDES_V8_LALB_TX_DCC_CTRL 0x1e8
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#define QSERDES_V8_LALB_TX0_CTUNE_DCC_CONFIG 0x1ec
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#define QSERDES_V8_LALB_TX0_CTUNE_DCC_POSTCAL_OFFSET 0x1f0
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#define QSERDES_V8_LALB_TX0_CTUNE_DCC_OVRD 0x1f4
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#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_CONFIG 0x1f8
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#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_OFFSET_AND_OVRD 0x1fc
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#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_CONFIG 0x200
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#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_OFFSET_AND_OVRD 0x204
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#define QSERDES_V8_LALB_TX1_CTUNE_DCC_CONFIG 0x208
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#define QSERDES_V8_LALB_TX1_CTUNE_DCC_POSTCAL_OFFSET 0x20c
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#define QSERDES_V8_LALB_TX1_CTUNE_DCC_OVRD 0x210
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#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_CONFIG 0x214
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#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_OFFSET_AND_OVRD 0x218
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#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_CONFIG 0x21c
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#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_OFFSET_AND_OVRD 0x220
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CTRL 0x224
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE0 0x228
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE1 0x22c
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE2 0x230
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE3 0x234
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE4 0x238
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#define QSERDES_V8_LALB_CDR_VCO_CAL_CTRL 0x23c
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE0 0x240
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE0 0x244
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE1 0x248
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE1 0x24c
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE2 0x250
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE2 0x254
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE3 0x258
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE3 0x25c
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE4 0x260
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#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE4 0x264
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#define QSERDES_V8_LALB_CDR_VCTRL_RATE_0_1 0x268
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#define QSERDES_V8_LALB_CDR_VCTRL_RATE_2_3 0x26c
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#define QSERDES_V8_LALB_CDR_VCTRL_RATE_4 0x270
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#define QSERDES_V8_LALB_KVCO_INIT_RATE_0_1 0x274
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#define QSERDES_V8_LALB_KVCO_INIT_RATE_2_3 0x278
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#define QSERDES_V8_LALB_KVCO_INIT_RATE_4 0x27c
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#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE0 0x280
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#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE1 0x284
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#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE2 0x288
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#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE3 0x28c
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#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE4 0x290
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_0_1 0x294
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_2_3 0x298
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_4 0x29c
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_0_1 0x2a0
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_2_3 0x2a4
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#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_4 0x2a8
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE0 0x2ac
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE0 0x2b0
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE1 0x2b4
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE1 0x2b8
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE2 0x2bc
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE2 0x2c0
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE3 0x2c4
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE3 0x2c8
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE4 0x2cc
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#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE4 0x2d0
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#define QSERDES_V8_LALB_KP_CDR_UP_DN 0x2d4
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#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE_0_1 0x2d8
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#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE_2_3 0x2dc
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#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE4 0x2e0
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE0 0x2e4
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE0 0x2e8
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE1 0x2ec
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE1 0x2f0
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE2 0x2f4
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE2 0x2f8
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE3 0x2fc
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE3 0x300
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE4 0x304
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#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE4 0x308
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#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE0 0x30c
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#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE1 0x310
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#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE2 0x314
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#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE3 0x318
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#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE4 0x31c
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#define QSERDES_V8_LALB_CDR_KVCO_KP_CAL_FREQ_MEAS_CTRL 0x320
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#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CTRL 0x324
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#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT1 0x328
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#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT2 0x32c
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#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT3 0x330
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#define QSERDES_V8_LALB_RX_SUMMER_CAL_SPD_MODE_RATE_0123 0x334
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#define QSERDES_V8_LALB_RX_SUMMER_CAL_SPD_MODE_RATE_4 0x338
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE0 0x33c
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE1 0x340
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE2 0x344
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE3 0x348
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE4 0x34c
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL1 0x350
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL2 0x354
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL3 0x358
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#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL4 0x35c
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#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE0 0x360
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#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE1 0x364
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#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE2 0x368
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#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE3 0x36c
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#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE4 0x370
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#define QSERDES_V8_LALB_RX_IDAC_I0_DC_OFFSETS 0x374
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#define QSERDES_V8_LALB_RX_IDAC_I0BAR_DC_OFFSETS 0x378
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#define QSERDES_V8_LALB_RX_IDAC_I1_DC_OFFSETS 0x37c
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#define QSERDES_V8_LALB_RX_IDAC_I1BAR_DC_OFFSETS 0x380
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#define QSERDES_V8_LALB_RX_IDAC_Q_DC_OFFSETS 0x384
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#define QSERDES_V8_LALB_RX_IDAC_QBAR_DC_OFFSETS 0x388
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#define QSERDES_V8_LALB_RX_IDAC_A_DC_OFFSETS 0x38c
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#define QSERDES_V8_LALB_RX_IDAC_ABAR_DC_OFFSETS 0x390
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#define QSERDES_V8_LALB_RX_IDAC_EN 0x394
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#define QSERDES_V8_LALB_DATA_SLICER_INIT_TIMER_CTRL 0x398
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#define QSERDES_V8_LALB_RX_IDAC_ENABLES 0x39c
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#define QSERDES_V8_LALB_RX_IDAC_SIGN 0x3a0
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#define QSERDES_V8_LALB_RX_IDAC_TSETTLE 0x3a4
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#define QSERDES_V8_LALB_SIGDET_ENABLES 0x3a8
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#define QSERDES_V8_LALB_SIGDET_CNTRL 0x3ac
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#define QSERDES_V8_LALB_SIGDET_LVL 0x3b0
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#define QSERDES_V8_LALB_SIGDET_DEGLITCH_CNTRL 0x3b4
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#define QSERDES_V8_LALB_SIGDET_CAL_CTRL1 0x3b8
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#define QSERDES_V8_LALB_SIGDET_CAL_CTRL2_AND_CDR_LOCK_EDGE 0x3bc
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#define QSERDES_V8_LALB_SIGDET_CAL_TRIM 0x3c0
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#define QSERDES_V8_LALB_IA_OFFSET_CENTER_CAL_CTRL 0x3c4
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#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE0 0x3c8
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#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE1 0x3cc
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#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE2 0x3d0
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#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE3 0x3d4
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#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE4 0x3d8
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE0 0x3dc
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE1 0x3e0
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE2 0x3e4
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE3 0x3e8
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE4 0x3ec
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#define QSERDES_V8_LALB_CDR_LOCK_CTRL 0x3f0
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#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE0 0x3f4
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#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE1 0x3f8
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#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE2 0x3fc
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#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE3 0x400
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#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE4 0x404
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#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE0 0x408
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#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE1 0x40c
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#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE2 0x410
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#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE3 0x414
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#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE4 0x418
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#define QSERDES_V8_LALB_CDR_FLL_DIV_RATIO_RATE_0123 0x41c
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#define QSERDES_V8_LALB_CDR_FLL_DIV_RATIO_RATE4 0x420
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#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE_01 0x424
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#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE_23 0x428
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#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE4 0x42c
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE_0_1 0x430
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE_2_3 0x434
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE4 0x438
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE_0_1 0x43c
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE_2_3 0x440
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE4 0x444
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE_0_1 0x448
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE_2_3 0x44c
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#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE4 0x450
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#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_RATE_0123 0x454
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#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_RATE4 0x458
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#define QSERDES_V8_LALB_CDR_VCO_TYPE_CONFIG 0x45c
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#define QSERDES_V8_LALB_CDR_VCO_EN_LOWFREQ 0x460
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#define QSERDES_V8_LALB_CDR_FAST_SLOW_VCO_OVRD 0x464
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#define QSERDES_V8_LALB_CDR_LOOP_FUNC_CTRL 0x468
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#define QSERDES_V8_LALB_CDR_FAST_LOCK_EN_CTRL 0x46c
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#define QSERDES_V8_LALB_RX_RCVR_EN 0x470
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#define QSERDES_V8_LALB_LANE_RATE_CTRL 0x474
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#define QSERDES_V8_LALB_RX_TERM_RCVR_CTRL 0x478
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#define QSERDES_V8_LALB_REC_DETECT_CTRL 0x47c
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#define QSERDES_V8_LALB_RCV_DETECT_LVL 0x480
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#define QSERDES_V8_LALB_GM_CAL_EN 0x484
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#define QSERDES_V8_LALB_GM_CAL_RES_RATE0_1 0x488
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#define QSERDES_V8_LALB_GM_CAL_RES_RATE2_3 0x48c
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#define QSERDES_V8_LALB_GM_CAL_RES_RATE4 0x490
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#define QSERDES_V8_LALB_RX_TERM_BW_RATE_0123 0x494
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#define QSERDES_V8_LALB_RX_TERM_BW_RATE4 0x498
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#define QSERDES_V8_LALB_AUX_CLK_CTRL 0x49c
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#define QSERDES_V8_LALB_AUX_OFFSET_CONTROL 0x4a0
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#define QSERDES_V8_LALB_AUXDATA_TB 0x4a4
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#define QSERDES_V8_LALB_EOM_CTRL1 0x4a8
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#define QSERDES_V8_LALB_EOM_CTRL2 0x4ac
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#define QSERDES_V8_LALB_EOM_CTRL3 0x4b0
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#define QSERDES_V8_LALB_EOM_CTRL4 0x4b4
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#define QSERDES_V8_LALB_DFE_EN_TIMER 0x4b8
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#define QSERDES_V8_LALB_RX_EQ_OFFSET_LSB 0x4bc
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#define QSERDES_V8_LALB_RX_EQ_OFFSET_MSB 0x4c0
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#define QSERDES_V8_LALB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x4c4
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#define QSERDES_V8_LALB_RX_OFFSET_ADAPTOR_CNTRL2 0x4c8
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#define QSERDES_V8_LALB_RX_OFFSET_ADAPTOR_CNTRL3 0x4cc
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#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL1 0x4d0
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#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL2 0x4d4
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#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL3 0x4d8
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#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL4 0x4dc
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#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL5 0x4e0
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#define QSERDES_V8_LALB_RX_EQU_KEQ_UP_LSB 0x4e4
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#define QSERDES_V8_LALB_RX_EQU_KEQ_UP_MSB 0x4e8
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#define QSERDES_V8_LALB_RX_EQU_KEQ_DN_LSB 0x4ec
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#define QSERDES_V8_LALB_RX_EQU_KEQ_DN_MSB 0x4f0
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#define QSERDES_V8_LALB_CTLE_ADP_RESET_INIT_CODE_RATE_0_1_2 0x4f4
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#define QSERDES_V8_LALB_CTLE_ADP_RESET_INIT_CODE_RATE_3_4 0x4f8
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#define QSERDES_V8_LALB_CTLE_POST_CAL_OFFSET_RATE_0_1_2 0x4fc
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#define QSERDES_V8_LALB_CTLE_POST_CAL_OFFSET_RATE_3_4 0x500
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#define QSERDES_V8_LALB_RX_VGA_GAIN2_BLK1 0x504
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#define QSERDES_V8_LALB_RX_VGA_GAIN2_BLK2 0x508
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#define QSERDES_V8_LALB_VGA_CAL_CNTRL1 0x50c
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#define QSERDES_V8_LALB_VGA_CAL_CNTRL2 0x510
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#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE0_1 0x514
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#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE2_3 0x518
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#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE4 0x51c
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#define QSERDES_V8_LALB_KVGA_CTRL1 0x520
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#define QSERDES_V8_LALB_KVGA_CTRL2 0x524
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#define QSERDES_V8_LALB_VTHRESH_CAL_CNTRL1 0x528
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#define QSERDES_V8_LALB_VTHRESH_CAL_CNTRL2 0x52c
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE0 0x530
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE1 0x534
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE2 0x538
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE3 0x53c
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE4 0x540
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#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_CAL_PAM3 0x544
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#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE_0_1 0x548
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#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE_2_3 0x54c
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#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE4 0x550
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#define QSERDES_V8_LALB_DFE_TAP1_CTRL 0x554
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#define QSERDES_V8_LALB_DFE_TAP1_MANVAL_KTAP 0x558
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#define QSERDES_V8_LALB_DFE_TAP1_POST_CAL_OFFSET_RATE_0_1_2 0x55c
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#define QSERDES_V8_LALB_DFE_TAP1_POST_CAL_OFFSET_RATE_3_4 0x560
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#define QSERDES_V8_LALB_DFE_TAP2_CTRL 0x564
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#define QSERDES_V8_LALB_DFE_TAP2_MANVAL_KTAP 0x568
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#define QSERDES_V8_LALB_DFE_TAP3_CTRL 0x56c
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#define QSERDES_V8_LALB_DFE_TAP3_MANVAL_KTAP 0x570
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#define QSERDES_V8_LALB_DFE_TAP4_CTRL 0x574
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#define QSERDES_V8_LALB_DFE_TAP4_MANVAL_KTAP 0x578
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#define QSERDES_V8_LALB_DFE_TAP5_CTRL 0x57c
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#define QSERDES_V8_LALB_DFE_TAP5_MANVAL_KTAP 0x580
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#define QSERDES_V8_LALB_DFE_TAP6_CTRL 0x584
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#define QSERDES_V8_LALB_DFE_TAP6_MANVAL_KTAP 0x588
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#define QSERDES_V8_LALB_DFE_TAP7_CTRL 0x58c
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#define QSERDES_V8_LALB_DFE_TAP7_MANVAL_KTAP 0x590
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#define QSERDES_V8_LALB_DFE_TAP1_DAC_ENABLE 0x594
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#define QSERDES_V8_LALB_DFE_TAP2_DAC_ENABLE 0x598
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#define QSERDES_V8_LALB_DFE_TAP345_DAC_ENABLE 0x59c
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#define QSERDES_V8_LALB_DFE_TAP67_DAC_ENABLE 0x5a0
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#define QSERDES_V8_LALB_CDR_IQTUNE_CTRL 0x5a4
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#define QSERDES_V8_LALB_CDR_IQTUNE_GAIN 0x5a8
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#define QSERDES_V8_LALB_CDR_IQTUNE_MAN_INDEX 0x5ac
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#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CAL_CTRL1 0x5b0
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#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CAL_CTRL2 0x5b4
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE0 0x5b8
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE1 0x5bc
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE2 0x5c0
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE3 0x5c4
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE4 0x5c8
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE0 0x5cc
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE1 0x5d0
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE2 0x5d4
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE3 0x5d8
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#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE4 0x5dc
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#define QSERDES_V8_LALB_CDR_IQTUNE_ANA_CTRL 0x5e0
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#define QSERDES_V8_LALB_CDR_IQTUNE_VDCC_CTRL 0x5e4
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#define QSERDES_V8_LALB_CDR_IQTUNE_DIV2_CTRL_RATE0123 0x5e8
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#define QSERDES_V8_LALB_CDR_IQTUNE_DIV2_CTRL_RATE4 0x5ec
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#define QSERDES_V8_LALB_BLW_CTRL 0x5f0
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#define QSERDES_V8_LALB_BLW_ANA_VER_CTRL 0x5f4
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#define QSERDES_V8_LALB_BLW_GAIN_CAL_CTRL 0x5f8
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#define QSERDES_V8_LALB_BLW_GAIN_FORCE_CODE 0x5fc
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#define QSERDES_V8_LALB_BLW_MAN_VAL_RATE3 0x600
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#define QSERDES_V8_LALB_BLW_MAN_VAL_RATE4 0x604
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#define QSERDES_V8_LALB_IVTH_CAL_CTRL1 0x608
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#define QSERDES_V8_LALB_IVTH_CAL_CTRL2 0x60c
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#define QSERDES_V8_LALB_IVTH_CAL_CTRL3 0x610
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#define QSERDES_V8_LALB_VTH_I_UP_CNTRL_VAL 0x614
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#define QSERDES_V8_LALB_VTH_I_DN_CNTRL_VAL 0x618
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#define QSERDES_V8_LALB_NRZ_EYE_HEIGHT_SEL_VAL 0x61c
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#define QSERDES_V8_LALB_IVTH_CAL_VAL_OVRD_MUX 0x620
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#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_OVRD_MUXES 0x624
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#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE0 0x628
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#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE1 0x62c
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#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE2 0x630
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#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE3 0x634
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#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE4 0x638
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#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE0 0x63c
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#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE1 0x640
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#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE2 0x644
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#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE3 0x648
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#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE4 0x64c
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#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE0 0x650
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#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE1 0x654
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#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE2 0x658
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#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE3 0x65c
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#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE4 0x660
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#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE0 0x664
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#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE1 0x668
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#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE2 0x66c
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#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE3 0x670
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#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE4 0x674
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#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE0 0x678
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#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE1 0x67c
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#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE2 0x680
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#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE3 0x684
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#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE4 0x688
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#define QSERDES_V8_LALB_DEBUG_BUS_SEL 0x68c
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#define QSERDES_V8_LALB_BIST_STATUS 0x690
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#define QSERDES_V8_LALB_BIST_ERROR_COUNT1 0x694
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#define QSERDES_V8_LALB_BIST_ERROR_COUNT2 0x698
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#define QSERDES_V8_LALB_AC_JTAG_OUTP 0x69c
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#define QSERDES_V8_LALB_AC_JTAG_OUTN 0x6a0
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#define QSERDES_V8_LALB_DATA_SLICER_DEBUG_STATUS 0x6a4
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#define QSERDES_V8_LALB_DATA_SLICER_TIMER1_STATUS 0x6a8
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#define QSERDES_V8_LALB_DATA_SLICER_TIMER2_STATUS 0x6ac
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#define QSERDES_V8_LALB_TX0_RESTRIM_CODE_STATUS 0x6b0
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#define QSERDES_V8_LALB_TX0_RESTRIM_ICAL_CODE_STATUS 0x6b4
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#define QSERDES_V8_LALB_TX0_RESTRIM_CAL_STATUS 0x6b8
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#define QSERDES_V8_LALB_TX1_RESTRIM_CODE_STATUS 0x6bc
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#define QSERDES_V8_LALB_TX1_RESTRIM_ICAL_CODE_STATUS 0x6c0
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#define QSERDES_V8_LALB_TX1_RESTRIM_CAL_STATUS 0x6c4
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#define QSERDES_V8_LALB_CMUX_DCC_CAL_FSM_STATUS 0x6c8
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#define QSERDES_V8_LALB_CMUX_DCC_READCODE_STATUS 0x6cc
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#define QSERDES_V8_LALB_TX_DCC_CAL_ANA_STATUS 0x6d0
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#define QSERDES_V8_LALB_TX0_CTUNE_DCC_FSM_DEBUG_STATUS 0x6d4
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#define QSERDES_V8_LALB_TX0_COARSE_DCC_READCODE_STATUS 0x6d8
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#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_FSM_DEBUG_STATUS 0x6dc
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#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_FSM_DEBUG_STATUS 0x6e0
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#define QSERDES_V8_LALB_TX0_FINE_DCC_READCODE_STATUS 0x6e4
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#define QSERDES_V8_LALB_TX1_CTUNE_DCC_FSM_DEBUG_STATUS 0x6e8
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#define QSERDES_V8_LALB_TX1_COARSE_DCC_READCODE_STATUS 0x6ec
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#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_FSM_DEBUG_STATUS 0x6f0
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#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_FSM_DEBUG_STATUS 0x6f4
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#define QSERDES_V8_LALB_TX1_FINE_DCC_READCODE_STATUS 0x6f8
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#define QSERDES_V8_LALB_CDR_VCO_CAL_STATUS 0x6fc
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#define QSERDES_V8_LALB_CDR_VCTRL_STATUS 0x700
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#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_STATUS 0x704
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#define QSERDES_V8_LALB_KVCO_CAL_DEBUG1_STATUS 0x708
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#define QSERDES_V8_LALB_KVCO_CAL_DEBUG2_STATUS 0x70c
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#define QSERDES_V8_LALB_KP_CAL_DEBUG1_STATUS 0x710
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#define QSERDES_V8_LALB_KP_CAL_DEBUG2_STATUS 0x714
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#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG1_STATUS 0x718
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#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG2_STATUS 0x71c
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#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG3_STATUS 0x720
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#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG4_STATUS 0x724
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#define QSERDES_V8_LALB_IVCM_CAL_STATUS 0x728
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#define QSERDES_V8_LALB_IVCM_CAL_DEBUG_STATUS 0x72c
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#define QSERDES_V8_LALB_IDAC_STATUS_I0 0x730
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#define QSERDES_V8_LALB_IDAC_STATUS_I0BAR 0x734
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#define QSERDES_V8_LALB_IDAC_STATUS_I1 0x738
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#define QSERDES_V8_LALB_IDAC_STATUS_I1BAR 0x73c
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#define QSERDES_V8_LALB_IDAC_STATUS_Q 0x740
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#define QSERDES_V8_LALB_IDAC_STATUS_QBAR 0x744
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#define QSERDES_V8_LALB_IDAC_STATUS_A 0x748
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#define QSERDES_V8_LALB_IDAC_STATUS_ABAR 0x74c
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#define QSERDES_V8_LALB_IDAC_STATUS_SM_ON 0x750
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#define QSERDES_V8_LALB_IDAC_STATUS_SIGNERROR 0x754
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#define QSERDES_V8_LALB_RX_SIGDET_STATUS 0x758
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#define QSERDES_V8_LALB_SIGDET_CAL_CODE_STATUS 0x75c
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#define QSERDES_V8_LALB_SIGDET_CAL_FSM_DEBUG_STATUS 0x760
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#define QSERDES_V8_LALB_CDR_FREQ_LOCK_CNT_STATUS 0x764
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#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_STATUS 0x768
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#define QSERDES_V8_LALB_CDR_LOCK_DEBUG_STATUS 0x76c
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#define QSERDES_V8_LALB_IDATA_HIGH_STATUS1 0x770
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#define QSERDES_V8_LALB_IDATA_HIGH_STATUS2 0x774
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#define QSERDES_V8_LALB_IDATA_HIGH_STATUS3 0x778
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#define QSERDES_V8_LALB_IDATA_HIGH_STATUS4 0x77c
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#define QSERDES_V8_LALB_IDATA_LOW_STATUS1 0x780
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#define QSERDES_V8_LALB_IDATA_LOW_STATUS2 0x784
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#define QSERDES_V8_LALB_IDATA_LOW_STATUS3 0x788
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#define QSERDES_V8_LALB_IDATA_LOW_STATUS4 0x78c
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#define QSERDES_V8_LALB_QDATA_STATUS1 0x790
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#define QSERDES_V8_LALB_QDATA_STATUS2 0x794
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#define QSERDES_V8_LALB_QDATA_STATUS3 0x798
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#define QSERDES_V8_LALB_QDATA_STATUS4 0x79c
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#define QSERDES_V8_LALB_IA_ERROR_COUNTER_LOW 0x7a0
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#define QSERDES_V8_LALB_IA_ERROR_COUNTER_HIGH 0x7a4
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#define QSERDES_V8_LALB_EOM_ERR_CNT_LSB_STATUS 0x7a8
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#define QSERDES_V8_LALB_EOM_ERR_CNT_MSB_STATUS 0x7ac
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#define QSERDES_V8_LALB_EOM_OP_STATUS 0x7b0
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#define QSERDES_V8_LALB_AUX_MIXER_INDEX_STATUS 0x7b4
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#define QSERDES_V8_LALB_AUX_OFFSET_STATUS 0x7b8
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#define QSERDES_V8_LALB_AUXDATA_TB_STATUS 0x7bc
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#define QSERDES_V8_LALB_AUX_MIXER_CTRL_0_STATUS 0x7c0
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#define QSERDES_V8_LALB_AUX_MIXER_CTRL_90_STATUS 0x7c4
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#define QSERDES_V8_LALB_AUX_MIXER_CTRL_180_STATUS 0x7c8
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#define QSERDES_V8_LALB_IQ_MIXER_INDEX_STATUS 0x7cc
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#define QSERDES_V8_LALB_IQTUNE_FLTR_INDEX_STATUS 0x7d0
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#define QSERDES_V8_LALB_IQ_MIXER_CTRL_0_STATUS 0x7d4
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#define QSERDES_V8_LALB_IQ_MIXER_CTRL_90_STATUS 0x7d8
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#define QSERDES_V8_LALB_IQ_MIXER_CTRL_180_STATUS 0x7dc
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#define QSERDES_V8_LALB_READ_EQCODE 0x7e0
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#define QSERDES_V8_LALB_READ_OFFSETCODE 0x7e4
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#define QSERDES_V8_LALB_VGA_READ_CODE 0x7e8
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#define QSERDES_V8_LALB_VTHRESH_READ_CODE 0x7ec
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#define QSERDES_V8_LALB_DFE_TAP1_READ_CODE 0x7f0
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#define QSERDES_V8_LALB_DFE_TAP2_READ_CODE 0x7f4
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#define QSERDES_V8_LALB_DFE_TAP3_READ_CODE 0x7f8
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#define QSERDES_V8_LALB_DFE_TAP4_READ_CODE 0x7fc
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#define QSERDES_V8_LALB_DFE_TAP5_READ_CODE 0x800
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#define QSERDES_V8_LALB_DFE_TAP6_READ_CODE 0x804
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#define QSERDES_V8_LALB_DFE_TAP7_READ_CODE 0x808
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#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_BIN_CODE 0x80c
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#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CLK0_CODE 0x810
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#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CLK90_CODE 0x814
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#define QSERDES_V8_LALB_BLW_READ_CODE 0x818
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#define QSERDES_V8_LALB_IA_OFFSET_CAL_DEBUG_STATUS 0x81c
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#define QSERDES_V8_LALB_IA_OFFSET_CAL_STATUS 0x820
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#define QSERDES_V8_LALB_IVTH_CAL_STATUS 0x824
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#define QSERDES_V8_LALB_IVTH_NRZ_EYE_HEIGHT_STATUS 0x828
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#define QSERDES_V8_LALB_IVTH_UPPER_EYE_MAX_STATUS 0x82c
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#define QSERDES_V8_LALB_IVTH_UPPER_EYE_MIN_STATUS 0x830
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#define QSERDES_V8_LALB_IVTH_LOWER_EYE_MAX_STATUS 0x834
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#define QSERDES_V8_LALB_IVTH_LOWER_EYE_MIN_STATUS 0x838
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#define QSERDES_V8_LALB_IVTH_UP_INIT_CTR_STATUS 0x83c
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#define QSERDES_V8_LALB_VTH_I_UP_CNTRL_STATUS 0x840
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#define QSERDES_V8_LALB_VTH_I_DN_CNTRL_STATUS 0x844
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#define QSERDES_V8_LALB_NRZ_EYE_HEIGHT_SEL_STATUS 0x848
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#define QSERDES_V8_LALB_DEBUG_BUS0 0x84c
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#define QSERDES_V8_LALB_DEBUG_BUS1 0x850
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#define QSERDES_V8_LALB_DEBUG_BUS2 0x854
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#define QSERDES_V8_LALB_DEBUG_BUS3 0x858
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL1 0x85c
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL2 0x860
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL3 0x864
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL4 0x868
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL5 0x86c
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL6 0x870
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL7 0x874
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL8 0x878
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL9 0x87c
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL10 0x880
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL11 0x884
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL12 0x888
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL13 0x88c
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL14 0x890
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL15 0x894
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL16 0x898
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL17 0x89c
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL18 0x8a0
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL19 0x8a4
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL20 0x8a8
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL21 0x8ac
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL22 0x8b0
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL23 0x8b4
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL24 0x8b8
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL25 0x8bc
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL26 0x8c0
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL27 0x8c4
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL28 0x8c8
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL29 0x8cc
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL30 0x8d0
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL31 0x8d4
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL32 0x8d8
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_1 0x8dc
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_2 0x8e0
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_3 0x8e4
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_4 0x8e8
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#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_5 0x8ec
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS1 0x8f0
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS2 0x8f4
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS3 0x8f8
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS4 0x8fc
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS5 0x900
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS6 0x904
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS7 0x908
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS8 0x90c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS9 0x910
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS10 0x914
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS11 0x918
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS12 0x91c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS13 0x920
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS14 0x924
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS15 0x928
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS16 0x92c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS17 0x930
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS18 0x934
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS19 0x938
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS20 0x93c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS21 0x940
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS22 0x944
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS23 0x948
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS24 0x94c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS25 0x950
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS26 0x954
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS27 0x958
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS28 0x95c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS29 0x960
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS30 0x964
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS31 0x968
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#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS32 0x96c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS1 0x970
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS2 0x974
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS3 0x978
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS4 0x97c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS5 0x980
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS6 0x984
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS7 0x988
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS8 0x98c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS9 0x990
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS10 0x994
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS11 0x998
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS12 0x99c
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS13 0x9a0
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS14 0x9a4
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS15 0x9a8
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS16 0x9ac
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS17 0x9b0
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS18 0x9b4
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS19 0x9b8
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS20 0x9bc
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS21 0x9c0
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS22 0x9c4
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS23 0x9c8
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS24 0x9cc
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS25 0x9d0
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#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS26 0x9d4
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#endif /* QCOM_PHY_QMP_QSERDES_V8_LALBH_ */
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