20 lines
561 B
C
20 lines
561 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_IPQ5332_CMN_PLL_H
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#define _DT_BINDINGS_CLK_QCOM_IPQ5332_CMN_PLL_H
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/* CMN PLL core clock. */
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#define IPQ5332_CMN_PLL_CLK 0
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/* The output clocks from CMN PLL of IPQ5332. */
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#define IPQ5332_XO_24MHZ_CLK 1
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#define IPQ5332_SLEEP_32KHZ_CLK 2
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#define IPQ5332_PCS_31P25MHZ_CLK 3
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#define IPQ5332_NSS_300MHZ_CLK 4
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#define IPQ5332_PPE_200MHZ_CLK 5
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#define IPQ5332_ETH_50MHZ_CLK 6
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#endif
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