104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Tenstorrent Atlantis PRCM Clock and Reset Indices
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*
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* Copyright (c) 2026 Tenstorrent
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*/
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#ifndef _DT_BINDINGS_ATLANTIS_PRCM_RCPU_H
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#define _DT_BINDINGS_ATLANTIS_PRCM_RCPU_H
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/*
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* RCPU Domain Clock IDs
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*/
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#define CLK_RCPU_PLL 0
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#define CLK_RCPU_ROOT 1
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#define CLK_RCPU_DIV2 2
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#define CLK_RCPU_DIV4 3
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#define CLK_RCPU_RTC 4
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#define CLK_SMNDMA0_ACLK 5
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#define CLK_SMNDMA1_ACLK 6
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#define CLK_WDT0_PCLK 7
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#define CLK_WDT1_PCLK 8
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#define CLK_TIMER_PCLK 9
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#define CLK_PVTC_PCLK 10
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#define CLK_PMU_PCLK 11
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#define CLK_MAILBOX_HCLK 12
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#define CLK_SEC_SPACC_HCLK 13
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#define CLK_SEC_OTP_HCLK 14
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#define CLK_TRNG_PCLK 15
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#define CLK_SEC_CRC_HCLK 16
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#define CLK_SMN_HCLK 17
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#define CLK_AHB0_HCLK 18
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#define CLK_SMN_PCLK 19
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#define CLK_SMN_CLK 20
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#define CLK_SCRATCHPAD_CLK 21
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#define CLK_RCPU_CORE_CLK 22
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#define CLK_RCPU_ROM_CLK 23
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#define CLK_OTP_LOAD_CLK 24
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#define CLK_NOC_PLL 25
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#define CLK_NOCC_CLK 26
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#define CLK_NOCC_DIV2 27
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#define CLK_NOCC_DIV4 28
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#define CLK_NOCC_RTC 29
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#define CLK_NOCC_CAN 30
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#define CLK_QSPI_SCLK 31
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#define CLK_QSPI_HCLK 32
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#define CLK_I2C0_PCLK 33
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#define CLK_I2C1_PCLK 34
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#define CLK_I2C2_PCLK 35
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#define CLK_I2C3_PCLK 36
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#define CLK_I2C4_PCLK 37
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#define CLK_UART0_PCLK 38
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#define CLK_UART1_PCLK 39
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#define CLK_UART2_PCLK 40
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#define CLK_UART3_PCLK 41
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#define CLK_UART4_PCLK 42
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#define CLK_SPI0_PCLK 43
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#define CLK_SPI1_PCLK 44
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#define CLK_SPI2_PCLK 45
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#define CLK_SPI3_PCLK 46
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#define CLK_GPIO_PCLK 47
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#define CLK_CAN0_HCLK 48
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#define CLK_CAN0_CLK 49
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#define CLK_CAN1_HCLK 50
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#define CLK_CAN1_CLK 51
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#define CLK_CAN0_TIMER_CLK 52
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#define CLK_CAN1_TIMER_CLK 53
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/* RCPU domain reset */
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#define RST_SMNDMA0 0
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#define RST_SMNDMA1 1
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#define RST_WDT0 2
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#define RST_WDT1 3
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#define RST_TMR 4
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#define RST_PVTC 5
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#define RST_PMU 6
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#define RST_MAILBOX 7
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#define RST_SPACC 8
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#define RST_OTP 9
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#define RST_TRNG 10
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#define RST_CRC 11
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#define RST_QSPI 12
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#define RST_I2C0 13
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#define RST_I2C1 14
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#define RST_I2C2 15
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#define RST_I2C3 16
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#define RST_I2C4 17
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#define RST_UART0 18
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#define RST_UART1 19
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#define RST_UART2 20
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#define RST_UART3 21
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#define RST_UART4 22
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#define RST_SPI0 23
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#define RST_SPI1 24
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#define RST_SPI2 25
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#define RST_SPI3 26
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#define RST_GPIO 27
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#define RST_CAN0 28
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#define RST_CAN1 29
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#define RST_I2S0 30
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#define RST_I2S1 31
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#endif /* _DT_BINDINGS_ATLANTIS_PRCM_RCPU_H */
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