42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/* Author: Jerry Zhu <jerry.zhu@cixtech.com> */
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#ifndef DT_BINDING_RESET_CIX_SKY1_SYSTEM_CONTROL_H
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#define DT_BINDING_RESET_CIX_SKY1_SYSTEM_CONTROL_H
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/* func reset for sky1 fch */
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#define SW_I3C0_RST_FUNC_G_N 0
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#define SW_I3C0_RST_FUNC_I_N 1
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#define SW_I3C1_RST_FUNC_G_N 2
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#define SW_I3C1_RST_FUNC_I_N 3
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#define SW_UART0_RST_FUNC_N 4
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#define SW_UART1_RST_FUNC_N 5
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#define SW_UART2_RST_FUNC_N 6
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#define SW_UART3_RST_FUNC_N 7
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#define SW_TIMER_RST_FUNC_N 8
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/* apb reset for sky1 fch */
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#define SW_I3C0_RST_APB_N 9
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#define SW_I3C1_RST_APB_N 10
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#define SW_DMA_RST_AXI_N 11
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#define SW_UART0_RST_APB_N 12
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#define SW_UART1_RST_APB_N 13
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#define SW_UART2_RST_APB_N 14
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#define SW_UART3_RST_APB_N 15
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#define SW_SPI0_RST_APB_N 16
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#define SW_SPI1_RST_APB_N 17
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#define SW_I2C0_RST_APB_N 18
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#define SW_I2C1_RST_APB_N 19
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#define SW_I2C2_RST_APB_N 20
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#define SW_I2C3_RST_APB_N 21
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#define SW_I2C4_RST_APB_N 22
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#define SW_I2C5_RST_APB_N 23
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#define SW_I2C6_RST_APB_N 24
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#define SW_I2C7_RST_APB_N 25
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#define SW_GPIO_RST_APB_N 26
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/* fch rst for xspi */
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#define SW_XSPI_REG_RST_N 27
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#define SW_XSPI_SYS_RST_N 28
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#endif
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