216 lines
3.9 KiB
Devicetree
216 lines
3.9 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Support for Variscite Concerto Carrier board with the VAR-SOM-6UL
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* Variscite SoM mounted on it (all CPU variants)
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*
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* Copyright 2019 Variscite Ltd.
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* Copyright 2025 Bootlin
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*/
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#include <dt-bindings/leds/common.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_key_back>, <&pinctrl_gpio_key_wakeup>;
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key-back {
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gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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key-wakeup {
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gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WAKEUP>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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label = "gpled2";
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gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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lvds_panel: lvds-panel {
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compatible = "sgd,gktw70sdae4se", "panel-lvds";
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data-mapping = "jeida-18";
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width-mm = <153>;
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height-mm = <86>;
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panel-timing {
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clock-frequency = <35000000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <40>;
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hfront-porch = <40>;
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vback-porch = <29>;
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vfront-porch = <13>;
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hsync-len = <48>;
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vsync-len = <3>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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rtc@68 {
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/*
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* To actually use this interrupt
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* connect pins J14.8 & J14.10 on the Concerto-Board.
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*/
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compatible = "dallas,ds1337";
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reg = <0x68>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupt-parent = <&gpio1>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&iomuxc {
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
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MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
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>;
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};
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pinctrl_gpio_key_back: gpio-key-backgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059
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>;
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};
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pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059
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>;
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};
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pinctrl_gpio_leds: gpio-ledsgrp {
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fsl,pins = <
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MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */
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>;
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};
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pinctrl_rtc: rtcgrp {
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fsl,pins = <
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MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 /* RTC alarm IRQ */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX6UL_PAD_CSI_DATA00__UART5_DCE_TX 0x1b0b1
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MX6UL_PAD_CSI_DATA01__UART5_DCE_RX 0x1b0b1
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MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1
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MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1
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>;
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};
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pinctrl_usb_otg1_id: usbotg1idgrp {
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fsl,pins = <
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MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID 0x17059
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x78b0
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>;
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};
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};
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&snvs_pwrkey {
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status = "disabled";
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};
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&snvs_rtc {
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status = "disabled";
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};
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&tsc {
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/*
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* Conflics with wdog1 ext-reset-output & SD CD pins,
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* so we keep it disabled by default.
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*/
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status = "disabled";
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};
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/* Console UART */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* ttymxc4 UART */
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg1_id>;
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dr_mode = "otg";
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disable-over-current;
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srp-disable;
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hnp-disable;
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adp-disable;
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status = "okay";
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};
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&usbotg2 {
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dr_mode = "host";
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disable-over-current;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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/*
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* To actually use ext-reset-output
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* connect pins J17.3 & J17.8 on the Concerto-Board
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*/
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fsl,ext-reset-output;
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};
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