197 lines
4.5 KiB
Devicetree
197 lines
4.5 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright (C) 2025 PHYTEC Messtechnik GmbH
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include "imx8mp-pinfunc.h"
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&{/} {
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backlight_lvds1: backlight-lvds1 {
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compatible = "pwm-backlight";
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pinctrl-0 = <&pinctrl_lvds1>;
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pinctrl-names = "default";
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power-supply = <®_vcc_12v>;
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status = "disabled";
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};
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panel_lvds1: panel-lvds1 {
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backlight = <&backlight_lvds1>;
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power-supply = <®_vdd_3v3>;
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status = "disabled";
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port {
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panel1_in: endpoint {
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remote-endpoint = <&ldb_lvds_ch1>;
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};
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};
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};
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reg_vcc_12v: regulator-12v {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <12000000>;
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regulator-min-microvolt = <12000000>;
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regulator-name = "VCC_12V";
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};
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reg_vcc_1v8_audio: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "VCC_1V8_Audio";
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};
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reg_vcc_3v3_analog: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "VCC_3V3_Analog";
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "snd-peb-av-10";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&dailink_master>;
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simple-audio-card,frame-master = <&dailink_master>;
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simple-audio-card,mclk-fs = <32>;
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simple-audio-card,widgets =
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"Line", "Line In",
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"Speaker", "Speaker",
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Speaker", "SPOP",
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"Speaker", "SPOM",
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"LINE1L", "Line In",
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"LINE1R", "Line In",
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"MIC3R", "Microphone Jack",
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"Microphone Jack", "Mic Bias";
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simple-audio-card,codec {
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sound-dai = <&codec>;
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};
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dailink_master: simple-audio-card,cpu {
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sound-dai = <&sai5>;
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};
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};
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};
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&i2c5 {
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clock-frequency = <400000>;
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pinctrl-0 = <&pinctrl_i2c5>;
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pinctrl-1 = <&pinctrl_i2c5_gpio>;
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pinctrl-names = "default", "gpio";
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scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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codec: audio-codec@18 {
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compatible = "ti,tlv320aic3007";
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reg = <0x18>;
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pinctrl-0 = <&pinctrl_tlv320>;
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pinctrl-names = "default";
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#sound-dai-cells = <0>;
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ai3x-gpio-func = <0xd 0x0>;
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ai3x-micbias-vg = <2>;
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AVDD-supply = <®_vcc_3v3_analog>;
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DRVDD-supply = <®_vcc_3v3_analog>;
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DVDD-supply = <®_vcc_1v8_audio>;
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IOVDD-supply = <®_vdd_3v3>;
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};
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eeprom@57 {
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compatible = "atmel,24c32";
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reg = <0x57>;
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pagesize = <32>;
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vcc-supply = <®_vdd_3v3>;
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};
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};
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&ldb_lvds_ch1 {
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remote-endpoint = <&panel1_in>;
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};
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&pwm2 {
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pinctrl-0 = <&pinctrl_pwm2>;
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pinctrl-names = "default";
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};
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&sai5 {
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pinctrl-0 = <&pinctrl_sai5>;
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pinctrl-names = "default";
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assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <12288000>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_IPG>,
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<&clk IMX8MP_CLK_DUMMY>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>,
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<&clk IMX8MP_CLK_DUMMY>,
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<&clk IMX8MP_CLK_DUMMY>,
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<&clk IMX8MP_AUDIO_PLL1_OUT>,
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<&clk IMX8MP_AUDIO_PLL2_OUT>;
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clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k",
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"pll11k";
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#sound-dai-cells = <0>;
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fsl,sai-mclk-direction-output;
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fsl,sai-synchronous-rx;
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status = "okay";
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};
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&iomuxc {
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pinctrl_i2c5: i2c5grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL 0x400001c2
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MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c2
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>;
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};
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pinctrl_i2c5_gpio: i2c5gpiogrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x1e2
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MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1e2
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>;
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};
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pinctrl_lvds1: lvds1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x12
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT 0x12
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>;
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};
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pinctrl_sai5: sai5grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI5_TX_DATA00 0xd6
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MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI5_RX_DATA00 0xd6
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MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI5_MCLK 0xd6
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MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
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MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
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>;
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};
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pinctrl_tlv320: tlv320grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x16
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>;
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};
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};
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