67 lines
1.3 KiB
Plaintext
67 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
|
|
/*
|
|
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/plugin/;
|
|
|
|
#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
&pm8008 {
|
|
status = "okay";
|
|
};
|
|
|
|
&camss {
|
|
status = "okay";
|
|
|
|
vdd-csiphy-1p2-supply = <&pm4125_l5>;
|
|
vdd-csiphy-1p8-supply = <&pm4125_l13>;
|
|
|
|
ports {
|
|
port@0 {
|
|
csiphy0_ep: endpoint {
|
|
data-lanes = <0 1>;
|
|
remote-endpoint = <&ov9282_ep>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&cci {
|
|
status = "okay";
|
|
};
|
|
|
|
&cci_i2c1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
/* Vision Mezzanine DIP3-1 must be ON (Selects camera CAM0A&B) */
|
|
camera@60 {
|
|
compatible = "ovti,ov9282";
|
|
reg = <0x60>;
|
|
|
|
/* Reset is active-low, but driver applies inverted reset logic */
|
|
reset-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-0 = <&mclk3_default>;
|
|
pinctrl-names = "default";
|
|
|
|
clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
|
|
assigned-clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
|
|
assigned-clock-rates = <24000000>;
|
|
|
|
avdd-supply = <&vreg_l3p>;
|
|
dvdd-supply = <&vreg_l1p>;
|
|
dovdd-supply = <&vreg_l7p>;
|
|
|
|
port {
|
|
ov9282_ep: endpoint {
|
|
link-frequencies = /bits/ 64 <400000000>;
|
|
data-lanes = <1 2>;
|
|
remote-endpoint = <&csiphy0_ep>;
|
|
};
|
|
};
|
|
};
|
|
};
|