192 lines
3.5 KiB
Plaintext
192 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
|
/*
|
|
* Copyright (C) 2026 PHYTEC Messtechnik GmbH
|
|
* Author: Dominik Haller <d.haller@phytec.de>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/plugin/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "k3-pinctrl.h"
|
|
|
|
&{/} {
|
|
audio_refclk1: audio-clock {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <19200000>;
|
|
};
|
|
|
|
hdmi: hdmi-connector {
|
|
compatible = "hdmi-connector";
|
|
label = "hdmi";
|
|
type = "a";
|
|
ddc-i2c-bus = <&main_i2c2>;
|
|
|
|
port {
|
|
hdmi_connector_in: endpoint {
|
|
remote-endpoint = <<8912b_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
reg_audio_3v3: regulator-audio-3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "VCC3V3_AUDIO";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_audio_1v8: regulator-audio-1v8 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "VCC1V8_AUDIO";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sound {
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,name = "PEB-AV-15";
|
|
simple-audio-card,widgets =
|
|
"Headphone", "Headphone Jack",
|
|
"Microphone", "Mic Jack";
|
|
simple-audio-card,routing =
|
|
"Headphone Jack", "HPLOUT",
|
|
"Headphone Jack", "HPROUT",
|
|
"MIC3R", "Mic Jack",
|
|
"Mic Jack", "Mic Bias";
|
|
simple-audio-card,format = "dsp_b";
|
|
simple-audio-card,bitclock-inversion;
|
|
simple-audio-card,bitclock-master = <&link0_codec>;
|
|
simple-audio-card,frame-master = <&link0_codec>;
|
|
|
|
link0_cpu: simple-audio-card,cpu {
|
|
sound-dai = <&mcasp0>;
|
|
};
|
|
|
|
link0_codec: simple-audio-card,codec {
|
|
sound-dai = <&audio_codec>;
|
|
clocks = <&audio_refclk1>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
&dphy_tx1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi1_ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
reg = <0>;
|
|
dsi1_out: endpoint {
|
|
remote-endpoint = <<8912b_in>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi1_in: endpoint {
|
|
remote-endpoint = <&dpi3_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&dss {
|
|
status = "okay";
|
|
};
|
|
|
|
&dss_ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
dpi3_out: endpoint {
|
|
remote-endpoint = <&dsi1_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mcasp0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcasp0_pins>;
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
op-mode = <0>; /* MCASP_IIS_MODE */
|
|
tdm-slots = <2>;
|
|
|
|
/* 4 serializers */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
2 0 0 1
|
|
0 0 0 0
|
|
0 0 0 0
|
|
0 0 0 0
|
|
>;
|
|
|
|
tx-num-evt = <32>;
|
|
rx-num-evt = <32>;
|
|
status = "okay";
|
|
};
|
|
|
|
&main_i2c2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
audio_codec: audio-codec@18 {
|
|
compatible = "ti,tlv320aic3007";
|
|
reg = <0x18>;
|
|
#sound-dai-cells = <0>;
|
|
ai3x-micbias-vg = <2>;
|
|
AVDD-supply = <®_audio_3v3>;
|
|
IOVDD-supply = <®_audio_3v3>;
|
|
DRVDD-supply = <®_audio_3v3>;
|
|
DVDD-supply = <®_audio_1v8>;
|
|
};
|
|
|
|
bridge@48 {
|
|
compatible = "lontium,lt8912b";
|
|
reg = <0x48>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
lt8912b_in: endpoint {
|
|
data-lanes = <0 1 2 3>;
|
|
remote-endpoint = <&dsi1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
lt8912b_out: endpoint {
|
|
remote-endpoint = <&hdmi_connector_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&main_pmx0 {
|
|
mcasp0_pins: mcasp0-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_IOPAD(0x03c, PIN_INPUT, 1) /* (U27) WCLK, MCASP0_AFSX.MCASP0_AFSX */
|
|
J721S2_IOPAD(0x038, PIN_INPUT, 1) /* (AB28) BCLK, MCASP0_ACLKX.MCASP0_ACLKX */
|
|
J721S2_IOPAD(0x040, PIN_OUTPUT, 1) /* (AC28) DOUT, MCASP0_AXR0.MCASP0_AXR0 */
|
|
J721S2_IOPAD(0x07c, PIN_INPUT, 1) /* (T27) DIN, MCASP0_AXR3.MCASP0_AXR3 */
|
|
>;
|
|
};
|
|
};
|