202 lines
3.5 KiB
Devicetree
202 lines
3.5 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2020-2025 Microchip Technology Inc */
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/dts-v1/;
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#include "mpfs.dtsi"
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#include "mpfs-disco-kit-fabric.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Microchip PolarFire-SoC Discovery Kit";
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compatible = "microchip,mpfs-disco-kit-reference-rtl-v2507",
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"microchip,mpfs-disco-kit",
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"microchip,mpfs";
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aliases {
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ethernet0 = &mac0;
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serial4 = &mmuart4;
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};
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chosen {
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stdout-path = "serial4:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-1 {
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gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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label = "led1";
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};
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led-2 {
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gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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label = "led2";
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};
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led-3 {
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gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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label = "led3";
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};
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led-4 {
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gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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label = "led4";
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};
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led-5 {
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gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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label = "led5";
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};
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led-6 {
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gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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label = "led6";
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};
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led-7 {
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gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_AMBER>;
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label = "led7";
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};
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led-8 {
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gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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label = "led8";
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};
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};
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ddrc_cache_lo: memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x40000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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hss_payload: region@bfc00000 {
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reg = <0x0 0xbfc00000 0x0 0x400000>;
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no-map;
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};
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};
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};
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&core_pwm0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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};
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&ihc {
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status = "okay";
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};
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&irqmux {
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interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
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<3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
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<6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
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<9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
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<12 &plic 25>, <13 &plic 26>,
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<32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
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<35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
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<38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
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<41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
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<44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
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<47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
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<50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
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<53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
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<64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
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<67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
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<70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
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<73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
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<76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
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<79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
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<82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
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<85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
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<88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
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<91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
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<94 &plic 53>, <95 &plic 53>;
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};
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&mac0 {
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phy-mode = "sgmii";
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phy-handle = <&phy0>;
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status = "okay";
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phy0: ethernet-phy@b {
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reg = <0xb>;
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};
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};
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&mbox {
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status = "okay";
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};
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&mmc {
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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no-1-8-v;
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status = "okay";
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};
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&mmuart1 {
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status = "okay";
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};
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&mmuart4 {
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status = "okay";
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};
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&refclk {
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clock-frequency = <125000000>;
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};
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&refclk_ccc {
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clock-frequency = <50000000>;
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};
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&rtc {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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};
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