86 lines
3.4 KiB
C
86 lines
3.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#ifndef __INTEL_DISPLAY_IRQ_H__
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#define __INTEL_DISPLAY_IRQ_H__
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#include <linux/types.h>
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#include "intel_display_limits.h"
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enum pipe;
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struct drm_crtc;
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struct drm_printer;
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struct intel_display;
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struct intel_display_irq_snapshot;
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u32 xelpdp_pica_aux_mask(struct intel_display *display);
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void valleyview_enable_display_irqs(struct intel_display *display);
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void valleyview_disable_display_irqs(struct intel_display *display);
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void ilk_update_display_irq(struct intel_display *display,
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u32 interrupt_mask, u32 enabled_irq_mask);
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void ilk_enable_display_irq(struct intel_display *display, u32 bits);
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void ilk_disable_display_irq(struct intel_display *display, u32 bits);
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void bdw_update_port_irq(struct intel_display *display, u32 interrupt_mask, u32 enabled_irq_mask);
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void bdw_enable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
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void bdw_disable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
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void ibx_display_interrupt_update(struct intel_display *display,
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u32 interrupt_mask, u32 enabled_irq_mask);
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void ibx_enable_display_interrupt(struct intel_display *display, u32 bits);
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void ibx_disable_display_interrupt(struct intel_display *display, u32 bits);
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void gen8_irq_power_well_post_enable(struct intel_display *display, u8 pipe_mask);
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void gen8_irq_power_well_pre_disable(struct intel_display *display, u8 pipe_mask);
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int i8xx_enable_vblank(struct drm_crtc *crtc);
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int i915gm_enable_vblank(struct drm_crtc *crtc);
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int i965_enable_vblank(struct drm_crtc *crtc);
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int ilk_enable_vblank(struct drm_crtc *crtc);
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int bdw_enable_vblank(struct drm_crtc *crtc);
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void i8xx_disable_vblank(struct drm_crtc *crtc);
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void i915gm_disable_vblank(struct drm_crtc *crtc);
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void i965_disable_vblank(struct drm_crtc *crtc);
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void ilk_disable_vblank(struct drm_crtc *crtc);
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void bdw_disable_vblank(struct drm_crtc *crtc);
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void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
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void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
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u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
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void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
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struct intel_display_irq_state {
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u32 master_ctl;
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u32 iir;
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u32 eir;
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u32 hotplug_status;
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u32 dpinvgtt;
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u32 pipe_stats[I915_MAX_PIPES];
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};
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void intel_display_irq_reset(struct intel_display *display);
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void intel_display_irq_postinstall(struct intel_display *display);
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void intel_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);
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bool intel_display_irq_handler(struct intel_display *display, const struct intel_display_irq_state *state);
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u32 i9xx_display_irq_enable_mask(struct intel_display *display);
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u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
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void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
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void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
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void intel_display_irq_init(struct intel_display *display);
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void i915gm_irq_cstate_wa(struct intel_display *display, bool enable);
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struct intel_display_irq_snapshot *intel_display_irq_snapshot_capture(struct intel_display *display);
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void intel_display_irq_snapshot_print(const struct intel_display_irq_snapshot *snapshot, struct drm_printer *p);
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#endif /* __INTEL_DISPLAY_IRQ_H__ */
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