671 lines
18 KiB
C
671 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#include "drm/drm_file.h"
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#include "drm/msm_drm.h"
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#include "linux/anon_inodes.h"
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#include "linux/gfp_types.h"
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#include "linux/poll.h"
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#include "linux/slab.h"
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#include "msm_drv.h"
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#include "msm_gpu.h"
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#include "msm_perfcntr.h"
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#include "adreno/adreno_gpu.h"
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/* space used: */
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#define fifo_count(stream) \
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(CIRC_CNT((stream)->fifo.head, (stream)->fifo.tail, (stream)->fifo_size))
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#define fifo_count_to_end(stream) \
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(CIRC_CNT_TO_END(smp_load_acquire(&(stream)->fifo.head), (stream)->fifo.tail, (stream)->fifo_size))
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/* space available: */
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#define fifo_space(stream) \
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(CIRC_SPACE((stream)->fifo.head, (stream)->fifo.tail, (stream)->fifo_size))
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static int
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msm_perfcntr_resume_locked(struct msm_perfcntr_stream *stream)
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{
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if (!stream)
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return 0;
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/* Reprogram SEL regs on highest priority rb: */
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struct msm_ringbuffer *ring = stream->gpu->rb[0];
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queue_work(ring->sched.submit_wq, &stream->sel_work);
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hrtimer_start(&stream->sample_timer,
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ns_to_ktime(stream->sample_period_ns),
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HRTIMER_MODE_REL_PINNED);
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return 0;
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}
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int
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msm_perfcntr_resume(struct msm_gpu *gpu)
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{
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if (!gpu->perfcntrs)
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return 0;
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guard(mutex)(&gpu->perfcntr_lock);
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return msm_perfcntr_resume_locked(gpu->perfcntrs->stream);
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}
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static void
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msm_perfcntr_suspend_locked(struct msm_perfcntr_stream *stream)
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{
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if (!stream)
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return;
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hrtimer_cancel(&stream->sample_timer);
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kthread_cancel_work_sync(&stream->sample_work);
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/*
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* We can't use cancel_work_sync() here, since sel_work acquires
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* gpu->lock which (a) in suspend path can already be held, or
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* (b) in release path would invert the order of gpu->lock and
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* gpu->perfcntr_lock. Either would cause deadlock.
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*/
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cancel_work(&stream->sel_work);
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stream->sel_fence = ++stream->gpu->perfcntrs->sel_seqno;
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stream->seqno = 0;
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}
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void
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msm_perfcntr_suspend(struct msm_gpu *gpu)
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{
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if (!gpu->perfcntrs)
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return;
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guard(mutex)(&gpu->perfcntr_lock);
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msm_perfcntr_suspend_locked(gpu->perfcntrs->stream);
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}
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static int
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msm_perfcntrs_stream_release(struct inode *inode, struct file *file)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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struct msm_gpu *gpu = stream->gpu;
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scoped_guard (mutex, &gpu->perfcntr_lock) {
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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msm_perfcntr_suspend_locked(stream);
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perfcntrs->stream = NULL;
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/* release previously allocated counters: */
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for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++)
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perfcntrs->groups[i]->allocated_counters = 0;
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}
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/*
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* In the suspend path we use async cancel_work(), to avoid blocking
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* on sel_work, which acquires gpu->lock (which could deadlock since
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* other paths acquire gpu->lock before perfcntr_lock) or already
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* hold gpu->lock.
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*
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* But since we are freeing the stream, after dropping perfcntr_lock
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* we need to block until sel_work is done:
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*/
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cancel_work_sync(&stream->sel_work);
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kfree(stream->group_idx);
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kfree(stream->fifo.buf);
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kfree(stream);
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return 0;
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}
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static __poll_t
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msm_perfcntrs_stream_poll(struct file *file, poll_table *wait)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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__poll_t events = 0;
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poll_wait(file, &stream->poll_wq, wait);
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/* Are there samples to read? */
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if (fifo_count(stream) > 0)
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events |= EPOLLIN;
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return events;
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}
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static ssize_t
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msm_perfcntrs_stream_read(struct file *file, char __user *buf,
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size_t count, loff_t *ppos)
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{
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struct msm_perfcntr_stream *stream = file->private_data;
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int ret;
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if (!(file->f_flags & O_NONBLOCK)) {
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ret = wait_event_interruptible(stream->poll_wq,
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fifo_count(stream) > 0);
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if (ret)
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return ret;
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}
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guard(mutex)(&stream->read_lock);
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struct circ_buf *fifo = &stream->fifo;
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const char *fptr = &fifo->buf[fifo->tail];
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count = min_t(size_t, count, fifo_count_to_end(stream));
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if (!count)
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return -EAGAIN;
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if (copy_to_user(buf, fptr, count))
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return -EFAULT;
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smp_store_release(&fifo->tail, (fifo->tail + count) & (stream->fifo_size - 1));
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*ppos += count;
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return count;
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}
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static const struct file_operations stream_fops = {
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.owner = THIS_MODULE,
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.release = msm_perfcntrs_stream_release,
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.poll = msm_perfcntrs_stream_poll,
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.read = msm_perfcntrs_stream_read,
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};
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static void
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sel_worker(struct work_struct *w)
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{
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struct msm_perfcntr_stream *stream =
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container_of(w, typeof(*stream), sel_work);
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struct msm_gpu *gpu = stream->gpu;
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/* Reprogram SEL regs on highest priority rb: */
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struct msm_ringbuffer *ring = stream->gpu->rb[0];
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/*
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* If in the process of resuming, wait for that. Otherwise sel_worker
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* which is enqueued in the resume path can be scheduled before the
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* resume completes.
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*/
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pm_runtime_barrier(&gpu->pdev->dev);
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/*
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* sel_work could end up scheduled before suspend, but running
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* after. See msm_perfcntr_suspend_locked()
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*
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* So if we end up running sel_work after the GPU is already
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* suspended, just bail. It will be scheduled again after
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* the GPU is resumed.
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*/
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if (!pm_runtime_get_if_active(&gpu->pdev->dev))
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return;
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scoped_guard (mutex, &gpu->lock) {
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guard(mutex)(&gpu->perfcntr_lock);
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if (stream == gpu->perfcntrs->stream) {
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msm_gpu_hw_init(gpu);
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gpu->funcs->perfcntr_configure(gpu, ring, stream);
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}
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}
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pm_runtime_put_autosuspend(&gpu->pdev->dev);
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}
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static void
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sample_write(struct msm_perfcntr_stream *stream, int *head, const void *buf, size_t sz)
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{
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/*
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* FIFO size is power-of-two, and guaranteed to have enough space to
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* fit what we are writing. So we should not hit the wrap-around
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* point writing things that are power-of-two sized
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*/
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WARN_ON(CIRC_SPACE_TO_END(*head, stream->fifo.tail, stream->fifo_size) < sz);
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memcpy(&stream->fifo.buf[*head], buf, sz);
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/* Advance head, wrapping around if necessary: */
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*head = (*head + sz) & (stream->fifo_size - 1);
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}
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static void
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sample_write_u32(struct msm_perfcntr_stream *stream, int *head, uint32_t val)
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{
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sample_write(stream, head, &val, sizeof(val));
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}
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static void
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sample_write_u64(struct msm_perfcntr_stream *stream, int *head, uint64_t val)
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{
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sample_write(stream, head, &val, sizeof(val));
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}
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static void
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sample_worker(struct kthread_work *work)
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{
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struct msm_perfcntr_stream *stream =
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container_of(work, typeof(*stream), sample_work);
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struct msm_gpu *gpu = stream->gpu;
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struct msm_rbmemptrs *memptrs = gpu->rb[0]->memptrs;
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if (memptrs->perfcntr_fence != stream->sel_fence)
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return;
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/*
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* Ensure we have enough space to capture a sample period's
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* worth of data:
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*/
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if (stream->period_size > fifo_space(stream)) {
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stream->seqno = 0;
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return;
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}
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/* Inhibit IFPC while accessing registers: */
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if (gpu->funcs->sysprof_setup)
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gpu->funcs->sysprof_setup(gpu, true);
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if (gpu->funcs->perfcntr_flush)
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gpu->funcs->perfcntr_flush(gpu);
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/* Keep local copy of head to avoid updating fifo until the end: */
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int head = stream->fifo.head;
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/*
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* We expect the GPU to be powered at this point, as the timer
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* and kthread work are canceled/flushed in the suspend path:
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*/
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sample_write_u64(stream, &head,
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to_adreno_gpu(gpu)->funcs->get_timestamp(gpu));
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sample_write_u32(stream, &head, stream->seqno++);
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sample_write_u32(stream, &head, 0);
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for (unsigned i = 0; i < stream->nr_groups; i++) {
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unsigned group_idx = msm_perfcntr_group_idx(stream, i);
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unsigned base = msm_perfcntr_counter_base(stream, group_idx);
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const struct msm_perfcntr_group *group =
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&gpu->perfcntr_groups[group_idx];
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struct msm_perfcntr_group_state *group_state =
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gpu->perfcntrs->groups[group_idx];
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unsigned nr = group_state->allocated_counters;
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for (unsigned j = 0; j < nr; j++) {
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const struct msm_perfcntr_counter *counter =
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&group->counters[j + base];
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uint64_t val = gpu_read64(gpu, counter->counter_reg_lo);
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sample_write_u64(stream, &head, val);
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}
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}
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/* Re-enable IFPC: */
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if (gpu->funcs->sysprof_setup)
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gpu->funcs->sysprof_setup(gpu, false);
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smp_store_release(&stream->fifo.head, head);
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wake_up_all(&stream->poll_wq);
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}
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static enum hrtimer_restart
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sample_timer(struct hrtimer *hrtimer)
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{
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struct msm_perfcntr_stream *stream =
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container_of(hrtimer, typeof(*stream), sample_timer);
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kthread_queue_work(stream->gpu->worker, &stream->sample_work);
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hrtimer_forward_now(hrtimer, ns_to_ktime(stream->sample_period_ns));
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return HRTIMER_RESTART;
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}
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static int
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get_group_idx(struct msm_gpu *gpu, const char *name, size_t len)
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{
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for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++) {
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const struct msm_perfcntr_group *group =
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&gpu->perfcntr_groups[i];
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if (!strncmp(group->name, name, len))
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return i;
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}
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return -1;
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}
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static int
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get_available_counters(struct msm_gpu *gpu, int group_idx, uint32_t flags)
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{
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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/*
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* For local counter reservation, anything that is not used by
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* global perfcntr stream is available:
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*/
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if (!(flags & MSM_PERFCNTR_STREAM)) {
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return gpu->perfcntr_groups[group_idx].num_counters -
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perfcntrs->groups[group_idx]->allocated_counters;
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}
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/*
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* For global counter collection, anything that is not reserved by
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* one or more contexts is available:
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*/
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guard(mutex)(&gpu->dev->filelist_mutex);
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unsigned reserved_counters = 0;
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struct drm_file *file;
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list_for_each_entry (file, &gpu->dev->filelist, lhead) {
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struct msm_context *ctx = file->driver_priv;
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if (!ctx || !ctx->perfctx)
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continue;
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unsigned n = ctx->perfctx->reserved_counters[group_idx];
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reserved_counters = max(reserved_counters, n);
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}
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return gpu->perfcntr_groups[group_idx].num_counters - reserved_counters;
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}
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int
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msm_ioctl_perfcntr_config(struct drm_device *dev, void *data, struct drm_file *file)
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{
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struct msm_drm_private *priv = dev->dev_private;
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const struct drm_msm_perfcntr_config *args = data;
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struct msm_context *ctx = file->driver_priv;
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struct msm_gpu *gpu = priv->gpu;
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int stream_fd = 0;
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if (!gpu || !gpu->num_perfcntr_groups)
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return -ENXIO;
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struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
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/*
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* Validate args that don't require locks/power first:
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*/
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if (args->flags & ~MSM_PERFCNTR_FLAGS)
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return UERR(EINVAL, dev, "invalid flags");
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if (args->nr_groups && !args->group_stride)
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return UERR(EINVAL, dev, "invalid group_stride");
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if (args->nr_groups > gpu->num_perfcntr_groups)
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return UERR(EINVAL, dev, "too many groups");
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if (args->nr_groups && !args->groups)
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return UERR(EINVAL, dev, "no groups");
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if (args->flags & MSM_PERFCNTR_STREAM) {
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if (!perfmon_capable())
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return UERR(EPERM, dev, "invalid permissions");
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if (!args->nr_groups)
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return UERR(EINVAL, dev, "invalid nr_groups");
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if (!args->period)
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return UERR(EINVAL, dev, "invalid sampling period");
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if (args->bufsz_shift > const_ilog2(SZ_128M))
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return UERR(EINVAL, dev, "buffer size too big (>128M)");
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} else {
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if (args->period)
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return UERR(EINVAL, dev, "sampling period not allowed");
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if (args->bufsz_shift)
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return UERR(EINVAL, dev, "sample buf size not allowed");
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}
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/*
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* To avoid iterating over the groups multiple times, allocate and setup
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* both a ctx and global stream object. Only one of the two will be
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* kept in the end.
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*/
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struct msm_perfcntr_context_state *perfctx __free(kfree) = kzalloc(
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struct_size(perfctx, reserved_counters, gpu->num_perfcntr_groups),
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GFP_KERNEL);
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if (!perfctx)
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return -ENOMEM;
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struct msm_perfcntr_stream *stream __free(kfree) = kzalloc_obj(*stream);
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if (!stream)
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return -ENOMEM;
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uint8_t *nr_counters __free(kfree) = kzalloc_objs(uint8_t, gpu->num_perfcntr_groups);
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if (!nr_counters)
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return -ENOMEM;
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uint32_t *group_idx __free(kfree) = kzalloc_objs(uint32_t, args->nr_groups);
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if (!group_idx)
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return -ENOMEM;
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stream->gpu = gpu;
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stream->sample_period_ns = args->period;
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stream->nr_groups = args->nr_groups;
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stream->fifo_size = 1ull << args->bufsz_shift;
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mutex_init(&stream->read_lock);
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guard(mutex)(&gpu->perfcntr_lock);
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if (args->flags & MSM_PERFCNTR_STREAM) {
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if (perfcntrs->stream)
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return UERR(EBUSY, dev, "perfcntr stream already open");
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}
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size_t bufsz = 16; /* header size includes seqno and 64b timestamp: */
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int ret = 0;
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for (unsigned i = 0; i < args->nr_groups; i++) {
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struct drm_msm_perfcntr_group g = {0};
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size_t sz = min_t(size_t, args->group_stride, sizeof(g));
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void __user *userptr =
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u64_to_user_ptr(args->groups + (i * args->group_stride));
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if (copy_from_user(&g, userptr, sz))
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return -EFAULT;
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if (g.pad)
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return UERR(EINVAL, dev, "groups[%d]: invalid pad", i);
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int idx = get_group_idx(gpu, g.group_name, sizeof(g.group_name));
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if (idx < 0)
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return UERR(EINVAL, dev, "groups[%d]: unknown group", i);
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if (nr_counters[idx])
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return UERR(EINVAL, dev, "groups[%d]: duplicate group", i);
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if (g.nr_countables > gpu->perfcntr_groups[idx].num_counters)
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return UERR(EINVAL, dev, "groups[%d]: too many counters", i);
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if (args->flags & MSM_PERFCNTR_STREAM) {
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if (g.nr_countables && !g.countables)
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return UERR(EINVAL, dev, "groups[%d]: no countables", i);
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} else {
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if (g.countables)
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return UERR(EINVAL, dev, "groups[%d]: countables should be NULL", i);
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}
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int avail_counters = get_available_counters(gpu, idx, args->flags);
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if (g.nr_countables > avail_counters) {
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/*
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* Defer error return until we process all groups, in
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* case there are other E2BIG groups:
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*/
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ret = UERR(E2BIG, dev, "groups[%d]: too few counters available", i);
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if (args->flags & MSM_PERFCNTR_UPDATE) {
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/* Let userspace know how many counters are actually avail: */
|
|
g.nr_countables = avail_counters;
|
|
if (copy_to_user(userptr, &g, sz))
|
|
return -EFAULT;
|
|
}
|
|
}
|
|
|
|
group_idx[i] = idx;
|
|
perfctx->reserved_counters[idx] = g.nr_countables;
|
|
|
|
/* +1 to catch duplicate zero sized groups: */
|
|
nr_counters[idx] = g.nr_countables + 1;
|
|
|
|
if (args->flags & MSM_PERFCNTR_STREAM) {
|
|
size_t sz = sizeof(uint32_t) * g.nr_countables;
|
|
void __user *userptr = u64_to_user_ptr(g.countables);
|
|
|
|
if (copy_from_user(perfcntrs->groups[idx]->countables, userptr, sz))
|
|
return -EFAULT;
|
|
|
|
/* Samples are 64b per countable: */
|
|
bufsz += 2 * sz;
|
|
}
|
|
}
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (args->flags & MSM_PERFCNTR_STREAM) {
|
|
/*
|
|
* Validate requested buffer size is large enough for at least
|
|
* a single sample period.
|
|
*
|
|
* Note the circ_buf implementation needs to be 1 byte larger
|
|
* than max it can hold (see CIRC_SPACE()).
|
|
*/
|
|
if (stream->fifo_size <= bufsz)
|
|
return UERR(EINVAL, dev, "required buffer size: %zu", bufsz);
|
|
|
|
/* There aren't enough counters to hit this limit: */
|
|
WARN_ON(bufsz > SZ_128M);
|
|
|
|
stream->period_size = bufsz;
|
|
|
|
void *buf __free(kfree) = kmalloc(stream->fifo_size, GFP_KERNEL);
|
|
if (!buf)
|
|
return -ENOMEM;
|
|
|
|
FD_PREPARE(fdf, O_CLOEXEC,
|
|
anon_inode_getfile("[msm_perfcntrs]", &stream_fops, stream, 0));
|
|
if (fdf.err)
|
|
return fdf.err;
|
|
|
|
INIT_WORK(&stream->sel_work, sel_worker);
|
|
kthread_init_work(&stream->sample_work, sample_worker);
|
|
init_waitqueue_head(&stream->poll_wq);
|
|
hrtimer_setup(&stream->sample_timer, sample_timer,
|
|
CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
|
|
|
stream->sel_fence = ++perfcntrs->sel_seqno;
|
|
stream->group_idx = no_free_ptr(group_idx);
|
|
stream->fifo.buf = no_free_ptr(buf);
|
|
|
|
/* commit the allocated counters, subtracting off original +1: */
|
|
for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++)
|
|
perfcntrs->groups[i]->allocated_counters = nr_counters[i] - 1;
|
|
|
|
perfcntrs->stream = no_free_ptr(stream);
|
|
|
|
msm_perfcntr_resume_locked(perfcntrs->stream);
|
|
|
|
stream_fd = fd_publish(fdf);
|
|
} else {
|
|
kfree(ctx->perfctx);
|
|
ctx->perfctx = no_free_ptr(perfctx);
|
|
}
|
|
|
|
return stream_fd;
|
|
}
|
|
|
|
/**
|
|
* msm_perfcntr_group_idx - map idx of perfcntr group to group_idx
|
|
* @stream: The global perfcntr stream
|
|
* @n: The requested group_idx
|
|
*
|
|
* The PERFCNTR_CONFIG ioctl requested N counters/countables per perfcntr
|
|
* group, but the order of groups is not required to match the order they
|
|
* are defined in the perfcntr tables (which is not stable/UABI, only the
|
|
* group names are UABI).
|
|
*
|
|
* But the order samples are returned in the stream should match the
|
|
* order they are requested in the PERFCNTR_CONFIG ioctl. This helper
|
|
* handles the order remapping.
|
|
*
|
|
* Returns an index into gpu->perfcntr_groups[] and perfcntrs->groups[].
|
|
*/
|
|
uint32_t
|
|
msm_perfcntr_group_idx(const struct msm_perfcntr_stream *stream, uint32_t n)
|
|
{
|
|
WARN_ON_ONCE(n >= stream->nr_groups);
|
|
return stream->group_idx[n];
|
|
}
|
|
|
|
/**
|
|
* msm_perfcntr_counter_base - get idx of the first counter in group
|
|
* @stream: The global perfcntr stream
|
|
* @group_idx: the index of the counter group
|
|
*
|
|
* For global counter collection, counters are allocated from the end
|
|
* (last counter) while UMD allocates them from the start (0..N-1).
|
|
* Since UMD always allocated them from the start this also minimizes
|
|
* the chance of conflict when using old UMD which predates
|
|
* PERFCNTR_CONFIG ioctl.
|
|
*
|
|
* Returns the index of first counter to use. An index into
|
|
* msm_perfcntr_group::counters[].
|
|
*/
|
|
uint32_t
|
|
msm_perfcntr_counter_base(const struct msm_perfcntr_stream *stream, uint32_t group_idx)
|
|
{
|
|
struct msm_gpu *gpu = stream->gpu;
|
|
struct msm_perfcntr_state *perfcntrs = gpu->perfcntrs;
|
|
unsigned num_counters = gpu->perfcntr_groups[group_idx].num_counters;
|
|
unsigned allocated_counters = perfcntrs->groups[group_idx]->allocated_counters;
|
|
|
|
return num_counters - allocated_counters;
|
|
}
|
|
|
|
static void
|
|
__msm_perfcntr_cleanup(struct msm_gpu *gpu, struct msm_perfcntr_state *perfcntrs)
|
|
{
|
|
struct device *dev = &gpu->pdev->dev;
|
|
|
|
for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++)
|
|
devm_kfree(dev, perfcntrs->groups[i]);
|
|
|
|
devm_kfree(dev, perfcntrs);
|
|
}
|
|
|
|
void
|
|
msm_perfcntr_cleanup(struct msm_gpu *gpu)
|
|
{
|
|
if (!gpu->perfcntrs)
|
|
return;
|
|
|
|
__msm_perfcntr_cleanup(gpu, gpu->perfcntrs);
|
|
gpu->perfcntrs = NULL;
|
|
}
|
|
|
|
struct msm_perfcntr_state *
|
|
msm_perfcntr_init(struct msm_gpu *gpu)
|
|
{
|
|
struct msm_perfcntr_state *perfcntrs;
|
|
struct device *dev = &gpu->pdev->dev;
|
|
size_t sz;
|
|
|
|
sz = struct_size(perfcntrs, groups, gpu->num_perfcntr_groups);
|
|
perfcntrs = devm_kzalloc(dev, sz, GFP_KERNEL);
|
|
if (!perfcntrs)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
for (unsigned i = 0; i < gpu->num_perfcntr_groups; i++) {
|
|
const struct msm_perfcntr_group *group =
|
|
&gpu->perfcntr_groups[i];
|
|
|
|
sz = struct_size(perfcntrs->groups[i], countables, group->num_counters);
|
|
perfcntrs->groups[i] = devm_kzalloc(dev, sz, GFP_KERNEL);
|
|
if (!perfcntrs->groups[i]) {
|
|
__msm_perfcntr_cleanup(gpu, perfcntrs);
|
|
return ERR_PTR(-ENOMEM);
|
|
}
|
|
}
|
|
|
|
return perfcntrs;
|
|
}
|