57 lines
1.7 KiB
Plaintext
57 lines
1.7 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config PINCTRL_ASPEED
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bool
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF
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select MFD_SYSCON
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select REGMAP_MMIO
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config PINCTRL_ASPEED_G4
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bool "Aspeed G4 SoC pin control"
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depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 4th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G5
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bool "Aspeed G5 SoC pin control"
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depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 5th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G6
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bool "Aspeed G6 SoC pin control"
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depends on (MACH_ASPEED_G6 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 6th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G7_SOC0
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bool "Aspeed G7 SoC pin control"
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for the SoC0 instance
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of Aspeed's 7th generation SoCs. GPIO is provided by a separate
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GPIO driver.
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config PINCTRL_ASPEED_G7_SOC1
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bool "Aspeed G7 SoC1 pin control"
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF
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select MFD_SYSCON
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select PINMUX
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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select REGMAP_MMIO
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help
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Say Y here to enable pin controller support for the SoC1 instance
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of Aspeed's 7th generation SoCs. GPIO is provided by a separate
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GPIO driver.
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