181 lines
4.5 KiB
YAML
181 lines
4.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AD4691 Family Multichannel SAR ADCs
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maintainers:
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- Radu Sabau <radu.sabau@analog.com>
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description: |
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The AD4691 family are high-speed, low-power, multichannel successive
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approximation register (SAR) analog-to-digital converters (ADCs) with
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an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
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where an external PWM drives the CNV pin, and Manual Mode, where CNV
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is directly tied to the SPI chip-select.
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Datasheets:
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* https://www.analog.com/en/products/ad4691.html
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* https://www.analog.com/en/products/ad4692.html
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* https://www.analog.com/en/products/ad4693.html
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* https://www.analog.com/en/products/ad4694.html
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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enum:
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- adi,ad4691
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- adi,ad4692
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- adi,ad4693
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- adi,ad4694
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reg:
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maxItems: 1
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spi-max-frequency:
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maximum: 40000000
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spi-cpol: true
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spi-cpha: true
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avdd-supply:
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description: Analog power supply (4.5V to 5.5V).
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vdd-supply:
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description:
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External 1.8V digital core supply. When present, the internal LDO is
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disabled (LDO_EN = 0). Mutually exclusive with ldo-in-supply.
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ldo-in-supply:
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description:
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LDO input supply (2.4V to 5.5V). When present and vdd-supply is absent,
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the internal LDO generates 1.8V VDD from this input (LDO_EN = 1).
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Mutually exclusive with vdd-supply.
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vio-supply:
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description: I/O voltage supply (1.71V to 1.89V or VDD).
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ref-supply:
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description: External reference voltage supply (2.4V to 5.25V).
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refin-supply:
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description: Internal reference buffer input supply.
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reset-gpios:
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description:
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GPIO line controlling the hardware reset pin (active-low).
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maxItems: 1
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pwms:
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description:
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PWM connected to the CNV pin. When present, selects CNV Burst Mode where
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the PWM drives the conversion rate. When absent, Manual Mode is used
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(CNV tied to SPI CS).
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maxItems: 1
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interrupts:
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description:
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Interrupt lines connected to the ADC GP pins. Each GP pin can be
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physically wired to an interrupt-capable input on the SoC.
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maxItems: 4
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interrupt-names:
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description: Names of the interrupt lines, matching the GP pin names.
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minItems: 1
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maxItems: 4
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items:
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enum:
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- gp0
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- gp1
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- gp2
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- gp3
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gpio-controller: true
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'#gpio-cells':
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const: 2
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'#trigger-source-cells':
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description:
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This node can act as a trigger source. The single cell in a consumer
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reference specifies the GP pin number (0-3) used as the trigger output.
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const: 1
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required:
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- compatible
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- reg
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- avdd-supply
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- vio-supply
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allOf:
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# vdd-supply and ldo-in-supply are mutually exclusive, one is required:
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# either an external 1.8V VDD is provided or the internal LDO is fed from
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# ldo-in-supply to generate VDD.
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- oneOf:
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- required:
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- vdd-supply
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- required:
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- ldo-in-supply
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# ref-supply and refin-supply are mutually exclusive, one is required
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- oneOf:
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- required:
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- ref-supply
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- required:
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- refin-supply
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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/* AD4692 in CNV Burst Mode with SPI offload */
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad4692";
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reg = <0>;
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spi-cpol;
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spi-cpha;
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spi-max-frequency = <40000000>;
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avdd-supply = <&avdd_supply>;
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ldo-in-supply = <&avdd_supply>;
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vio-supply = <&vio_supply>;
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ref-supply = <&ref_5v>;
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reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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pwms = <&pwm_gen 0 0>;
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#trigger-source-cells = <1>;
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};
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};
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- |
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#include <dt-bindings/gpio/gpio.h>
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/* AD4692 in Manual Mode (CNV tied to SPI CS) */
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad4692";
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reg = <0>;
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spi-cpol;
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spi-cpha;
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spi-max-frequency = <31250000>;
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avdd-supply = <&avdd_supply>;
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ldo-in-supply = <&avdd_supply>;
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vio-supply = <&vio_supply>;
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refin-supply = <&refin_supply>;
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reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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};
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};
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