linux-kernel/linux-7.2.3/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Support for Variscite Concerto Carrier board with the VAR-SOM-6UL
 * Variscite SoM mounted on it (all CPU variants)
 *
 * Copyright 2019 Variscite Ltd.
 * Copyright 2025 Bootlin
 */

#include <dt-bindings/leds/common.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_key_back>, <&pinctrl_gpio_key_wakeup>;

		key-back {
			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_BACK>;
		};

		key-wakeup {
			gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WAKEUP>;
			wakeup-source;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led-0 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_GREEN>;
			label = "gpled2";
			gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	lvds_panel: lvds-panel {
		compatible = "sgd,gktw70sdae4se", "panel-lvds";
		data-mapping = "jeida-18";
		width-mm = <153>;
		height-mm = <86>;

		panel-timing {
			clock-frequency = <35000000>;
			hactive = <800>;
			vactive = <480>;
			hback-porch = <40>;
			hfront-porch = <40>;
			vback-porch = <29>;
			vfront-porch = <13>;
			hsync-len = <48>;
			vsync-len = <3>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <0>;
		};
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	rtc@68 {
		/*
		 * To actually use this interrupt
		 * connect pins J14.8 & J14.10 on the Concerto-Board.
		 */
		compatible = "dallas,ds1337";
		reg = <0x68>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc>;
		interrupt-parent = <&gpio1>;
		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
	};
};

&iomuxc {
	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020
			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020
		>;
	};

	pinctrl_gpio_key_back: gpio-key-backgrp {
		fsl,pins = <
			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x17059
		>;
	};

	pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp {
		fsl,pins = <
			MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x17059
		>;
	};

	pinctrl_gpio_leds: gpio-ledsgrp {
		fsl,pins = <
			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x1b0b0	/* GPLED2 */
		>;
	};

	pinctrl_rtc: rtcgrp {
		fsl,pins = <
			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x1b0b0 /* RTC alarm IRQ */
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6UL_PAD_CSI_DATA00__UART5_DCE_TX	0x1b0b1
			MX6UL_PAD_CSI_DATA01__UART5_DCE_RX	0x1b0b1
			MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	0x1b0b1
			MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	0x1b0b1
		>;
	};

	pinctrl_usb_otg1_id: usbotg1idgrp {
		fsl,pins = <
			MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	0x17059
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B	0x78b0
		>;
	};
};

&snvs_pwrkey {
	status = "disabled";
};

&snvs_rtc {
	status = "disabled";
};

&tsc {
	/*
	 * Conflics with wdog1 ext-reset-output & SD CD pins,
	 * so we keep it disabled by default.
	 */
	status = "disabled";
};

/* Console UART */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

/* ttymxc4 UART */
&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb_otg1_id>;
	dr_mode = "otg";
	disable-over-current;
	srp-disable;
	hnp-disable;
	adp-disable;
	status = "okay";
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	/*
	 * To actually use ext-reset-output
	 * connect pins J17.3 & J17.8 on the Concerto-Board
	 */
	fsl,ext-reset-output;
};