32 lines
683 B
Plaintext
32 lines
683 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* DT-overlay to enable the onboard PCIe x1 slot, which shares pins and the PHY
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* with the USB3 host port.
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* To use the PCIe slot, apply this overlay and flip the Dial_Switch_1 right
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* next to the PCIe slot to low state (labeled "ON - PCIe1"). USB3 host port
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* will be unusable (not even in 2.0 mode)
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/pinctrl/rockchip.h>
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&pcie1 {
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pinctrl-0 = <&pcie1m0_pins &pcie1_rst>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pinctrl {
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pcie1 {
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pcie1_rst: pcie1-rst {
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rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&usb_drd1_dwc3 {
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status = "disabled";
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};
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