29 lines
1.0 KiB
C
29 lines
1.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H
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#define _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H
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/*
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* Constants for the second mbox-cell of the Renesas MFIS IP core. To be treated
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* as bit flags which can be ORed.
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*/
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/*
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* MFIS HW design before r8a78001 requires a channel to be marked as either
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* TX or RX.
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*/
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#define MFIS_CHANNEL_TX (0 << 0)
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#define MFIS_CHANNEL_RX (1 << 0)
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/*
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* MFIS variants before r8a78001 work with pairs of IICR and EICR registers.
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* Usually, it is specified in the datasheets which of the two a specific core
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* should use. Then, it does not need extra description in DT. For plain MFIS
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* of r8a78000, this is selectable, though. According to the system design and
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* the firmware in use, these channels need to be marked. This is not needed
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* with other versions of the MFIS, not even with MFIS-SCP of r8a78000.
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*/
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#define MFIS_CHANNEL_IICR (0 << 1)
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#define MFIS_CHANNEL_EICR (1 << 1)
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#endif /* _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H */
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