94 lines
2.4 KiB
YAML
94 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: UltraRISC DP1000 PCIe Host Controller
|
|
|
|
description:
|
|
UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP.
|
|
|
|
maintainers:
|
|
- Xincheng Zhang <zhangxincheng@ultrarisc.com>
|
|
- Jia Wang <wangjia@ultrarisc.com>
|
|
|
|
allOf:
|
|
- $ref: /schemas/pci/snps,dw-pcie.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
const: ultrarisc,dp1000-pcie
|
|
|
|
reg:
|
|
items:
|
|
- description: Data Bus Interface (DBI) registers.
|
|
- description: PCIe configuration space region.
|
|
|
|
reg-names:
|
|
items:
|
|
- const: dbi
|
|
- const: config
|
|
|
|
num-lanes:
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
enum: [4, 16]
|
|
description: Number of lanes to use.
|
|
|
|
interrupts:
|
|
items:
|
|
- description: MSI interrupt
|
|
- description: Legacy INTA interrupt
|
|
- description: Legacy INTB interrupt
|
|
- description: Legacy INTC interrupt
|
|
- description: Legacy INTD interrupt
|
|
|
|
interrupt-names:
|
|
items:
|
|
- const: msi
|
|
- const: inta
|
|
- const: intb
|
|
- const: intc
|
|
- const: intd
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
- interrupts
|
|
- interrupt-names
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
soc {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
pcie@21000000 {
|
|
compatible = "ultrarisc,dp1000-pcie";
|
|
reg = <0x0 0x21000000 0x0 0x01000000>,
|
|
<0x0 0x4fff0000 0x0 0x00010000>;
|
|
reg-names = "dbi", "config";
|
|
ranges = <0x81000000 0x0 0x4fbf0000 0x0 0x4fbf0000 0x0 0x00400000>,
|
|
<0x82000000 0x0 0x40000000 0x0 0x40000000 0x0 0x0fbf0000>,
|
|
<0xc3000000 0x40 0x00000000 0x40 0x00000000 0xd 0x00000000>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
device_type = "pci";
|
|
dma-coherent;
|
|
bus-range = <0x0 0xff>;
|
|
num-lanes = <16>;
|
|
interrupt-parent = <&plic>;
|
|
interrupts = <43>, <44>, <45>, <46>, <47>;
|
|
interrupt-names = "msi", "inta", "intb", "intc", "intd";
|
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
interrupt-map = <0x0 0x0 0x0 0x1 &plic 44>,
|
|
<0x0 0x0 0x0 0x2 &plic 45>,
|
|
<0x0 0x0 0x0 0x3 &plic 46>,
|
|
<0x0 0x0 0x0 0x4 &plic 47>;
|
|
};
|
|
};
|