150 lines
2.8 KiB
Plaintext
150 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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&{/} {
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model = "Qualcomm Technologies, Inc. Monaco-EVK IFP Mezzanine";
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vreg_0p9: regulator-0v9 {
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compatible = "regulator-fixed";
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regulator-name = "VREG_0P9";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vreg_1p8: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VREG_1P8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&i2c15 {
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#address-cells = <1>;
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#size-cells = <0>;
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eeprom1: eeprom@52 {
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compatible = "giantec,gt24c256c", "atmel,24c256";
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reg = <0x52>;
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pagesize = <64>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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};
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&pcie0 {
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iommu-map = <0x0 &pcie_smmu 0x0 0x1>,
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<0x100 &pcie_smmu 0x1 0x1>,
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<0x208 &pcie_smmu 0x2 0x1>,
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<0x210 &pcie_smmu 0x3 0x1>,
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<0x218 &pcie_smmu 0x4 0x1>,
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<0x300 &pcie_smmu 0x5 0x1>,
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<0x400 &pcie_smmu 0x6 0x1>,
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<0x500 &pcie_smmu 0x7 0x1>,
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<0x501 &pcie_smmu 0x8 0x1>;
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};
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&pcieport0 {
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#address-cells = <3>;
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#size-cells = <2>;
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pcie@0,0 {
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compatible = "pci1179,0623";
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x2 0xff>;
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vddc-supply = <&vreg_0p9>;
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vdd18-supply = <&vreg_1p8>;
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vdd09-supply = <&vreg_0p9>;
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vddio1-supply = <&vreg_1p8>;
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vddio2-supply = <&vreg_1p8>;
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vddio18-supply = <&vreg_1p8>;
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i2c-parent = <&i2c15 0x77>;
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resx-gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&tc9563_resx_n>;
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pinctrl-names = "default";
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pcie@1,0 {
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reg = <0x20800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x3 0xff>;
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};
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pcie@2,0 {
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reg = <0x21000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x4 0xff>;
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};
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pcie@3,0 {
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reg = <0x21800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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bus-range = <0x5 0xff>;
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pci@0,0 {
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reg = <0x50000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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};
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pci@0,1 {
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reg = <0x50100 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges;
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};
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};
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};
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};
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&tlmm {
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tc9563_resx_n: tc9563-resx-state {
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pins = "gpio124";
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function = "gpio";
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bias-disable;
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/* Reset pin of tc9563 is active low hence set default
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* state of this pin to output-high.
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*/
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output-high;
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};
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};
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